Lines Matching +full:0 +full:xf4000000
27 size = <0 0x1000000>;
28 alignment = <0 0x1000000>;
31 size = <0 0x400000>;
32 alignment = <0 0x400000>;
35 size = <0 0x2000000>;
36 alignment = <0 0x2000000>;
41 reg = <0xf 0xfe124000 0 0x2000>;
42 ranges = <0 0 0xf 0xe8000000 0x04000000
43 1 0 0xf 0xfa000000 0x00010000
44 2 0 0xf 0xfb000000 0x00010000
45 4 0 0xf 0xc0000000 0x08000000
46 6 0 0xf 0xd0000000 0x08000000
47 7 0 0xf 0xd8000000 0x08000000>;
49 nor@0,0 {
53 reg = <0x0 0x0 0x04000000>;
58 nand@1,0 {
62 reg = <0x1 0x0 0x10000>;
65 board-control@2,0 {
67 reg = <0x2 0x0 0x80>;
70 chassis-mgmt@6,0 {
72 reg = <6 0 0x100>;
75 interrupts = <11 1 0 0>;
86 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
90 ranges = <0x0 0xf 0xf4000000 0x2000000>;
94 ranges = <0x0 0xf 0xf6000000 0x2000000>;
98 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
99 reg = <0xf 0xfe000000 0 0x00001000>;
118 reg = <0x70>;
120 #size-cells = <0>;
123 i2c@0 {
124 reg = <0>;
126 #size-cells = <0>;
130 reg = <0x54>;
140 #size-cells = <0>;
144 reg = <0x48>;
149 reg = <0x4a>;
154 reg = <0x4b>;
166 reg = <0x50>;
172 reg = <0x54>;
243 reg = <0x11>;
251 reg = <0xf 0xfe240000 0 0x10000>;
252 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
253 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
254 pcie@0 {
255 ranges = <0x02000000 0 0xe0000000
256 0x02000000 0 0xe0000000
257 0 0x20000000
259 0x01000000 0 0x00000000
260 0x01000000 0 0x00000000
261 0 0x00010000>;
267 reg = <0xf 0xfe250000 0 0x10000>;
268 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
269 0x01000000 0 0 0xf 0xf8010000 0 0x00010000>;
270 pcie@0 {
271 ranges = <0x02000000 0 0xe0000000
272 0x02000000 0 0xe0000000
273 0 0x10000000
275 0x01000000 0 0x00000000
276 0x01000000 0 0x00000000
277 0 0x00010000>;
283 reg = <0xf 0xfe260000 0 0x10000>;
284 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
285 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
286 pcie@0 {
287 ranges = <0x02000000 0 0xe0000000
288 0x02000000 0 0xe0000000
289 0 0x10000000
291 0x01000000 0 0x00000000
292 0x01000000 0 0x00000000
293 0 0x00010000>;
299 reg = <0xf 0xfe270000 0 0x10000>;
300 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
301 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
302 pcie@0 {
303 ranges = <0x02000000 0 0xe0000000
304 0x02000000 0 0xe0000000
305 0 0x10000000
307 0x01000000 0 0x00000000
308 0x01000000 0 0x00000000
309 0 0x00010000>;
314 ranges = <0x0 0xf 0xfe140000 0x40000>;
315 reg = <0xf 0xfe140000 0 0x480>;
316 brg-frequency = <0>;
317 bus-frequency = <0>;
321 reg = <0x700 0x80>;
326 reg = <0x1000 0x800>;