Lines Matching +full:reg +full:- +full:init
1 // SPDX-License-Identifier: GPL-2.0-or-later
14 &gpt0 { fsl,has-wdt; };
15 &gpt3 { gpio-controller; };
16 &gpt4 { gpio-controller; };
17 &gpt5 { gpio-controller; };
24 #address-cells = <1>;
25 #size-cells = <1>;
26 compatible = "fsl,mpc5200b-immr";
28 reg = <0xf0000000 0x00000100>;
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
33 fsl,init-ext-48mhz-en = <0x0>;
34 fsl,init-fd-enable = <0x01>;
35 fsl,init-fd-counters = <0x3333>;
43 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
44 reg = <0x2000 0x100>;
49 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
50 reg = <0x2200 0x100>;
55 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
56 reg = <0x2400 0x100>;
69 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
70 reg = <0x2c00 0x100>;
75 phy-handle = <&phy0>;
79 phy0: ethernet-phy@1f {
80 reg = <0x1f>;
92 reg = <0x2e>;
96 reg = <0x51>;
102 compatible = "fsl,mpc5200b-lpb","simple-bus";
103 #address-cells = <2>;
104 #size-cells = <1>;
113 compatible = "cfi-flash";
114 reg = <0 0 0x02000000>;
115 bank-width = <2>;
116 #size-cells = <1>;
117 #address-cells = <1>;
120 compatible = "mtd-ram";
121 reg = <1 0x00000 0x00400000>;
122 bank-width = <2>;
127 #interrupt-cells = <1>;
128 #size-cells = <2>;
129 #address-cells = <3>;
131 compatible = "fsl,mpc5200-pci";
132 reg = <0xf0000d00 0x100>;
133 interrupt-map-mask = <0xf800 0 0 7>;
134 interrupt-map = <
140 clock-frequency = <0>; /* From boot loader */
142 bus-range = <0 0>;