Lines Matching +full:pll +full:- +full:reset

1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ath79-clk.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
17 clocks = <&pll ATH79_CLK_CPU>;
22 cpuintc: interrupt-controller {
23 compatible = "qca,ar7100-cpu-intc";
25 interrupt-controller;
26 #interrupt-cells = <1>;
28 qca,ddr-wb-channel-interrupts = <2>, <3>;
29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
38 compatible = "simple-bus";
41 #address-cells = <1>;
42 #size-cells = <1>;
44 interrupt-parent = <&cpuintc>;
47 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
53 interrupt-parent = <&miscintc>;
55 ddr_ctrl: memory-controller@18000000 {
56 compatible = "qca,ar7240-ddr-controller";
59 #qca,ddr-wb-channel-cells = <1>;
63 compatible = "qca,ar9330-uart";
69 clock-names = "uart";
75 compatible = "qca,ar7100-gpio";
81 gpio-controller;
82 #gpio-cells = <2>;
84 interrupt-controller;
85 #interrupt-cells = <2>;
90 pll: pll-controller@18050000 { label
91 compatible = "qca,ar9330-pll";
95 clock-names = "ref";
97 #clock-cells = <1>;
100 miscintc: interrupt-controller@18060010 {
101 compatible = "qca,ar7240-misc-intc";
104 interrupt-parent = <&cpuintc>;
107 interrupt-controller;
108 #interrupt-cells = <1>;
111 rst: reset-controller@1806001c {
112 compatible = "qca,ar7100-reset";
115 #reset-cells = <1>;
120 compatible = "qca,ar9330-eth";
125 reset-names = "mac", "mdio";
126 clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
127 clock-names = "eth", "mdio";
129 phy-mode = "mii";
130 phy-handle = <&phy_port4>;
136 compatible = "qca,ar9330-eth";
140 reset-names = "mac", "mdio";
141 clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
142 clock-names = "eth", "mdio";
144 phy-mode = "gmii";
148 fixed-link {
150 full-duplex;
155 #address-cells = <1>;
156 #size-cells = <0>;
159 #address-cells = <1>;
160 #size-cells = <0>;
162 compatible = "qca,ar9331-switch";
165 reset-names = "switch";
167 interrupt-parent = <&miscintc>;
170 interrupt-controller;
171 #interrupt-cells = <1>;
174 #address-cells = <1>;
175 #size-cells = <0>;
181 phy-mode = "gmii";
183 fixed-link {
185 full-duplex;
192 phy-handle = <&phy_port0>;
193 phy-mode = "internal";
200 phy-handle = <&phy_port1>;
201 phy-mode = "internal";
208 phy-handle = <&phy_port2>;
209 phy-mode = "internal";
216 phy-handle = <&phy_port3>;
217 phy-mode = "internal";
224 #address-cells = <1>;
225 #size-cells = <0>;
227 interrupt-parent = <&switch10>;
270 phy-names = "usb-phy";
277 compatible = "qca,ar7100-spi";
280 clocks = <&pll ATH79_CLK_AHB>;
281 clock-names = "ahb";
283 #address-cells = <1>;
284 #size-cells = <0>;
290 usb_phy: usb-phy {
291 compatible = "qca,ar7100-usb-phy";
293 reset-names = "phy", "suspend-override";
296 #phy-cells = <0>;