Lines Matching +full:fast +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
6 #include <dt-bindings/interrupt-controller/mips-gic.h>
8 #include <dt-bindings/clock/mobileye,eyeq5-clk.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
24 reserved-memory {
25 #address-cells = <2>;
26 #size-cells = <2>;
39 pci0_msi_reserved: pci0-msi@806000000 {
42 pci1_msi_reserved: pci1-msi@806100000 {
46 mini_coredump0_reserved: mini-coredump0@806200000 {
49 mhm_reserved_0: the-mhm-reserved-0@0 {
54 compatible = "mobileye,eyeq5-bootloader-config", "nvmem-rmem";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 no-map;
60 nvmem-layout {
61 compatible = "fixed-layout";
62 #address-cells = <1>;
63 #size-cells = <1>;
82 cpu_intc: interrupt-controller {
83 compatible = "mti,cpu-interrupt-controller";
84 interrupt-controller;
85 #address-cells = <0>;
86 #interrupt-cells = <1>;
90 compatible = "fixed-clock";
91 #clock-cells = <0>;
92 clock-frequency = <30000000>;
96 compatible = "fixed-clock";
97 #clock-cells = <0>;
98 clock-frequency = <250000000>; /* 250MHz */
101 tsu_clk: tsu-clk {
102 compatible = "fixed-clock";
103 #clock-cells = <0>;
104 clock-frequency = <125000000>; /* 125MHz */
108 #address-cells = <2>;
109 #size-cells = <2>;
111 compatible = "simple-bus";
114 compatible = "mobileye,eyeq5-i2c", "arm,primecell";
116 interrupt-parent = <&gic>;
118 clock-frequency = <400000>; /* Fast mode */
119 #address-cells = <1>;
120 #size-cells = <0>;
122 clock-names = "i2cclk", "apb_pclk";
124 i2c-transfer-timeout-us = <10000>;
129 compatible = "mobileye,eyeq5-i2c", "arm,primecell";
131 interrupt-parent = <&gic>;
133 clock-frequency = <400000>; /* Fast mode */
134 #address-cells = <1>;
135 #size-cells = <0>;
137 clock-names = "i2cclk", "apb_pclk";
139 i2c-transfer-timeout-us = <10000>;
144 compatible = "mobileye,eyeq5-i2c", "arm,primecell";
146 interrupt-parent = <&gic>;
148 clock-frequency = <400000>; /* Fast mode */
149 #address-cells = <1>;
150 #size-cells = <0>;
152 clock-names = "i2cclk", "apb_pclk";
154 i2c-transfer-timeout-us = <10000>;
159 compatible = "mobileye,eyeq5-i2c", "arm,primecell";
161 interrupt-parent = <&gic>;
163 clock-frequency = <400000>; /* Fast mode */
164 #address-cells = <1>;
165 #size-cells = <0>;
167 clock-names = "i2cclk", "apb_pclk";
169 i2c-transfer-timeout-us = <10000>;
174 compatible = "mobileye,eyeq5-i2c", "arm,primecell";
176 interrupt-parent = <&gic>;
178 clock-frequency = <400000>; /* Fast mode */
179 #address-cells = <1>;
180 #size-cells = <0>;
182 clock-names = "i2cclk", "apb_pclk";
184 i2c-transfer-timeout-us = <10000>;
191 reg-io-width = <4>;
192 interrupt-parent = <&gic>;
195 clock-names = "uartclk", "apb_pclk";
197 pinctrl-names = "default";
198 pinctrl-0 = <&uart0_pins>;
204 reg-io-width = <4>;
205 interrupt-parent = <&gic>;
208 clock-names = "uartclk", "apb_pclk";
210 pinctrl-names = "default";
211 pinctrl-0 = <&uart1_pins>;
217 reg-io-width = <4>;
218 interrupt-parent = <&gic>;
221 clock-names = "uartclk", "apb_pclk";
223 pinctrl-names = "default";
224 pinctrl-0 = <&uart2_pins>;
227 olb: system-controller@e00000 {
228 compatible = "mobileye,eyeq5-olb", "syscon";
230 #reset-cells = <2>;
231 #clock-cells = <1>;
233 clock-names = "ref";
236 gic: interrupt-controller@140000 {
239 interrupt-controller;
240 #interrupt-cells = <3>;
243 * Declare the interrupt-parent even though the mti,gic
248 interrupt-parent = <&cpu_intc>;
251 compatible = "mti,gic-timer";
258 compatible = "mobileye,eyeq-sd4hc", "cdns,sd4hc";
260 interrupt-parent = <&gic>;
263 bus-width = <8>;
264 max-frequency = <200000000>;
265 mmc-ddr-1_8v;
266 sd-uhs-ddr50;
267 mmc-hs200-1_8v;
268 mmc-hs400-1_8v;
269 mmc-hs400-enhanced-strobe;
271 cdns,phy-input-delay-legacy = <4>;
272 cdns,phy-input-delay-mmc-highspeed = <2>;
273 cdns,phy-input-delay-mmc-ddr = <3>;
274 cdns,phy-dll-delay-sdclk = <32>;
275 cdns,phy-dll-delay-sdclk-hsmmc = <32>;
276 cdns,phy-dll-delay-strobe = <32>;
280 compatible = "mobileye,eyeq5-gpio";
282 gpio-bank = <0>;
284 interrupt-parent = <&gic>;
286 gpio-controller;
287 #gpio-cells = <2>;
288 gpio-ranges = <&olb 0 0 29>;
289 interrupt-controller;
290 #interrupt-cells = <2>;
295 compatible = "mobileye,eyeq5-gpio";
297 gpio-bank = <1>;
299 interrupt-parent = <&gic>;
301 gpio-controller;
302 #gpio-cells = <2>;
303 gpio-ranges = <&olb 0 29 23>;
304 interrupt-controller;
305 #interrupt-cells = <2>;
311 #include "eyeq5-pins.dtsi"