Lines Matching +full:0 +full:- +full:7
1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
13 pic: interrupt-controller@10000000 {
14 compatible = "loongson,pch-pic-1.0";
15 reg = <0 0x10000000 0 0x400>;
16 interrupt-controller;
17 interrupt-parent = <&htvec>;
18 loongson,pic-base-vec = <0>;
19 #interrupt-cells = <2>;
23 compatible = "loongson,ls7a-rtc";
24 reg = <0 0x100d0100 0 0x78>;
25 interrupt-parent = <&pic>;
31 reg = <0 0x10080000 0 0x100>;
32 clock-frequency = <50000000>;
33 interrupt-parent = <&pic>;
35 no-loopback-test;
41 reg = <0 0x10080100 0 0x100>;
42 clock-frequency = <50000000>;
43 interrupt-parent = <&pic>;
45 no-loopback-test;
51 reg = <0 0x10080200 0 0x100>;
52 clock-frequency = <50000000>;
53 interrupt-parent = <&pic>;
55 no-loopback-test;
61 reg = <0 0x10080300 0 0x100>;
62 clock-frequency = <50000000>;
63 interrupt-parent = <&pic>;
65 no-loopback-test;
69 compatible = "loongson,ls7a-pci";
71 #address-cells = <3>;
72 #size-cells = <2>;
73 #interrupt-cells = <2>;
74 msi-parent = <&msi>;
76 reg = <0 0x1a000000 0 0x02000000>,
77 <0xefe 0x00000000 0 0x20000000>;
79 ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
80 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
82 ohci@4,0 {
83 compatible = "pci0014,7a24.0",
84 "pci0014,7a24",
88 reg = <0x2000 0x0 0x0 0x0 0x0>;
90 interrupt-parent = <&pic>;
94 compatible = "pci0014,7a14.0",
95 "pci0014,7a14",
99 reg = <0x2100 0x0 0x0 0x0 0x0>;
101 interrupt-parent = <&pic>;
104 ohci@5,0 {
105 compatible = "pci0014,7a24.0",
106 "pci0014,7a24",
110 reg = <0x2800 0x0 0x0 0x0 0x0>;
112 interrupt-parent = <&pic>;
116 compatible = "pci0014,7a14.0",
117 "pci0014,7a14",
121 reg = <0x2900 0x0 0x0 0x0 0x0>;
123 interrupt-parent = <&pic>;
126 sata@8,0 {
127 compatible = "pci0014,7a08.0",
128 "pci0014,7a08",
132 reg = <0x4000 0x0 0x0 0x0 0x0>;
134 interrupt-parent = <&pic>;
138 compatible = "pci0014,7a08.0",
139 "pci0014,7a08",
143 reg = <0x4100 0x0 0x0 0x0 0x0>;
145 interrupt-parent = <&pic>;
149 compatible = "pci0014,7a08.0",
150 "pci0014,7a08",
154 reg = <0x4200 0x0 0x0 0x0 0x0>;
156 interrupt-parent = <&pic>;
159 gpu@6,0 {
160 compatible = "pci0014,7a15.0",
161 "pci0014,7a15",
165 reg = <0x3000 0x0 0x0 0x0 0x0>;
167 interrupt-parent = <&pic>;
171 compatible = "pci0014,7a06.0",
172 "pci0014,7a06",
176 reg = <0x3100 0x0 0x0 0x0 0x0>;
178 interrupt-parent = <&pic>;
181 hda@7,0 {
182 compatible = "pci0014,7a07.0",
183 "pci0014,7a07",
187 reg = <0x3800 0x0 0x0 0x0 0x0>;
189 interrupt-parent = <&pic>;
192 gmac@3,0 {
193 compatible = "pci0014,7a03.0",
194 "pci0014,7a03",
198 reg = <0x1800 0x0 0x0 0x0 0x0>;
201 interrupt-names = "macirq", "eth_lpi";
202 interrupt-parent = <&pic>;
203 phy-mode = "rgmii";
205 #address-cells = <1>;
206 #size-cells = <0>;
207 compatible = "snps,dwmac-mdio";
208 phy0: ethernet-phy@0 {
209 reg = <0>;
215 compatible = "pci0014,7a03.0",
216 "pci0014,7a03",
219 "loongson, pci-gmac";
221 reg = <0x1900 0x0 0x0 0x0 0x0>;
224 interrupt-names = "macirq", "eth_lpi";
225 interrupt-parent = <&pic>;
226 phy-mode = "rgmii";
228 #address-cells = <1>;
229 #size-cells = <0>;
230 compatible = "snps,dwmac-mdio";
231 phy1: ethernet-phy@1 {
232 reg = <0>;
237 pci_bridge@9,0 {
238 compatible = "pci0014,7a19.1",
239 "pci0014,7a19",
243 reg = <0x4800 0x0 0x0 0x0 0x0>;
245 interrupt-parent = <&pic>;
247 #interrupt-cells = <1>;
248 interrupt-map-mask = <0 0 0 0>;
249 interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
252 pci_bridge@a,0 {
253 compatible = "pci0014,7a09.1",
254 "pci0014,7a09",
258 reg = <0x5000 0x0 0x0 0x0 0x0>;
260 interrupt-parent = <&pic>;
262 #interrupt-cells = <1>;
263 interrupt-map-mask = <0 0 0 0>;
264 interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
267 pci_bridge@b,0 {
268 compatible = "pci0014,7a09.1",
269 "pci0014,7a09",
273 reg = <0x5800 0x0 0x0 0x0 0x0>;
275 interrupt-parent = <&pic>;
277 #interrupt-cells = <1>;
278 interrupt-map-mask = <0 0 0 0>;
279 interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
282 pci_bridge@c,0 {
283 compatible = "pci0014,7a09.1",
284 "pci0014,7a09",
288 reg = <0x6000 0x0 0x0 0x0 0x0>;
290 interrupt-parent = <&pic>;
292 #interrupt-cells = <1>;
293 interrupt-map-mask = <0 0 0 0>;
294 interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
297 pci_bridge@d,0 {
298 compatible = "pci0014,7a19.1",
299 "pci0014,7a19",
303 reg = <0x6800 0x0 0x0 0x0 0x0>;
305 interrupt-parent = <&pic>;
307 #interrupt-cells = <1>;
308 interrupt-map-mask = <0 0 0 0>;
309 interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
312 pci_bridge@e,0 {
313 compatible = "pci0014,7a09.1",
314 "pci0014,7a09",
318 reg = <0x7000 0x0 0x0 0x0 0x0>;
320 interrupt-parent = <&pic>;
322 #interrupt-cells = <1>;
323 interrupt-map-mask = <0 0 0 0>;
324 interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
327 pci_bridge@f,0 {
328 compatible = "pci0014,7a29.1",
329 "pci0014,7a29",
333 reg = <0x7800 0x0 0x0 0x0 0x0>;
335 interrupt-parent = <&pic>;
337 #interrupt-cells = <1>;
338 interrupt-map-mask = <0 0 0 0>;
339 interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
342 pci_bridge@10,0 {
343 compatible = "pci0014,7a19.1",
344 "pci0014,7a19",
348 reg = <0x8000 0x0 0x0 0x0 0x0>;
350 interrupt-parent = <&pic>;
352 #interrupt-cells = <1>;
353 interrupt-map-mask = <0 0 0 0>;
354 interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
357 pci_bridge@11,0 {
358 compatible = "pci0014,7a29.1",
359 "pci0014,7a29",
363 reg = <0x8800 0x0 0x0 0x0 0x0>;
365 interrupt-parent = <&pic>;
367 #interrupt-cells = <1>;
368 interrupt-map-mask = <0 0 0 0>;
369 interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
372 pci_bridge@12,0 {
373 compatible = "pci0014,7a19.1",
374 "pci0014,7a19",
378 reg = <0x9000 0x0 0x0 0x0 0x0>;
380 interrupt-parent = <&pic>;
382 #interrupt-cells = <1>;
383 interrupt-map-mask = <0 0 0 0>;
384 interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
387 pci_bridge@13,0 {
388 compatible = "pci0014,7a29.1",
389 "pci0014,7a29",
393 reg = <0x9800 0x0 0x0 0x0 0x0>;
395 interrupt-parent = <&pic>;
397 #interrupt-cells = <1>;
398 interrupt-map-mask = <0 0 0 0>;
399 interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
402 pci_bridge@14,0 {
403 compatible = "pci0014,7a19.1",
404 "pci0014,7a19",
408 reg = <0xa000 0x0 0x0 0x0 0x0>;
410 interrupt-parent = <&pic>;
412 #interrupt-cells = <1>;
413 interrupt-map-mask = <0 0 0 0>;
414 interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
420 #address-cells = <2>;
421 #size-cells = <1>;
422 ranges = <1 0 0 0x18000000 0x20000>;