Lines Matching +full:0 +full:xe14
9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
31 #address-cells = <0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
57 ranges = <0 0x10000000 0x01000000>;
61 reg = <0x411400 0x30>, <0x411600 0x30>;
72 reg = <0x403000 0x30>;
81 reg = <0x400000 0xdc>;
84 interrupts = <0>, <2>;
85 brcm,gisb-arb-master-mask = <0x673>;
93 reg = <0x406780 0x8>;
95 brcm,int-map-mask = <0x44>, <0xf000000>;
96 brcm,int-fwd-mask = <0x70000>;
108 reg = <0x408b80 0x8>;
110 brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
111 brcm,int-fwd-mask = <0>;
125 reg = <0x404000 0x51c>;
131 syscon = <&sun_top_ctrl 0x304 0x308>;
136 reg = <0x406900 0x20>;
137 reg-io-width = <0x4>;
138 reg-shift = <0x2>;
148 reg = <0x406940 0x20>;
149 reg-io-width = <0x4>;
150 reg-shift = <0x2>;
160 reg = <0x406980 0x20>;
161 reg-io-width = <0x4>;
162 reg-shift = <0x2>;
174 reg = <0x406200 0x58>;
184 reg = <0x406280 0x58>;
194 reg = <0x406300 0x58>;
204 reg = <0x406380 0x58>;
214 reg = <0x408980 0x58>;
222 reg = <0x406580 0x28>;
230 reg = <0x406800 0x28>;
239 reg = <0x4067e8 0x14>;
245 reg = <0x408440 0x30>;
255 reg = <0x408000 0x100>, <0x408200 0x200>;
261 reg = <0x4067c0 0x40>;
266 reg = <0x406700 0x60>;
278 reg = <0x408c00 0x60>;
296 #address-cells = <0x1>;
297 #size-cells = <0x1>;
298 reg = <0x430000 0x4c8c>;
305 #address-cells = <0x1>;
306 #size-cells = <0x0>;
307 reg = <0xe14 0x8>;
311 reg = <0x1>;
320 reg = <0x480300 0x100>;
329 reg = <0x480400 0x100>;
339 reg = <0x480500 0x100>;
348 reg = <0x480600 0x100>;
358 reg = <0x490300 0x100>;
367 reg = <0x490400 0x100>;
377 reg = <0x490500 0x100>;
386 reg = <0x490600 0x100>;
396 reg = <0x411000 0x30>;
404 compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
406 #size-cells = <0>;
408 reg = <0x412800 0x400>;
417 reg = <0x181000 0xa9c>, <0x180020 0x1c>;
421 #size-cells = <0>;
424 sata0: sata-port@0 {
425 reg = <0>;
437 reg = <0x180100 0x0eff>;
440 #size-cells = <0>;
443 sata_phy0: sata-phy@0 {
444 reg = <0>;
445 #phy-cells = <0>;
450 #phy-cells = <0>;
456 reg = <0x413500 0x100>;
464 reg = <0x411d00 0x30>;
472 #address-cells = <0x1>;
473 #size-cells = <0x0>;
477 reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
479 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
493 #size-cells = <0>;
497 reg = <0x408a00 0x180>;
499 interrupts = <0x14>;
507 reg = <0x408e80 0x14>;
508 interrupts = <0x3>;
518 ranges = <0x0 0x103b0000 0xa000>;
522 memory-controller@0 {
524 ranges = <0x0 0x0 0xa000>;
530 reg = <0x1000 0x248>;
535 reg = <0x2000 0x300>;
540 reg = <0x6000 0xc8>;
545 reg = <0x8000 0x13c>;