Lines Matching +full:qspi +full:- +full:v1
1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2015 - 2021, Xilinx, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
18 compatible = "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254", "xlnx,zynqmp";
23 spi0 = &qspi;
28 stdout-path = "serial0:115200n8";
41 &qspi {
44 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
45 #address-cells = <1>;
46 #size-cells = <1>;
48 spi-tx-bus-width = <4>;
49 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
50 spi-max-frequency = <108000000>; /* Based on DC1 spec */