Lines Matching +full:0 +full:xf1040000

23 			bootscr-address = /bits/ 64 <0x20000000>;
29 		#size-cells = <0>;
100 		cpu0: cpu@0 {
104 			reg = <0>;
112 			reg = <0x100>;
120 			reg = <0x200>;
128 			reg = <0x300>;
136 			reg = <0x10000>;
144 			reg = <0x10100>;
152 			reg = <0x10200>;
160 			reg = <0x10300>;
168 			reg = <0x20000>;
176 			reg = <0x20100>;
184 			reg = <0x20200>;
192 			reg = <0x20300>;
200 			reg = <0x30000>;
208 			reg = <0x30100>;
216 			reg = <0x30200>;
224 			reg = <0x30300>;
231 			CPU_SLEEP_0: cpu-sleep-0 {
233 				arm,psci-suspend-param = <0x40000000>;
340 			reg = <0 0xebd00000 0 0x1000>;
341 			interrupts = <0 72 4>;
350 			reg = <0 0xebd10000 0 0x1000>;
351 			interrupts = <0 73 4>;
360 			reg = <0 0xebd20000 0 0x1000>;
361 			interrupts = <0 74 4>;
370 			reg = <0 0xebd30000 0 0x1000>;
371 			interrupts = <0 75 4>;
380 			reg = <0 0xebd40000 0 0x1000>;
381 			interrupts = <0 76 4>;
390 			reg = <0 0xebd50000 0 0x1000>;
391 			interrupts = <0 77 4>;
400 			reg = <0 0xebd60000 0 0x1000>;
401 			interrupts = <0 78 4>;
410 			reg = <0 0xebd70000 0 0x1000>;
411 			interrupts = <0 79 4>;
420 			reg = <0 0xf1980000 0 0x6000>;
421 			interrupts = <0 27 4>;
430 			reg = <0 0xf1990000 0 0x6000>;
431 			interrupts = <0 28 4>;
440 			reg = <0 0xf19e0000 0 0x1000>;
441 			interrupts = <0 39 4>, <0 39 4>;
449 			reg = <0 0xf19f0000 0 0x1000>;
450 			interrupts = <0 41 4>, <0 41 4>;
458 			reg = <0 0xe2000000 0 0x10000>,
459 			      <0 0xe2060000 0 0x200000>;
469 				reg = <0 0xe2040000 0 0x20000>;
476 			reg = <0 0xf19d0000 0 0x1000>;
477 			interrupts = <0 20 4>;
487 			reg = <0 0xf1020000 0 0x1000>;
488 			interrupts = <0 180 4>;
498 			reg = <0 0xf1940000 0 0x1000>;
499 			interrupts = <0 21 4>;
502 			#size-cells = <0>;
508 			reg = <0 0xf1950000 0 0x1000>;
509 			interrupts = <0 22 4>;
512 			#size-cells = <0>;
518 			reg = <0 0xf1948000 0 0x1000>;
520 			#size-cells = <0>;
521 			interrupts = <0 21 4>;
527 			reg = <0 0xf1958000 0 0x1000>;
529 			#size-cells = <0>;
530 			interrupts = <0 22 4>;
536 			reg = <0 0xf1010000 0 0x10000>,
537 			      <0 0xc0000000 0 0x20000000>;
538 			interrupts = <0 182 4>;
542 			cdns,trigger-address = <0xc0000000>;
548 			reg = <0 0xf1030000 0 0x1000>;
549 			interrupts = <0 183 4>;
556 			reg = <0 0xf12a0000 0 0x100>;
557 			interrupts = <0 200 4>, <0 201 4>;
559 			calibration = <0x8000>;
565 			reg = <0 0xf1040000 0 0x10000>;
566 			interrupts = <0 184 4>;
575 			reg = <0 0xf1050000 0 0x10000>;
576 			interrupts = <0 186 4>;
586 			reg = <0 0xf1920000 0 0x1000>;
587 			interrupts = <0 25 4>;
596 			reg = <0 0xf1930000 0 0x1000>;
597 			interrupts = <0 26 4>;
605 			reg = <0 0xec000000 0 0x40000>;
608 			interrupts = <0 169 4>;
615 			interrupts = <0 23 4>;
616 			reg = <0 0xf1960000 0 0x1000>;
623 			interrupts = <0 24 4>;
624 			reg = <0 0xf1970000 0 0x1000>;
631 			interrupts = <0 43 4>, <0 44 4>, <0 45 4>;
633 			reg = <0x0 0xf1dc0000 0x0 0x1000>;
639 			interrupts = <0 46 4>, <0 47 4>, <0 48 4>;
641 			reg = <0x0 0xf1dd0000 0x0 0x1000>;
647 			interrupts = <0 49 4>, <0 50 4>, <0 51 4>;
649 			reg = <0x0 0xf1de0000 0x0 0x1000>;
655 			interrupts = <0 52 4>, <0 53 4>, <0 54 4>;
657 			reg = <0x0 0xf1df0000 0x0 0x1000>;
663 			reg = <0 0xf1e00000 0 0x100>;
672 				reg = <0 0xf1b00000 0 0x10000>;
674 				interrupts = <0 29 4>, <0 29 4>, <0 33 4>, <0 98 4>;
677 				snps,quirk-frame-length-adjustment = <0x20>;
688 			reg = <0x0 0xf1e10000 0x0 0x100>;
697 				reg = <0x0 0xf1c00000 0x0 0x10000>;
699 				interrupts = <0 34 4>, <0 34 4>, <0 38 4>, <0 99 4>;
702 				snps,quirk-frame-length-adjustment = <0x20>;
713 			reg = <0 0xecc10000 0 0x10000>;
720 			reg = <0 0xecd10000 0 0x10000>;
727 			reg = <0 0xece10000 0 0x10000>;
734 			reg = <0 0xecf10000 0 0x10000>;
741 			reg = <0 0xea420000 0 0x10000>;
748 			reg = <0 0xea430000 0 0x10000>;