Lines Matching +full:am654 +full:- +full:vtm
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
26 k3_clks: clock-controller {
27 compatible = "ti,k2g-sci-clk";
28 #clock-cells = <2>;
31 k3_reset: reset-controller {
32 compatible = "ti,sci-reset";
33 #reset-cells = <2>;
38 compatible = "syscon", "simple-mfd";
40 #address-cells = <1>;
41 #size-cells = <1>;
45 compatible = "ti,am654-phy-gmii-sel";
47 #phy-cells = <1>;
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
58 compatible = "ti,am654-chipid";
64 compatible = "pinctrl-single";
67 #pinctrl-cells = <1>;
68 pinctrl-single,register-width = <32>;
69 pinctrl-single,function-mask = <0xffffffff>;
74 compatible = "pinctrl-single";
76 #pinctrl-cells = <1>;
77 pinctrl-single,register-width = <32>;
78 pinctrl-single,function-mask = <0x0000000f>;
79 /* Non-MPU Firmware usage */
85 compatible = "pinctrl-single";
87 #pinctrl-cells = <1>;
88 pinctrl-single,register-width = <32>;
89 pinctrl-single,function-mask = <0x0000000f>;
90 /* Non-MPU Firmware usage */
95 compatible = "mmio-sram";
98 #address-cells = <1>;
99 #size-cells = <1>;
103 compatible = "ti,am654-timer";
107 clock-names = "fck";
108 assigned-clocks = <&k3_clks 35 1>;
109 assigned-clock-parents = <&k3_clks 35 2>;
110 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
111 ti,timer-pwm;
112 /* Non-MPU Firmware usage */
117 compatible = "ti,am654-timer";
121 clock-names = "fck";
122 assigned-clocks = <&k3_clks 71 1>, <&k3_clks 322 0>;
123 assigned-clock-parents = <&k3_clks 71 2>, <&k3_clks 322 1>;
124 power-domains = <&k3_pds 71 TI_SCI_PD_EXCLUSIVE>;
125 ti,timer-pwm;
126 /* Non-MPU Firmware usage */
131 compatible = "ti,am654-timer";
135 clock-names = "fck";
136 assigned-clocks = <&k3_clks 72 1>;
137 assigned-clock-parents = <&k3_clks 72 2>;
138 power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>;
139 ti,timer-pwm;
140 /* Non-MPU Firmware usage */
145 compatible = "ti,am654-timer";
149 clock-names = "fck";
150 assigned-clocks = <&k3_clks 73 1>, <&k3_clks 323 0>;
151 assigned-clock-parents = <&k3_clks 73 2>, <&k3_clks 323 1>;
152 power-domains = <&k3_pds 73 TI_SCI_PD_EXCLUSIVE>;
153 ti,timer-pwm;
154 /* Non-MPU Firmware usage */
159 compatible = "ti,am654-timer";
163 clock-names = "fck";
164 assigned-clocks = <&k3_clks 74 1>;
165 assigned-clock-parents = <&k3_clks 74 2>;
166 power-domains = <&k3_pds 74 TI_SCI_PD_EXCLUSIVE>;
167 ti,timer-pwm;
168 /* Non-MPU Firmware usage */
173 compatible = "ti,am654-timer";
177 clock-names = "fck";
178 assigned-clocks = <&k3_clks 75 1>, <&k3_clks 324 0>;
179 assigned-clock-parents = <&k3_clks 75 2>, <&k3_clks 324 1>;
180 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
181 ti,timer-pwm;
182 /* Non-MPU Firmware usage */
187 compatible = "ti,am654-timer";
191 clock-names = "fck";
192 assigned-clocks = <&k3_clks 76 1>;
193 assigned-clock-parents = <&k3_clks 76 2>;
194 power-domains = <&k3_pds 76 TI_SCI_PD_EXCLUSIVE>;
195 ti,timer-pwm;
196 /* Non-MPU Firmware usage */
201 compatible = "ti,am654-timer";
205 clock-names = "fck";
206 assigned-clocks = <&k3_clks 77 1>, <&k3_clks 325 0>;
207 assigned-clock-parents = <&k3_clks 77 2>, <&k3_clks 325 1>;
208 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
209 ti,timer-pwm;
210 /* Non-MPU Firmware usage */
215 compatible = "ti,am654-timer";
219 clock-names = "fck";
220 assigned-clocks = <&k3_clks 78 1>;
221 assigned-clock-parents = <&k3_clks 78 2>;
222 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
223 ti,timer-pwm;
224 /* Non-MPU Firmware usage */
229 compatible = "ti,am654-timer";
233 clock-names = "fck";
234 assigned-clocks = <&k3_clks 79 1>, <&k3_clks 326 0>;
235 assigned-clock-parents = <&k3_clks 79 2>, <&k3_clks 326 1>;
236 power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
237 ti,timer-pwm;
238 /* Non-MPU Firmware usage */
242 compatible = "ti,j721e-uart", "ti,am654-uart";
245 clock-frequency = <48000000>;
246 current-speed = <115200>;
247 power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
249 clock-names = "fclk";
254 compatible = "ti,j721e-uart", "ti,am654-uart";
257 clock-frequency = <96000000>;
258 current-speed = <115200>;
259 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
261 clock-names = "fclk";
265 wkup_gpio_intr: interrupt-controller@42200000 {
266 compatible = "ti,sci-intr";
268 ti,intr-trigger-type = <1>;
269 interrupt-controller;
270 interrupt-parent = <&gic500>;
271 #interrupt-cells = <1>;
273 ti,sci-dev-id = <137>;
274 ti,interrupt-ranges = <16 960 16>;
278 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
280 gpio-controller;
281 #gpio-cells = <2>;
282 interrupt-parent = <&wkup_gpio_intr>;
284 interrupt-controller;
285 #interrupt-cells = <2>;
287 ti,davinci-gpio-unbanked = <0>;
288 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
290 clock-names = "gpio";
295 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
297 gpio-controller;
298 #gpio-cells = <2>;
299 interrupt-parent = <&wkup_gpio_intr>;
301 interrupt-controller;
302 #interrupt-cells = <2>;
304 ti,davinci-gpio-unbanked = <0>;
305 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
307 clock-names = "gpio";
312 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
315 #address-cells = <1>;
316 #size-cells = <0>;
317 clock-names = "fck";
319 power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;
324 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
327 #address-cells = <1>;
328 #size-cells = <0>;
329 clock-names = "fck";
331 power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
336 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
339 #address-cells = <1>;
340 #size-cells = <0>;
341 clock-names = "fck";
343 power-domains = <&k3_pds 197 TI_SCI_PD_SHARED>;
348 compatible = "simple-bus";
350 #address-cells = <2>;
351 #size-cells = <2>;
354 hbmc_mux: mux-controller@47000004 {
355 compatible = "reg-mux";
357 #mux-control-cells = <1>;
358 mux-reg-masks = <0x4 0x2>; /* HBMC select */
362 compatible = "ti,am654-hbmc";
365 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
367 assigned-clocks = <&k3_clks 102 5>;
368 assigned-clock-rates = <333333333>;
369 #address-cells = <2>;
370 #size-cells = <1>;
371 mux-controls = <&hbmc_mux 0>;
376 compatible = "ti,am654-ospi", "cdns,qspi-nor";
380 cdns,fifo-depth = <256>;
381 cdns,fifo-width = <4>;
382 cdns,trigger-address = <0x0>;
384 assigned-clocks = <&k3_clks 103 0>;
385 assigned-clock-parents = <&k3_clks 103 2>;
386 assigned-clock-rates = <166666666>;
387 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
388 #address-cells = <1>;
389 #size-cells = <0>;
394 compatible = "ti,am654-ospi", "cdns,qspi-nor";
398 cdns,fifo-depth = <256>;
399 cdns,fifo-width = <4>;
400 cdns,trigger-address = <0x0>;
402 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
403 #address-cells = <1>;
404 #size-cells = <0>;
410 compatible = "ti,am3359-tscadc";
413 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
415 assigned-clocks = <&k3_clks 0 3>;
416 assigned-clock-rates = <60000000>;
417 clock-names = "fck";
420 dma-names = "fifo0", "fifo1";
424 #io-channel-cells = <1>;
425 compatible = "ti,am3359-adc";
430 compatible = "ti,am3359-tscadc";
433 power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>;
435 assigned-clocks = <&k3_clks 1 3>;
436 assigned-clock-rates = <60000000>;
437 clock-names = "fck";
440 dma-names = "fifo0", "fifo1";
444 #io-channel-cells = <1>;
445 compatible = "ti,am3359-adc";
450 compatible = "simple-bus";
451 #address-cells = <2>;
452 #size-cells = <2>;
454 dma-coherent;
455 dma-ranges;
457 ti,sci-dev-id = <232>;
460 compatible = "ti,am654-navss-ringacc";
466 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
467 ti,num-rings = <286>;
468 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
470 ti,sci-dev-id = <235>;
471 msi-parent = <&main_udmass_inta>;
474 mcu_udmap: dma-controller@285c0000 {
475 compatible = "ti,j721e-navss-mcu-udmap";
482 reg-names = "gcfg", "rchanrt", "tchanrt",
484 msi-parent = <&main_udmass_inta>;
485 #dma-cells = <1>;
488 ti,sci-dev-id = <236>;
491 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
493 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
495 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
500 compatible = "ti,am654-secure-proxy";
501 #mbox-cells = <1>;
502 reg-names = "target_data", "rt", "scfg";
509 * firmware on non-MPU processors
515 compatible = "ti,j721e-cpsw-nuss";
516 #address-cells = <2>;
517 #size-cells = <2>;
519 reg-names = "cpsw_nuss";
521 dma-coherent;
523 clock-names = "fck";
524 power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
535 dma-names = "tx0", "tx1", "tx2", "tx3",
539 ethernet-ports {
540 #address-cells = <1>;
541 #size-cells = <0>;
545 ti,mac-only;
547 ti,syscon-efuse = <&mcu_conf 0x200>;
553 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
555 #address-cells = <1>;
556 #size-cells = <0>;
558 clock-names = "fck";
563 compatible = "ti,am65-cpts";
566 clock-names = "cpts";
567 interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
568 interrupt-names = "cpts";
569 ti,cpts-ext-ts-inputs = <4>;
570 ti,cpts-periodic-outputs = <2>;
575 compatible = "ti,j721e-r5fss";
576 ti,cluster-mode = <1>;
577 #address-cells = <1>;
578 #size-cells = <1>;
581 power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
584 compatible = "ti,j721e-r5f";
587 reg-names = "atcm", "btcm";
589 ti,sci-dev-id = <250>;
590 ti,sci-proc-ids = <0x01 0xff>;
592 firmware-name = "j7-mcu-r5f0_0-fw";
593 ti,atcm-enable = <1>;
594 ti,btcm-enable = <1>;
599 compatible = "ti,j721e-r5f";
602 reg-names = "atcm", "btcm";
604 ti,sci-dev-id = <251>;
605 ti,sci-proc-ids = <0x02 0xff>;
607 firmware-name = "j7-mcu-r5f0_1-fw";
608 ti,atcm-enable = <1>;
609 ti,btcm-enable = <1>;
618 reg-names = "m_can", "message_ram";
619 power-domains = <&k3_pds 172 TI_SCI_PD_EXCLUSIVE>;
621 clock-names = "hclk", "cclk";
624 interrupt-names = "int0", "int1";
625 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
633 reg-names = "m_can", "message_ram";
634 power-domains = <&k3_pds 173 TI_SCI_PD_EXCLUSIVE>;
636 clock-names = "hclk", "cclk";
639 interrupt-names = "int0", "int1";
640 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
645 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
648 #address-cells = <1>;
649 #size-cells = <0>;
650 power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
656 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
659 #address-cells = <1>;
660 #size-cells = <0>;
661 power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
667 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
670 #address-cells = <1>;
671 #size-cells = <0>;
672 power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
677 wkup_vtm0: temperature-sensor@42040000 {
678 compatible = "ti,j721e-vtm";
682 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
683 #thermal-sensor-cells = <1>;
687 compatible = "ti,j721e-esm";
689 ti,esm-pins = <95>;
690 bootph-pre-ram;