Lines Matching +full:am3352 +full:- +full:ecap
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
31 compatible = "arm,gic-v3";
32 #address-cells = <2>;
33 #size-cells = <2>;
35 #interrupt-cells = <3>;
36 interrupt-controller;
48 gic_its: msi-controller@1820000 {
49 compatible = "arm,gic-v3-its";
51 socionext,synquacer-pre-its = <0x1000000 0x400000>;
52 msi-controller;
53 #msi-cells = <1>;
58 compatible = "ti,phy-am654-serdes";
60 reg-names = "serdes";
61 #phy-cells = <2>;
62 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
64 clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
65 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
66 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
67 ti,serdes-clk = <&serdes0_clk>;
68 #clock-cells = <1>;
69 mux-controls = <&serdes_mux 0>;
73 compatible = "ti,phy-am654-serdes";
75 reg-names = "serdes";
76 #phy-cells = <2>;
77 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
79 clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";
80 assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
81 assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;
82 ti,serdes-clk = <&serdes1_clk>;
83 #clock-cells = <1>;
84 mux-controls = <&serdes_mux 1>;
88 compatible = "ti,am654-uart";
91 clock-frequency = <48000000>;
92 current-speed = <115200>;
93 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
98 compatible = "ti,am654-uart";
101 clock-frequency = <48000000>;
102 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
107 compatible = "ti,am654-uart";
110 clock-frequency = <48000000>;
111 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
116 compatible = "ti,am654-sa2ul";
118 power-domains = <&k3_pds 136 TI_SCI_PD_SHARED>;
119 #address-cells = <2>;
120 #size-cells = <2>;
125 dma-names = "tx", "rx1", "rx2";
128 compatible = "inside-secure,safexcel-eip76";
131 status = "disabled"; /* Used by OP-TEE */
137 compatible = "pinctrl-single";
139 #pinctrl-cells = <1>;
140 pinctrl-single,register-width = <32>;
141 pinctrl-single,function-mask = <0x0000001ff>;
146 compatible = "pinctrl-single";
148 #pinctrl-cells = <1>;
149 pinctrl-single,register-width = <32>;
150 pinctrl-single,function-mask = <0x0000000f>;
154 compatible = "pinctrl-single";
156 #pinctrl-cells = <1>;
157 pinctrl-single,register-width = <32>;
158 pinctrl-single,function-mask = <0xffffffff>;
162 compatible = "pinctrl-single";
164 #pinctrl-cells = <1>;
165 pinctrl-single,register-width = <32>;
166 pinctrl-single,function-mask = <0xffffffff>;
170 compatible = "ti,am654-i2c", "ti,omap4-i2c";
173 #address-cells = <1>;
174 #size-cells = <0>;
175 clock-names = "fck";
177 power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
182 compatible = "ti,am654-i2c", "ti,omap4-i2c";
185 #address-cells = <1>;
186 #size-cells = <0>;
187 clock-names = "fck";
189 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
194 compatible = "ti,am654-i2c", "ti,omap4-i2c";
197 #address-cells = <1>;
198 #size-cells = <0>;
199 clock-names = "fck";
201 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
206 compatible = "ti,am654-i2c", "ti,omap4-i2c";
209 #address-cells = <1>;
210 #size-cells = <0>;
211 clock-names = "fck";
213 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
218 compatible = "ti,am654-ecap", "ti,am3352-ecap";
219 #pwm-cells = <3>;
221 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
223 clock-names = "fck";
228 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
232 power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
233 #address-cells = <1>;
234 #size-cells = <0>;
236 dma-names = "tx0", "rx0";
241 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
245 power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>;
246 #address-cells = <1>;
247 #size-cells = <0>;
248 assigned-clocks = <&k3_clks 137 1>;
249 assigned-clock-rates = <48000000>;
254 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
258 power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
259 #address-cells = <1>;
260 #size-cells = <0>;
265 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
269 power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
270 #address-cells = <1>;
271 #size-cells = <0>;
276 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
280 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
281 #address-cells = <1>;
282 #size-cells = <0>;
287 compatible = "ti,am654-timer";
291 clock-names = "fck";
292 assigned-clocks = <&k3_clks 23 0>;
293 assigned-clock-parents = <&k3_clks 23 1>;
294 power-domains = <&k3_pds 23 TI_SCI_PD_EXCLUSIVE>;
295 ti,timer-pwm;
299 compatible = "ti,am654-timer";
303 clock-names = "fck";
304 assigned-clocks = <&k3_clks 24 0>;
305 assigned-clock-parents = <&k3_clks 24 1>;
306 power-domains = <&k3_pds 24 TI_SCI_PD_EXCLUSIVE>;
307 ti,timer-pwm;
311 compatible = "ti,am654-timer";
315 clock-names = "fck";
316 assigned-clocks = <&k3_clks 27 0>;
317 assigned-clock-parents = <&k3_clks 27 1>;
318 power-domains = <&k3_pds 27 TI_SCI_PD_EXCLUSIVE>;
319 ti,timer-pwm;
323 compatible = "ti,am654-timer";
327 clock-names = "fck";
328 assigned-clocks = <&k3_clks 28 0>;
329 assigned-clock-parents = <&k3_clks 28 1>;
330 power-domains = <&k3_pds 28 TI_SCI_PD_EXCLUSIVE>;
331 ti,timer-pwm;
335 compatible = "ti,am654-timer";
339 clock-names = "fck";
340 assigned-clocks = <&k3_clks 29 0>;
341 assigned-clock-parents = <&k3_clks 29 1>;
342 power-domains = <&k3_pds 29 TI_SCI_PD_EXCLUSIVE>;
343 ti,timer-pwm;
347 compatible = "ti,am654-timer";
351 clock-names = "fck";
352 assigned-clocks = <&k3_clks 30 0>;
353 assigned-clock-parents = <&k3_clks 30 1>;
354 power-domains = <&k3_pds 30 TI_SCI_PD_EXCLUSIVE>;
355 ti,timer-pwm;
359 compatible = "ti,am654-timer";
363 assigned-clocks = <&k3_clks 31 0>;
364 assigned-clock-parents = <&k3_clks 31 1>;
365 clock-names = "fck";
366 power-domains = <&k3_pds 31 TI_SCI_PD_EXCLUSIVE>;
367 ti,timer-pwm;
371 compatible = "ti,am654-timer";
375 clock-names = "fck";
376 assigned-clocks = <&k3_clks 32 0>;
377 assigned-clock-parents = <&k3_clks 32 1>;
378 power-domains = <&k3_pds 32 TI_SCI_PD_EXCLUSIVE>;
379 ti,timer-pwm;
383 compatible = "ti,am654-timer";
387 clock-names = "fck";
388 assigned-clocks = <&k3_clks 33 0>;
389 assigned-clock-parents = <&k3_clks 33 1>;
390 power-domains = <&k3_pds 33 TI_SCI_PD_EXCLUSIVE>;
391 ti,timer-pwm;
395 compatible = "ti,am654-timer";
399 clock-names = "fck";
400 assigned-clocks = <&k3_clks 34 0>;
401 assigned-clock-parents = <&k3_clks 34 1>;
402 power-domains = <&k3_pds 34 TI_SCI_PD_EXCLUSIVE>;
403 ti,timer-pwm;
407 compatible = "ti,am654-timer";
411 clock-names = "fck";
412 assigned-clocks = <&k3_clks 25 0>;
413 assigned-clock-parents = <&k3_clks 25 1>;
414 power-domains = <&k3_pds 25 TI_SCI_PD_EXCLUSIVE>;
415 ti,timer-pwm;
419 compatible = "ti,am654-timer";
423 clock-names = "fck";
424 assigned-clocks = <&k3_clks 26 0>;
425 assigned-clock-parents = <&k3_clks 26 1>;
426 power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
427 ti,timer-pwm;
431 compatible = "ti,am654-sdhci-5.1";
433 power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
435 clock-names = "clk_ahb", "clk_xin";
437 mmc-ddr-1_8v;
438 mmc-hs200-1_8v;
439 ti,otap-del-sel-legacy = <0x0>;
440 ti,otap-del-sel-mmc-hs = <0x0>;
441 ti,otap-del-sel-sd-hs = <0x0>;
442 ti,otap-del-sel-sdr12 = <0x0>;
443 ti,otap-del-sel-sdr25 = <0x0>;
444 ti,otap-del-sel-sdr50 = <0x8>;
445 ti,otap-del-sel-sdr104 = <0x7>;
446 ti,otap-del-sel-ddr50 = <0x5>;
447 ti,otap-del-sel-ddr52 = <0x5>;
448 ti,otap-del-sel-hs200 = <0x5>;
449 ti,otap-del-sel-hs400 = <0x0>;
450 ti,trm-icp = <0x8>;
451 dma-coherent;
456 compatible = "ti,am654-sdhci-5.1";
458 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
460 clock-names = "clk_ahb", "clk_xin";
462 ti,otap-del-sel-legacy = <0x0>;
463 ti,otap-del-sel-mmc-hs = <0x0>;
464 ti,otap-del-sel-sd-hs = <0x0>;
465 ti,otap-del-sel-sdr12 = <0x0>;
466 ti,otap-del-sel-sdr25 = <0x0>;
467 ti,otap-del-sel-sdr50 = <0x8>;
468 ti,otap-del-sel-sdr104 = <0x7>;
469 ti,otap-del-sel-ddr50 = <0x4>;
470 ti,otap-del-sel-ddr52 = <0x4>;
471 ti,otap-del-sel-hs200 = <0x7>;
472 ti,clkbuf-sel = <0x7>;
473 ti,trm-icp = <0x8>;
474 dma-coherent;
478 scm_conf: scm-conf@100000 {
479 compatible = "syscon", "simple-mfd";
481 #address-cells = <1>;
482 #size-cells = <1>;
495 serdes_mux: mux-controller {
496 compatible = "mmio-mux";
497 #mux-control-cells = <1>;
498 mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
502 dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
503 compatible = "ti,am654-dss-oldi-io-ctrl", "syscon";
507 ehrpwm_tbclk: clock-controller@4140 {
508 compatible = "ti,am654-ehrpwm-tbclk";
510 #clock-cells = <1>;
515 compatible = "ti,am654-dwc3";
517 #address-cells = <1>;
518 #size-cells = <1>;
521 dma-coherent;
522 power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
524 assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
525 assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
534 interrupt-names = "peripheral",
537 maximum-speed = "high-speed";
540 phy-names = "usb2-phy";
546 compatible = "ti,am654-usb2", "ti,omap-usb2";
548 syscon-phy-power = <&scm_conf 0x4000>;
550 clock-names = "wkupclk", "refclk";
551 #phy-cells = <0>;
555 compatible = "ti,am654-dwc3";
557 #address-cells = <1>;
558 #size-cells = <1>;
561 dma-coherent;
562 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
564 assigned-clocks = <&k3_clks 152 2>;
565 assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
573 interrupt-names = "peripheral",
576 maximum-speed = "high-speed";
579 phy-names = "usb2-phy";
584 compatible = "ti,am654-usb2", "ti,omap-usb2";
586 syscon-phy-power = <&scm_conf 0x4020>;
588 clock-names = "wkupclk", "refclk";
589 #phy-cells = <0>;
592 intr_main_gpio: interrupt-controller@a00000 {
593 compatible = "ti,sci-intr";
595 ti,intr-trigger-type = <1>;
596 interrupt-controller;
597 interrupt-parent = <&gic500>;
598 #interrupt-cells = <1>;
600 ti,sci-dev-id = <100>;
601 ti,interrupt-ranges = <0 392 32>;
605 compatible = "simple-bus";
606 #address-cells = <2>;
607 #size-cells = <2>;
609 dma-coherent;
610 dma-ranges;
612 ti,sci-dev-id = <118>;
614 intr_main_navss: interrupt-controller@310e0000 {
615 compatible = "ti,sci-intr";
617 ti,intr-trigger-type = <4>;
618 interrupt-controller;
619 interrupt-parent = <&gic500>;
620 #interrupt-cells = <1>;
622 ti,sci-dev-id = <182>;
623 ti,interrupt-ranges = <0 64 64>,
627 inta_main_udmass: interrupt-controller@33d00000 {
628 compatible = "ti,sci-inta";
630 interrupt-controller;
631 interrupt-parent = <&intr_main_navss>;
632 msi-controller;
633 #interrupt-cells = <0>;
635 ti,sci-dev-id = <179>;
636 ti,interrupt-ranges = <0 0 256>;
640 compatible = "ti,am654-secure-proxy";
641 #mbox-cells = <1>;
642 reg-names = "target_data", "rt", "scfg";
646 interrupt-names = "rx_011";
651 compatible = "ti,am654-hwspinlock";
653 #hwlock-cells = <1>;
657 compatible = "ti,am654-mailbox";
659 #mbox-cells = <1>;
660 ti,mbox-num-users = <4>;
661 ti,mbox-num-fifos = <16>;
662 interrupt-parent = <&intr_main_navss>;
667 compatible = "ti,am654-mailbox";
669 #mbox-cells = <1>;
670 ti,mbox-num-users = <4>;
671 ti,mbox-num-fifos = <16>;
672 interrupt-parent = <&intr_main_navss>;
677 compatible = "ti,am654-mailbox";
679 #mbox-cells = <1>;
680 ti,mbox-num-users = <4>;
681 ti,mbox-num-fifos = <16>;
682 interrupt-parent = <&intr_main_navss>;
687 compatible = "ti,am654-mailbox";
689 #mbox-cells = <1>;
690 ti,mbox-num-users = <4>;
691 ti,mbox-num-fifos = <16>;
692 interrupt-parent = <&intr_main_navss>;
697 compatible = "ti,am654-mailbox";
699 #mbox-cells = <1>;
700 ti,mbox-num-users = <4>;
701 ti,mbox-num-fifos = <16>;
702 interrupt-parent = <&intr_main_navss>;
707 compatible = "ti,am654-mailbox";
709 #mbox-cells = <1>;
710 ti,mbox-num-users = <4>;
711 ti,mbox-num-fifos = <16>;
712 interrupt-parent = <&intr_main_navss>;
717 compatible = "ti,am654-mailbox";
719 #mbox-cells = <1>;
720 ti,mbox-num-users = <4>;
721 ti,mbox-num-fifos = <16>;
722 interrupt-parent = <&intr_main_navss>;
727 compatible = "ti,am654-mailbox";
729 #mbox-cells = <1>;
730 ti,mbox-num-users = <4>;
731 ti,mbox-num-fifos = <16>;
732 interrupt-parent = <&intr_main_navss>;
737 compatible = "ti,am654-mailbox";
739 #mbox-cells = <1>;
740 ti,mbox-num-users = <4>;
741 ti,mbox-num-fifos = <16>;
742 interrupt-parent = <&intr_main_navss>;
747 compatible = "ti,am654-mailbox";
749 #mbox-cells = <1>;
750 ti,mbox-num-users = <4>;
751 ti,mbox-num-fifos = <16>;
752 interrupt-parent = <&intr_main_navss>;
757 compatible = "ti,am654-mailbox";
759 #mbox-cells = <1>;
760 ti,mbox-num-users = <4>;
761 ti,mbox-num-fifos = <16>;
762 interrupt-parent = <&intr_main_navss>;
767 compatible = "ti,am654-mailbox";
769 #mbox-cells = <1>;
770 ti,mbox-num-users = <4>;
771 ti,mbox-num-fifos = <16>;
772 interrupt-parent = <&intr_main_navss>;
777 compatible = "ti,am654-navss-ringacc";
783 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
784 ti,num-rings = <818>;
785 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
787 ti,sci-dev-id = <187>;
788 msi-parent = <&inta_main_udmass>;
791 main_udmap: dma-controller@31150000 {
792 compatible = "ti,am654-navss-main-udmap";
799 reg-names = "gcfg", "rchanrt", "tchanrt",
801 msi-parent = <&inta_main_udmass>;
802 #dma-cells = <1>;
805 ti,sci-dev-id = <188>;
808 ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
810 ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
812 ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
816 compatible = "ti,am65-cpts";
818 reg-names = "cpts";
820 clock-names = "cpts";
821 interrupts-extended = <&intr_main_navss 391>;
822 interrupt-names = "cpts";
823 ti,cpts-periodic-outputs = <6>;
824 ti,cpts-ext-ts-inputs = <8>;
826 main_cpts_mux: refclk-mux {
827 #clock-cells = <0>;
832 assigned-clocks = <&main_cpts_mux>;
833 assigned-clock-parents = <&k3_clks 118 5>;
839 compatible = "ti,am654-gpio", "ti,keystone-gpio";
841 gpio-controller;
842 #gpio-cells = <2>;
843 interrupt-parent = <&intr_main_gpio>;
845 interrupt-controller;
846 #interrupt-cells = <2>;
848 ti,davinci-gpio-unbanked = <0>;
850 clock-names = "gpio";
854 compatible = "ti,am654-gpio", "ti,keystone-gpio";
856 gpio-controller;
857 #gpio-cells = <2>;
858 interrupt-parent = <&intr_main_gpio>;
860 interrupt-controller;
861 #interrupt-cells = <2>;
863 ti,davinci-gpio-unbanked = <0>;
865 clock-names = "gpio";
869 compatible = "ti,am654-pcie-rc";
871 reg-names = "app", "dbics", "config", "atu";
872 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
873 #address-cells = <3>;
874 #size-cells = <2>;
877 ti,syscon-pcie-id = <&scm_conf 0x210>;
878 ti,syscon-pcie-mode = <&scm_conf 0x4060>;
879 bus-range = <0x0 0xff>;
880 num-viewport = <16>;
881 max-link-speed = <2>;
882 dma-coherent;
884 msi-map = <0x0 &gic_its 0x0 0x10000>;
889 pcie0_ep: pcie-ep@5500000 {
890 compatible = "ti,am654-pcie-ep";
892 reg-names = "app", "dbics", "addr_space", "atu";
893 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
894 ti,syscon-pcie-mode = <&scm_conf 0x4060>;
895 num-ib-windows = <16>;
896 num-ob-windows = <16>;
897 max-link-speed = <2>;
898 dma-coherent;
904 compatible = "ti,am654-pcie-rc";
906 reg-names = "app", "dbics", "config", "atu";
907 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
908 #address-cells = <3>;
909 #size-cells = <2>;
912 ti,syscon-pcie-id = <&scm_conf 0x210>;
913 ti,syscon-pcie-mode = <&scm_conf 0x4070>;
914 bus-range = <0x0 0xff>;
915 num-viewport = <16>;
916 max-link-speed = <2>;
917 dma-coherent;
919 msi-map = <0x0 &gic_its 0x10000 0x10000>;
924 pcie1_ep: pcie-ep@5600000 {
925 compatible = "ti,am654-pcie-ep";
927 reg-names = "app", "dbics", "addr_space", "atu";
928 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
929 ti,syscon-pcie-mode = <&scm_conf 0x4070>;
930 num-ib-windows = <16>;
931 num-ob-windows = <16>;
932 max-link-speed = <2>;
933 dma-coherent;
939 compatible = "ti,am33xx-mcasp-audio";
942 reg-names = "mpu","dat";
945 interrupt-names = "tx", "rx";
948 dma-names = "tx", "rx";
951 clock-names = "fck";
952 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
957 compatible = "ti,am33xx-mcasp-audio";
960 reg-names = "mpu","dat";
963 interrupt-names = "tx", "rx";
966 dma-names = "tx", "rx";
969 clock-names = "fck";
970 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
975 compatible = "ti,am33xx-mcasp-audio";
978 reg-names = "mpu","dat";
981 interrupt-names = "tx", "rx";
984 dma-names = "tx", "rx";
987 clock-names = "fck";
988 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
993 compatible = "ti,am654-cal";
996 reg-names = "cal_top",
999 ti,camerrx-control = <&scm_conf 0x40c0>;
1000 clock-names = "fck";
1002 power-domains = <&k3_pds 2 TI_SCI_PD_EXCLUSIVE>;
1005 #address-cells = <1>;
1006 #size-cells = <0>;
1015 compatible = "ti,am65x-dss";
1023 reg-names = "common", "vidl1", "vid",
1026 ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
1028 power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
1033 clock-names = "fck", "vp1", "vp2";
1037 * DIV1. See "Figure 12-3365. DSS Integration"
1040 assigned-clocks = <&k3_clks 67 2>;
1041 assigned-clock-parents = <&k3_clks 67 5>;
1045 dma-coherent;
1048 #address-cells = <1>;
1049 #size-cells = <0>;
1054 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1055 #pwm-cells = <3>;
1057 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
1059 clock-names = "tbclk", "fck";
1064 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1065 #pwm-cells = <3>;
1067 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
1069 clock-names = "tbclk", "fck";
1074 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1075 #pwm-cells = <3>;
1077 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
1079 clock-names = "tbclk", "fck";
1084 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1085 #pwm-cells = <3>;
1087 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
1089 clock-names = "tbclk", "fck";
1094 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1095 #pwm-cells = <3>;
1097 power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
1099 clock-names = "tbclk", "fck";
1104 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1105 #pwm-cells = <3>;
1107 power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
1109 clock-names = "tbclk", "fck";
1114 compatible = "ti,am654-icssg";
1116 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
1117 #address-cells = <1>;
1118 #size-cells = <1>;
1125 reg-names = "dram0", "dram1",
1130 compatible = "ti,pruss-cfg", "syscon";
1132 #address-cells = <1>;
1133 #size-cells = <1>;
1137 #address-cells = <1>;
1138 #size-cells = <0>;
1140 icssg0_coreclk_mux: coreclk-mux@3c {
1142 #clock-cells = <0>;
1145 assigned-clocks = <&icssg0_coreclk_mux>;
1146 assigned-clock-parents = <&k3_clks 62 3>;
1149 icssg0_iepclk_mux: iepclk-mux@30 {
1151 #clock-cells = <0>;
1154 assigned-clocks = <&icssg0_iepclk_mux>;
1155 assigned-clock-parents = <&icssg0_coreclk_mux>;
1161 compatible = "ti,am654-icss-iep";
1167 compatible = "ti,am654-icss-iep";
1172 icssg0_mii_rt: mii-rt@32000 {
1173 compatible = "ti,pruss-mii", "syscon";
1177 icssg0_mii_g_rt: mii-g-rt@33000 {
1178 compatible = "ti,pruss-mii-g", "syscon";
1182 icssg0_intc: interrupt-controller@20000 {
1183 compatible = "ti,icssg-intc";
1185 interrupt-controller;
1186 #interrupt-cells = <3>;
1195 interrupt-names = "host_intr0", "host_intr1",
1202 compatible = "ti,am654-pru";
1206 reg-names = "iram", "control", "debug";
1207 firmware-name = "am65x-pru0_0-fw";
1211 compatible = "ti,am654-rtu";
1215 reg-names = "iram", "control", "debug";
1216 firmware-name = "am65x-rtu0_0-fw";
1220 compatible = "ti,am654-tx-pru";
1224 reg-names = "iram", "control", "debug";
1225 firmware-name = "am65x-txpru0_0-fw";
1229 compatible = "ti,am654-pru";
1233 reg-names = "iram", "control", "debug";
1234 firmware-name = "am65x-pru0_1-fw";
1238 compatible = "ti,am654-rtu";
1242 reg-names = "iram", "control", "debug";
1243 firmware-name = "am65x-rtu0_1-fw";
1247 compatible = "ti,am654-tx-pru";
1251 reg-names = "iram", "control", "debug";
1252 firmware-name = "am65x-txpru0_1-fw";
1259 clock-names = "fck";
1260 #address-cells = <1>;
1261 #size-cells = <0>;
1268 compatible = "ti,am654-icssg";
1270 power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
1271 #address-cells = <1>;
1272 #size-cells = <1>;
1279 reg-names = "dram0", "dram1",
1284 compatible = "ti,pruss-cfg", "syscon";
1286 #address-cells = <1>;
1287 #size-cells = <1>;
1291 #address-cells = <1>;
1292 #size-cells = <0>;
1294 icssg1_coreclk_mux: coreclk-mux@3c {
1296 #clock-cells = <0>;
1299 assigned-clocks = <&icssg1_coreclk_mux>;
1300 assigned-clock-parents = <&k3_clks 63 3>;
1303 icssg1_iepclk_mux: iepclk-mux@30 {
1305 #clock-cells = <0>;
1308 assigned-clocks = <&icssg1_iepclk_mux>;
1309 assigned-clock-parents = <&icssg1_coreclk_mux>;
1315 compatible = "ti,am654-icss-iep";
1321 compatible = "ti,am654-icss-iep";
1326 icssg1_mii_rt: mii-rt@32000 {
1327 compatible = "ti,pruss-mii", "syscon";
1331 icssg1_mii_g_rt: mii-g-rt@33000 {
1332 compatible = "ti,pruss-mii-g", "syscon";
1336 icssg1_intc: interrupt-controller@20000 {
1337 compatible = "ti,icssg-intc";
1339 interrupt-controller;
1340 #interrupt-cells = <3>;
1349 interrupt-names = "host_intr0", "host_intr1",
1356 compatible = "ti,am654-pru";
1360 reg-names = "iram", "control", "debug";
1361 firmware-name = "am65x-pru1_0-fw";
1365 compatible = "ti,am654-rtu";
1369 reg-names = "iram", "control", "debug";
1370 firmware-name = "am65x-rtu1_0-fw";
1374 compatible = "ti,am654-tx-pru";
1378 reg-names = "iram", "control", "debug";
1379 firmware-name = "am65x-txpru1_0-fw";
1383 compatible = "ti,am654-pru";
1387 reg-names = "iram", "control", "debug";
1388 firmware-name = "am65x-pru1_1-fw";
1392 compatible = "ti,am654-rtu";
1396 reg-names = "iram", "control", "debug";
1397 firmware-name = "am65x-rtu1_1-fw";
1401 compatible = "ti,am654-tx-pru";
1405 reg-names = "iram", "control", "debug";
1406 firmware-name = "am65x-txpru1_1-fw";
1413 clock-names = "fck";
1414 #address-cells = <1>;
1415 #size-cells = <0>;
1422 compatible = "ti,am654-icssg";
1424 power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
1425 #address-cells = <1>;
1426 #size-cells = <1>;
1433 reg-names = "dram0", "dram1",
1438 compatible = "ti,pruss-cfg", "syscon";
1440 #address-cells = <1>;
1441 #size-cells = <1>;
1445 #address-cells = <1>;
1446 #size-cells = <0>;
1448 icssg2_coreclk_mux: coreclk-mux@3c {
1450 #clock-cells = <0>;
1453 assigned-clocks = <&icssg2_coreclk_mux>;
1454 assigned-clock-parents = <&k3_clks 64 3>;
1457 icssg2_iepclk_mux: iepclk-mux@30 {
1459 #clock-cells = <0>;
1462 assigned-clocks = <&icssg2_iepclk_mux>;
1463 assigned-clock-parents = <&icssg2_coreclk_mux>;
1469 compatible = "ti,am654-icss-iep";
1475 compatible = "ti,am654-icss-iep";
1480 icssg2_mii_rt: mii-rt@32000 {
1481 compatible = "ti,pruss-mii", "syscon";
1485 icssg2_mii_g_rt: mii-g-rt@33000 {
1486 compatible = "ti,pruss-mii-g", "syscon";
1490 icssg2_intc: interrupt-controller@20000 {
1491 compatible = "ti,icssg-intc";
1493 interrupt-controller;
1494 #interrupt-cells = <3>;
1503 interrupt-names = "host_intr0", "host_intr1",
1510 compatible = "ti,am654-pru";
1514 reg-names = "iram", "control", "debug";
1515 firmware-name = "am65x-pru2_0-fw";
1519 compatible = "ti,am654-rtu";
1523 reg-names = "iram", "control", "debug";
1524 firmware-name = "am65x-rtu2_0-fw";
1528 compatible = "ti,am654-tx-pru";
1532 reg-names = "iram", "control", "debug";
1533 firmware-name = "am65x-txpru2_0-fw";
1537 compatible = "ti,am654-pru";
1541 reg-names = "iram", "control", "debug";
1542 firmware-name = "am65x-pru2_1-fw";
1546 compatible = "ti,am654-rtu";
1550 reg-names = "iram", "control", "debug";
1551 firmware-name = "am65x-rtu2_1-fw";
1555 compatible = "ti,am654-tx-pru";
1559 reg-names = "iram", "control", "debug";
1560 firmware-name = "am65x-txpru2_1-fw";
1567 clock-names = "fck";
1568 #address-cells = <1>;
1569 #size-cells = <0>;