Lines Matching +full:timer +full:- +full:pwm
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
29 interrupt-controller;
36 gic_its: msi-controller@1820000 {
37 compatible = "arm,gic-v3-its";
39 socionext,synquacer-pre-its = <0x1000000 0x400000>;
40 msi-controller;
41 #msi-cells = <1>;
46 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
48 #address-cells = <1>;
49 #size-cells = <1>;
53 compatible = "ti,am654-phy-gmii-sel";
55 #phy-cells = <1>;
58 epwm_tbclk: clock-controller@4130 {
59 compatible = "ti,am62-epwm-tbclk";
61 #clock-cells = <1>;
66 compatible = "simple-bus";
67 #address-cells = <2>;
68 #size-cells = <2>;
69 dma-ranges;
72 ti,sci-dev-id = <25>;
75 compatible = "ti,am654-secure-proxy";
79 reg-names = "target_data", "rt", "scfg";
80 #mbox-cells = <1>;
81 interrupt-names = "rx_012";
85 inta_main_dmss: interrupt-controller@48000000 {
86 compatible = "ti,sci-inta";
88 #interrupt-cells = <0>;
89 interrupt-controller;
90 interrupt-parent = <&gic500>;
91 msi-controller;
93 ti,sci-dev-id = <28>;
94 ti,interrupt-ranges = <6 70 34>;
95 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
98 main_bcdma: dma-controller@485c0100 {
99 compatible = "ti,am64-dmss-bcdma";
109 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
111 msi-parent = <&inta_main_dmss>;
112 #dma-cells = <3>;
114 ti,sci-dev-id = <26>;
115 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
116 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
117 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
120 main_pktdma: dma-controller@485c0000 {
121 compatible = "ti,am64-dmss-pktdma";
130 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
132 msi-parent = <&inta_main_dmss>;
133 #dma-cells = <2>;
135 ti,sci-dev-id = <30>;
136 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
140 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
144 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
150 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
158 compatible = "simple-bus";
159 #address-cells = <2>;
160 #size-cells = <2>;
161 dma-ranges;
164 ti,sci-dev-id = <198>;
166 inta_main_dmss_csi: interrupt-controller@4e0a0000 {
167 compatible = "ti,sci-inta";
169 #interrupt-cells = <0>;
170 interrupt-controller;
171 interrupt-parent = <&gic500>;
172 msi-controller;
174 ti,sci-dev-id = <200>;
175 ti,interrupt-ranges = <0 237 8>;
176 ti,unmapped-event-sources = <&main_bcdma_csi>;
177 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
180 main_bcdma_csi: dma-controller@4e230000 {
181 compatible = "ti,am62a-dmss-bcdma-csirx";
185 reg-names = "gcfg", "rchanrt", "ringrt";
186 msi-parent = <&inta_main_dmss_csi>;
187 #dma-cells = <3>;
189 ti,sci-dev-id = <199>;
190 ti,sci-rm-range-rchan = <0x21>;
191 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
195 dmsc: system-controller@44043000 {
196 compatible = "ti,k2g-sci";
198 reg-names = "debug_messages";
199 ti,host-id = <12>;
200 mbox-names = "rx", "tx";
204 k3_pds: power-controller {
205 compatible = "ti,sci-pm-domain";
206 #power-domain-cells = <2>;
209 k3_clks: clock-controller {
210 compatible = "ti,k2g-sci-clk";
211 #clock-cells = <2>;
214 k3_reset: reset-controller {
215 compatible = "ti,sci-reset";
216 #reset-cells = <2>;
221 compatible = "ti,am654-secure-proxy";
222 #mbox-cells = <1>;
223 reg-names = "target_data", "rt", "scfg";
230 * firmware on non-MPU processors
236 compatible = "pinctrl-single";
238 #pinctrl-cells = <1>;
239 pinctrl-single,register-width = <32>;
240 pinctrl-single,function-mask = <0xffffffff>;
243 main_timer0: timer@2400000 {
244 compatible = "ti,am654-timer";
248 clock-names = "fck";
249 assigned-clocks = <&k3_clks 36 2>;
250 assigned-clock-parents = <&k3_clks 36 3>;
251 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
252 ti,timer-pwm;
255 main_timer1: timer@2410000 {
256 compatible = "ti,am654-timer";
260 clock-names = "fck";
261 assigned-clocks = <&k3_clks 37 2>;
262 assigned-clock-parents = <&k3_clks 37 3>;
263 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
264 ti,timer-pwm;
267 main_timer2: timer@2420000 {
268 compatible = "ti,am654-timer";
272 clock-names = "fck";
273 assigned-clocks = <&k3_clks 38 2>;
274 assigned-clock-parents = <&k3_clks 38 3>;
275 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
276 ti,timer-pwm;
279 main_timer3: timer@2430000 {
280 compatible = "ti,am654-timer";
284 clock-names = "fck";
285 assigned-clocks = <&k3_clks 39 2>;
286 assigned-clock-parents = <&k3_clks 39 3>;
287 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
288 ti,timer-pwm;
291 main_timer4: timer@2440000 {
292 compatible = "ti,am654-timer";
296 clock-names = "fck";
297 assigned-clocks = <&k3_clks 40 2>;
298 assigned-clock-parents = <&k3_clks 40 3>;
299 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
300 ti,timer-pwm;
303 main_timer5: timer@2450000 {
304 compatible = "ti,am654-timer";
308 clock-names = "fck";
309 assigned-clocks = <&k3_clks 41 2>;
310 assigned-clock-parents = <&k3_clks 41 3>;
311 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
312 ti,timer-pwm;
315 main_timer6: timer@2460000 {
316 compatible = "ti,am654-timer";
320 clock-names = "fck";
321 assigned-clocks = <&k3_clks 42 2>;
322 assigned-clock-parents = <&k3_clks 42 3>;
323 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
324 ti,timer-pwm;
327 main_timer7: timer@2470000 {
328 compatible = "ti,am654-timer";
332 clock-names = "fck";
333 assigned-clocks = <&k3_clks 43 2>;
334 assigned-clock-parents = <&k3_clks 43 3>;
335 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
336 ti,timer-pwm;
340 compatible = "ti,am64-uart", "ti,am654-uart";
343 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
345 clock-names = "fclk";
350 compatible = "ti,am64-uart", "ti,am654-uart";
353 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
355 clock-names = "fclk";
360 compatible = "ti,am64-uart", "ti,am654-uart";
363 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
365 clock-names = "fclk";
370 compatible = "ti,am64-uart", "ti,am654-uart";
373 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
375 clock-names = "fclk";
380 compatible = "ti,am64-uart", "ti,am654-uart";
383 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
385 clock-names = "fclk";
390 compatible = "ti,am64-uart", "ti,am654-uart";
393 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
395 clock-names = "fclk";
400 compatible = "ti,am64-uart", "ti,am654-uart";
403 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
405 clock-names = "fclk";
410 compatible = "ti,am64-i2c", "ti,omap4-i2c";
413 #address-cells = <1>;
414 #size-cells = <0>;
415 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
417 clock-names = "fck";
422 compatible = "ti,am64-i2c", "ti,omap4-i2c";
425 #address-cells = <1>;
426 #size-cells = <0>;
427 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
429 clock-names = "fck";
434 compatible = "ti,am64-i2c", "ti,omap4-i2c";
437 #address-cells = <1>;
438 #size-cells = <0>;
439 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
441 clock-names = "fck";
446 compatible = "ti,am64-i2c", "ti,omap4-i2c";
449 #address-cells = <1>;
450 #size-cells = <0>;
451 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
453 clock-names = "fck";
458 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
461 #address-cells = <1>;
462 #size-cells = <0>;
463 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
469 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
472 #address-cells = <1>;
473 #size-cells = <0>;
474 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
480 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
483 #address-cells = <1>;
484 #size-cells = <0>;
485 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
490 main_gpio_intr: interrupt-controller@a00000 {
491 compatible = "ti,sci-intr";
493 ti,intr-trigger-type = <1>;
494 interrupt-controller;
495 interrupt-parent = <&gic500>;
496 #interrupt-cells = <1>;
498 ti,sci-dev-id = <3>;
499 ti,interrupt-ranges = <0 32 16>;
504 compatible = "ti,am64-gpio", "ti,keystone-gpio";
506 gpio-controller;
507 #gpio-cells = <2>;
508 interrupt-parent = <&main_gpio_intr>;
511 interrupt-controller;
512 #interrupt-cells = <2>;
514 ti,davinci-gpio-unbanked = <0>;
515 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
517 clock-names = "gpio";
522 compatible = "ti,am64-gpio", "ti,keystone-gpio";
524 gpio-controller;
525 #gpio-cells = <2>;
526 interrupt-parent = <&main_gpio_intr>;
529 interrupt-controller;
530 #interrupt-cells = <2>;
532 ti,davinci-gpio-unbanked = <0>;
533 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
535 clock-names = "gpio";
540 compatible = "ti,am62-sdhci";
543 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
545 clock-names = "clk_ahb", "clk_xin";
546 ti,trm-icp = <0x2>;
547 ti,otap-del-sel-legacy = <0x0>;
548 ti,otap-del-sel-sd-hs = <0x0>;
549 ti,otap-del-sel-sdr12 = <0xf>;
550 ti,otap-del-sel-sdr25 = <0xf>;
551 ti,otap-del-sel-sdr50 = <0xc>;
552 ti,otap-del-sel-sdr104 = <0x6>;
553 ti,otap-del-sel-ddr50 = <0x9>;
554 ti,itap-del-sel-legacy = <0x0>;
555 ti,itap-del-sel-sd-hs = <0x0>;
556 ti,itap-del-sel-sdr12 = <0x0>;
557 ti,itap-del-sel-sdr25 = <0x0>;
558 ti,clkbuf-sel = <0x7>;
559 bus-width = <4>;
560 no-1-8-v;
564 usbss0: dwc3-usb@f900000 {
565 compatible = "ti,am62-usb";
568 clock-names = "ref";
569 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
570 #address-cells = <2>;
571 #size-cells = <2>;
572 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
581 interrupt-names = "host", "peripheral";
582 maximum-speed = "high-speed";
587 usbss1: dwc3-usb@f910000 {
588 compatible = "ti,am62-usb";
591 clock-names = "ref";
592 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
593 #address-cells = <2>;
594 #size-cells = <2>;
595 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
604 interrupt-names = "host", "peripheral";
605 maximum-speed = "high-speed";
611 compatible = "simple-bus";
613 #address-cells = <2>;
614 #size-cells = <2>;
619 compatible = "ti,am654-ospi", "cdns,qspi-nor";
623 cdns,fifo-depth = <256>;
624 cdns,fifo-width = <4>;
625 cdns,trigger-address = <0x0>;
627 assigned-clocks = <&k3_clks 75 7>;
628 assigned-clock-parents = <&k3_clks 75 8>;
629 assigned-clock-rates = <166666666>;
630 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
631 #address-cells = <1>;
632 #size-cells = <0>;
637 compatible = "ti,am642-cpsw-nuss";
638 #address-cells = <2>;
639 #size-cells = <2>;
641 reg-names = "cpsw_nuss";
644 assigned-clocks = <&k3_clks 13 3>;
645 assigned-clock-parents = <&k3_clks 13 11>;
646 clock-names = "fck";
647 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
659 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
662 ethernet-ports {
663 #address-cells = <1>;
664 #size-cells = <0>;
668 ti,mac-only;
671 mac-address = [00 00 00 00 00 00];
672 ti,syscon-efuse = <&wkup_conf 0x200>;
677 ti,mac-only;
680 mac-address = [00 00 00 00 00 00];
685 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
687 #address-cells = <1>;
688 #size-cells = <0>;
690 clock-names = "fck";
695 compatible = "ti,j721e-cpts";
698 clock-names = "cpts";
699 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
700 interrupt-names = "cpts";
701 ti,cpts-ext-ts-inputs = <4>;
702 ti,cpts-periodic-outputs = <2>;
707 compatible = "ti,am64-hwspinlock";
709 #hwlock-cells = <1>;
713 compatible = "ti,am64-mailbox";
716 #mbox-cells = <1>;
717 ti,mbox-num-users = <4>;
718 ti,mbox-num-fifos = <16>;
722 compatible = "ti,am64-mailbox";
725 #mbox-cells = <1>;
726 ti,mbox-num-users = <4>;
727 ti,mbox-num-fifos = <16>;
731 compatible = "ti,am64-mailbox";
734 #mbox-cells = <1>;
735 ti,mbox-num-users = <4>;
736 ti,mbox-num-fifos = <16>;
740 compatible = "ti,am64-mailbox";
743 #mbox-cells = <1>;
744 ti,mbox-num-users = <4>;
745 ti,mbox-num-fifos = <16>;
752 reg-names = "m_can", "message_ram";
753 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
755 clock-names = "hclk", "cclk";
758 interrupt-names = "int0", "int1";
759 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
764 compatible = "ti,j7-rti-wdt";
767 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
768 assigned-clocks = <&k3_clks 125 0>;
769 assigned-clock-parents = <&k3_clks 125 2>;
773 compatible = "ti,j7-rti-wdt";
776 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
777 assigned-clocks = <&k3_clks 126 0>;
778 assigned-clock-parents = <&k3_clks 126 2>;
782 compatible = "ti,j7-rti-wdt";
785 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
786 assigned-clocks = <&k3_clks 127 0>;
787 assigned-clock-parents = <&k3_clks 127 2>;
791 compatible = "ti,j7-rti-wdt";
794 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
795 assigned-clocks = <&k3_clks 128 0>;
796 assigned-clock-parents = <&k3_clks 128 2>;
800 compatible = "ti,j7-rti-wdt";
803 power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
804 assigned-clocks = <&k3_clks 205 0>;
805 assigned-clock-parents = <&k3_clks 205 2>;
808 epwm0: pwm@23000000 {
809 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
810 #pwm-cells = <3>;
812 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
814 clock-names = "tbclk", "fck";
818 epwm1: pwm@23010000 {
819 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
820 #pwm-cells = <3>;
822 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
824 clock-names = "tbclk", "fck";
828 epwm2: pwm@23020000 {
829 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
830 #pwm-cells = <3>;
832 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
834 clock-names = "tbclk", "fck";
838 ecap0: pwm@23100000 {
839 compatible = "ti,am3352-ecap";
840 #pwm-cells = <3>;
842 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
844 clock-names = "fck";
848 ecap1: pwm@23110000 {
849 compatible = "ti,am3352-ecap";
850 #pwm-cells = <3>;
852 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
854 clock-names = "fck";
858 ecap2: pwm@23120000 {
859 compatible = "ti,am3352-ecap";
860 #pwm-cells = <3>;
862 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
864 clock-names = "fck";
868 mcasp0: audio-controller@2b00000 {
869 compatible = "ti,am33xx-mcasp-audio";
872 reg-names = "mpu", "dat";
875 interrupt-names = "tx", "rx";
878 dma-names = "tx", "rx";
881 clock-names = "fck";
882 assigned-clocks = <&k3_clks 190 0>;
883 assigned-clock-parents = <&k3_clks 190 2>;
884 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
888 mcasp1: audio-controller@2b10000 {
889 compatible = "ti,am33xx-mcasp-audio";
892 reg-names = "mpu", "dat";
895 interrupt-names = "tx", "rx";
898 dma-names = "tx", "rx";
901 clock-names = "fck";
902 assigned-clocks = <&k3_clks 191 0>;
903 assigned-clock-parents = <&k3_clks 191 2>;
904 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
908 mcasp2: audio-controller@2b20000 {
909 compatible = "ti,am33xx-mcasp-audio";
912 reg-names = "mpu", "dat";
915 interrupt-names = "tx", "rx";
918 dma-names = "tx", "rx";
921 clock-names = "fck";
922 assigned-clocks = <&k3_clks 192 0>;
923 assigned-clock-parents = <&k3_clks 192 2>;
924 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
929 compatible = "ti,j721e-csi2rx-shim";
931 dma-names = "rx0";
933 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
934 #address-cells = <2>;
935 #size-cells = <2>;
939 cdns_csi2rx0: csi-bridge@30101000 {
940 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
944 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
947 phy-names = "dphy";
950 #address-cells = <1>;
951 #size-cells = <0>;
982 compatible = "cdns,dphy-rx";
984 #phy-cells = <0>;
985 power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;