Lines Matching +full:synquacer +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
23 interrupt-controller;
36 gic_its: msi-controller@1820000 {
37 compatible = "arm,gic-v3-its";
39 socionext,synquacer-pre-its = <0x1000000 0x400000>;
40 msi-controller;
41 #msi-cells = <1>;
46 compatible = "syscon", "simple-mfd";
48 #address-cells = <1>;
49 #size-cells = <1>;
53 compatible = "ti,am654-phy-gmii-sel";
55 #phy-cells = <1>;
58 epwm_tbclk: clock-controller@4130 {
59 compatible = "ti,am62-epwm-tbclk";
61 #clock-cells = <1>;
64 audio_refclk0: clock-controller@82e0 {
65 compatible = "ti,am62-audio-refclk";
68 assigned-clocks = <&k3_clks 157 0>;
69 assigned-clock-parents = <&k3_clks 157 8>;
70 #clock-cells = <0>;
73 audio_refclk1: clock-controller@82e4 {
74 compatible = "ti,am62-audio-refclk";
77 assigned-clocks = <&k3_clks 157 10>;
78 assigned-clock-parents = <&k3_clks 157 18>;
79 #clock-cells = <0>;
84 bootph-all;
85 compatible = "simple-bus";
86 #address-cells = <2>;
87 #size-cells = <2>;
88 dma-ranges;
91 ti,sci-dev-id = <25>;
94 bootph-all;
95 compatible = "ti,am654-secure-proxy";
96 #mbox-cells = <1>;
97 reg-names = "target_data", "rt", "scfg";
101 interrupt-names = "rx_012";
105 inta_main_dmss: interrupt-controller@48000000 {
106 compatible = "ti,sci-inta";
108 #interrupt-cells = <0>;
109 interrupt-controller;
110 interrupt-parent = <&gic500>;
111 msi-controller;
113 ti,sci-dev-id = <28>;
114 ti,interrupt-ranges = <4 68 36>;
115 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
118 main_bcdma: dma-controller@485c0100 {
119 compatible = "ti,am64-dmss-bcdma";
129 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
131 msi-parent = <&inta_main_dmss>;
132 #dma-cells = <3>;
135 ti,sci-dev-id = <26>;
136 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
137 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
138 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
141 main_pktdma: dma-controller@485c0000 {
142 compatible = "ti,am64-dmss-pktdma";
151 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
153 msi-parent = <&inta_main_dmss>;
154 #dma-cells = <2>;
157 ti,sci-dev-id = <30>;
158 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
162 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
166 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
172 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
179 dmsc: system-controller@44043000 {
180 bootph-all;
181 compatible = "ti,k2g-sci";
182 ti,host-id = <12>;
183 mbox-names = "rx", "tx";
186 reg-names = "debug_messages";
189 k3_pds: power-controller {
190 bootph-all;
191 compatible = "ti,sci-pm-domain";
192 #power-domain-cells = <2>;
195 k3_clks: clock-controller {
196 bootph-all;
197 compatible = "ti,k2g-sci-clk";
198 #clock-cells = <2>;
201 k3_reset: reset-controller {
202 bootph-all;
203 compatible = "ti,sci-reset";
204 #reset-cells = <2>;
209 compatible = "ti,am62-sa3ul";
211 #address-cells = <2>;
212 #size-cells = <2>;
217 dma-names = "tx", "rx1", "rx2";
221 bootph-pre-ram;
222 compatible = "ti,am654-secure-proxy";
223 #mbox-cells = <1>;
224 reg-names = "target_data", "rt", "scfg";
231 * firmware on non-MPU processors
237 bootph-all;
238 compatible = "pinctrl-single";
240 #pinctrl-cells = <1>;
241 pinctrl-single,register-width = <32>;
242 pinctrl-single,function-mask = <0xffffffff>;
246 bootph-pre-ram;
247 compatible = "ti,j721e-esm";
249 ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
253 bootph-all;
254 compatible = "ti,am654-timer";
258 clock-names = "fck";
259 assigned-clocks = <&k3_clks 36 2>;
260 assigned-clock-parents = <&k3_clks 36 3>;
261 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
262 ti,timer-pwm;
266 compatible = "ti,am654-timer";
270 clock-names = "fck";
271 assigned-clocks = <&k3_clks 37 2>;
272 assigned-clock-parents = <&k3_clks 37 3>;
273 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
274 ti,timer-pwm;
278 compatible = "ti,am654-timer";
282 clock-names = "fck";
283 assigned-clocks = <&k3_clks 38 2>;
284 assigned-clock-parents = <&k3_clks 38 3>;
285 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
286 ti,timer-pwm;
290 compatible = "ti,am654-timer";
294 clock-names = "fck";
295 assigned-clocks = <&k3_clks 39 2>;
296 assigned-clock-parents = <&k3_clks 39 3>;
297 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
298 ti,timer-pwm;
302 compatible = "ti,am654-timer";
306 clock-names = "fck";
307 assigned-clocks = <&k3_clks 40 2>;
308 assigned-clock-parents = <&k3_clks 40 3>;
309 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
310 ti,timer-pwm;
314 compatible = "ti,am654-timer";
318 clock-names = "fck";
319 assigned-clocks = <&k3_clks 41 2>;
320 assigned-clock-parents = <&k3_clks 41 3>;
321 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
322 ti,timer-pwm;
326 compatible = "ti,am654-timer";
330 clock-names = "fck";
331 assigned-clocks = <&k3_clks 42 2>;
332 assigned-clock-parents = <&k3_clks 42 3>;
333 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
334 ti,timer-pwm;
338 compatible = "ti,am654-timer";
342 clock-names = "fck";
343 assigned-clocks = <&k3_clks 43 2>;
344 assigned-clock-parents = <&k3_clks 43 3>;
345 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
346 ti,timer-pwm;
350 compatible = "ti,am64-uart", "ti,am654-uart";
353 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
355 clock-names = "fclk";
360 compatible = "ti,am64-uart", "ti,am654-uart";
363 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
365 clock-names = "fclk";
370 compatible = "ti,am64-uart", "ti,am654-uart";
373 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
375 clock-names = "fclk";
380 compatible = "ti,am64-uart", "ti,am654-uart";
383 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
385 clock-names = "fclk";
390 compatible = "ti,am64-uart", "ti,am654-uart";
393 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
395 clock-names = "fclk";
400 compatible = "ti,am64-uart", "ti,am654-uart";
403 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
405 clock-names = "fclk";
410 compatible = "ti,am64-uart", "ti,am654-uart";
413 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
415 clock-names = "fclk";
419 main_i2c0: i2c@20000000 {
420 compatible = "ti,am64-i2c", "ti,omap4-i2c";
423 #address-cells = <1>;
424 #size-cells = <0>;
425 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
427 clock-names = "fck";
431 main_i2c1: i2c@20010000 {
432 compatible = "ti,am64-i2c", "ti,omap4-i2c";
435 #address-cells = <1>;
436 #size-cells = <0>;
437 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
439 clock-names = "fck";
443 main_i2c2: i2c@20020000 {
444 compatible = "ti,am64-i2c", "ti,omap4-i2c";
447 #address-cells = <1>;
448 #size-cells = <0>;
449 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
451 clock-names = "fck";
455 main_i2c3: i2c@20030000 {
456 compatible = "ti,am64-i2c", "ti,omap4-i2c";
459 #address-cells = <1>;
460 #size-cells = <0>;
461 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
463 clock-names = "fck";
468 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
471 #address-cells = <1>;
472 #size-cells = <0>;
473 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
479 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
482 #address-cells = <1>;
483 #size-cells = <0>;
484 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
490 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
493 #address-cells = <1>;
494 #size-cells = <0>;
495 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
500 main_gpio_intr: interrupt-controller@a00000 {
501 compatible = "ti,sci-intr";
503 ti,intr-trigger-type = <1>;
504 interrupt-controller;
505 interrupt-parent = <&gic500>;
506 #interrupt-cells = <1>;
508 ti,sci-dev-id = <3>;
509 ti,interrupt-ranges = <0 32 16>;
513 compatible = "ti,am64-gpio", "ti,keystone-gpio";
515 gpio-ranges = <&main_pmx0 0 0 32>,
518 gpio-controller;
519 #gpio-cells = <2>;
520 interrupt-parent = <&main_gpio_intr>;
523 interrupt-controller;
524 #interrupt-cells = <2>;
526 ti,davinci-gpio-unbanked = <0>;
527 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
529 clock-names = "gpio";
533 compatible = "ti,am64-gpio", "ti,keystone-gpio";
535 gpio-controller;
536 gpio-ranges = <&main_pmx0 0 94 41>,
540 #gpio-cells = <2>;
541 interrupt-parent = <&main_gpio_intr>;
544 interrupt-controller;
545 #interrupt-cells = <2>;
547 ti,davinci-gpio-unbanked = <0>;
548 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
550 clock-names = "gpio";
554 compatible = "ti,am62-sdhci";
557 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
559 clock-names = "clk_ahb", "clk_xin";
560 assigned-clocks = <&k3_clks 57 6>;
561 assigned-clock-parents = <&k3_clks 57 8>;
562 mmc-ddr-1_8v;
563 mmc-hs200-1_8v;
564 ti,trm-icp = <0x2>;
565 bus-width = <8>;
566 ti,clkbuf-sel = <0x7>;
567 ti,otap-del-sel-legacy = <0x0>;
568 ti,otap-del-sel-mmc-hs = <0x0>;
569 ti,otap-del-sel-ddr52 = <0x5>;
570 ti,otap-del-sel-hs200 = <0x5>;
571 ti,itap-del-sel-legacy = <0xa>;
572 ti,itap-del-sel-mmc-hs = <0x1>;
577 compatible = "ti,am62-sdhci";
580 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
582 clock-names = "clk_ahb", "clk_xin";
583 ti,trm-icp = <0x2>;
584 ti,otap-del-sel-legacy = <0x8>;
585 ti,otap-del-sel-sd-hs = <0x0>;
586 ti,otap-del-sel-sdr12 = <0x0>;
587 ti,otap-del-sel-sdr25 = <0x0>;
588 ti,otap-del-sel-sdr50 = <0x8>;
589 ti,otap-del-sel-sdr104 = <0x7>;
590 ti,otap-del-sel-ddr50 = <0x4>;
591 ti,itap-del-sel-legacy = <0xa>;
592 ti,itap-del-sel-sd-hs = <0x1>;
593 ti,itap-del-sel-sdr12 = <0xa>;
594 ti,itap-del-sel-sdr25 = <0x1>;
595 ti,clkbuf-sel = <0x7>;
596 bus-width = <4>;
601 compatible = "ti,am62-sdhci";
604 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
606 clock-names = "clk_ahb", "clk_xin";
607 ti,trm-icp = <0x2>;
608 ti,otap-del-sel-legacy = <0x8>;
609 ti,otap-del-sel-sd-hs = <0x0>;
610 ti,otap-del-sel-sdr12 = <0x0>;
611 ti,otap-del-sel-sdr25 = <0x0>;
612 ti,otap-del-sel-sdr50 = <0x8>;
613 ti,otap-del-sel-sdr104 = <0x7>;
614 ti,otap-del-sel-ddr50 = <0x8>;
615 ti,itap-del-sel-legacy = <0xa>;
616 ti,itap-del-sel-sd-hs = <0xa>;
617 ti,itap-del-sel-sdr12 = <0xa>;
618 ti,itap-del-sel-sdr25 = <0x1>;
619 ti,clkbuf-sel = <0x7>;
623 usbss0: dwc3-usb@f900000 {
624 compatible = "ti,am62-usb";
627 clock-names = "ref";
628 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
629 #address-cells = <2>;
630 #size-cells = <2>;
631 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
640 interrupt-names = "host", "peripheral";
641 maximum-speed = "high-speed";
646 usbss1: dwc3-usb@f910000 {
647 compatible = "ti,am62-usb";
650 clock-names = "ref";
651 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
652 #address-cells = <2>;
653 #size-cells = <2>;
654 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
663 interrupt-names = "host", "peripheral";
664 maximum-speed = "high-speed";
670 compatible = "simple-bus";
672 #address-cells = <2>;
673 #size-cells = <2>;
677 compatible = "ti,am654-ospi", "cdns,qspi-nor";
681 cdns,fifo-depth = <256>;
682 cdns,fifo-width = <4>;
683 cdns,trigger-address = <0x0>;
685 assigned-clocks = <&k3_clks 75 7>;
686 assigned-clock-parents = <&k3_clks 75 8>;
687 assigned-clock-rates = <166666666>;
688 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
689 #address-cells = <1>;
690 #size-cells = <0>;
696 compatible = "ti,am62-gpu", "img,img-axe";
699 clock-names = "core";
701 power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
705 compatible = "ti,am642-cpsw-nuss";
706 #address-cells = <2>;
707 #size-cells = <2>;
709 reg-names = "cpsw_nuss";
712 assigned-clocks = <&k3_clks 13 3>;
713 assigned-clock-parents = <&k3_clks 13 11>;
714 clock-names = "fck";
715 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
726 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
729 ethernet-ports {
730 #address-cells = <1>;
731 #size-cells = <0>;
735 ti,mac-only;
738 mac-address = [00 00 00 00 00 00];
739 ti,syscon-efuse = <&wkup_conf 0x200>;
744 ti,mac-only;
747 mac-address = [00 00 00 00 00 00];
752 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
754 #address-cells = <1>;
755 #size-cells = <0>;
757 clock-names = "fck";
763 compatible = "ti,j721e-cpts";
766 clock-names = "cpts";
767 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
768 interrupt-names = "cpts";
769 ti,cpts-ext-ts-inputs = <4>;
770 ti,cpts-periodic-outputs = <2>;
775 compatible = "ti,am625-dss";
783 reg-names = "common", "vidl1", "vid",
785 power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
789 clock-names = "fck", "vp1", "vp2";
794 #address-cells = <1>;
795 #size-cells = <0>;
800 compatible = "ti,am64-hwspinlock";
802 #hwlock-cells = <1>;
806 compatible = "ti,am64-mailbox";
810 #mbox-cells = <1>;
811 ti,mbox-num-users = <4>;
812 ti,mbox-num-fifos = <16>;
816 compatible = "ti,am3352-ecap";
817 #pwm-cells = <3>;
819 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
821 clock-names = "fck";
826 compatible = "ti,am3352-ecap";
827 #pwm-cells = <3>;
829 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
831 clock-names = "fck";
836 compatible = "ti,am3352-ecap";
837 #pwm-cells = <3>;
839 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
841 clock-names = "fck";
849 reg-names = "m_can", "message_ram";
850 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
852 clock-names = "hclk", "cclk";
855 interrupt-names = "int0", "int1";
856 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
861 compatible = "ti,j7-rti-wdt";
864 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
865 assigned-clocks = <&k3_clks 125 0>;
866 assigned-clock-parents = <&k3_clks 125 2>;
870 compatible = "ti,j7-rti-wdt";
873 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
874 assigned-clocks = <&k3_clks 126 0>;
875 assigned-clock-parents = <&k3_clks 126 2>;
879 compatible = "ti,j7-rti-wdt";
882 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
883 assigned-clocks = <&k3_clks 127 0>;
884 assigned-clock-parents = <&k3_clks 127 2>;
888 compatible = "ti,j7-rti-wdt";
891 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
892 assigned-clocks = <&k3_clks 128 0>;
893 assigned-clock-parents = <&k3_clks 128 2>;
897 compatible = "ti,j7-rti-wdt";
900 power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
901 assigned-clocks = <&k3_clks 130 0>;
902 assigned-clock-parents = <&k3_clks 130 2>;
906 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
907 #pwm-cells = <3>;
909 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
911 clock-names = "tbclk", "fck";
916 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
917 #pwm-cells = <3>;
919 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
921 clock-names = "tbclk", "fck";
926 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
927 #pwm-cells = <3>;
929 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
931 clock-names = "tbclk", "fck";
935 mcasp0: audio-controller@2b00000 {
936 compatible = "ti,am33xx-mcasp-audio";
939 reg-names = "mpu", "dat";
942 interrupt-names = "tx", "rx";
945 dma-names = "tx", "rx";
948 clock-names = "fck";
949 assigned-clocks = <&k3_clks 190 0>;
950 assigned-clock-parents = <&k3_clks 190 2>;
951 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
955 mcasp1: audio-controller@2b10000 {
956 compatible = "ti,am33xx-mcasp-audio";
959 reg-names = "mpu", "dat";
962 interrupt-names = "tx", "rx";
965 dma-names = "tx", "rx";
968 clock-names = "fck";
969 assigned-clocks = <&k3_clks 191 0>;
970 assigned-clock-parents = <&k3_clks 191 2>;
971 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
975 mcasp2: audio-controller@2b20000 {
976 compatible = "ti,am33xx-mcasp-audio";
979 reg-names = "mpu", "dat";
982 interrupt-names = "tx", "rx";
985 dma-names = "tx", "rx";
988 clock-names = "fck";
989 assigned-clocks = <&k3_clks 192 0>;
990 assigned-clock-parents = <&k3_clks 192 2>;
991 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
996 compatible = "ti,j721e-csi2rx-shim";
998 dma-names = "rx0";
1000 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
1001 #address-cells = <2>;
1002 #size-cells = <2>;
1006 cdns_csi2rx0: csi-bridge@30101000 {
1007 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
1011 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
1014 phy-names = "dphy";
1017 #address-cells = <1>;
1018 #size-cells = <0>;
1049 compatible = "cdns,dphy-rx";
1051 #phy-cells = <0>;
1052 power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;