Lines Matching +full:disp +full:- +full:syscon
6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
53 compatible = "arm,cortex-a53";
55 enable-method = "psci";
56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
61 compatible = "arm,cortex-a53";
63 enable-method = "psci";
64 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
69 compatible = "arm,cortex-a53";
71 enable-method = "psci";
72 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
77 compatible = "arm,cortex-a53";
79 enable-method = "psci";
80 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
85 compatible = "arm,cortex-a53";
87 enable-method = "psci";
88 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
93 compatible = "arm,cortex-a53";
95 enable-method = "psci";
96 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
101 compatible = "arm,cortex-a53";
103 enable-method = "psci";
104 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
109 compatible = "arm,cortex-a53";
111 enable-method = "psci";
112 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
116 idle-states{
117 entry-method = "psci";
120 compatible = "arm,idle-state";
121 entry-latency-us = <1000>;
122 exit-latency-us = <700>;
123 min-residency-us = <2500>;
124 local-timer-stop;
125 arm,psci-suspend-param = <0x00010002>;
129 compatible = "arm,idle-state";
130 entry-latency-us = <1000>;
131 exit-latency-us = <1000>;
132 min-residency-us = <3000>;
133 local-timer-stop;
134 arm,psci-suspend-param = <0x01010003>;
138 gic: interrupt-controller@12001000 {
139 compatible = "arm,gic-400";
144 #interrupt-cells = <3>;
145 interrupt-controller;
151 compatible = "arm,psci-0.2";
156 compatible = "arm,armv8-timer";
168 compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
177 interrupt-affinity = <&CPU0>,
188 pmu_gate: pmu-gate {
189 compatible = "sprd,sc9860-pmu-gate";
190 sprd,syscon = <&pmu_regs>; /* 0x402b0000 */
192 #clock-cells = <1>;
196 compatible = "sprd,sc9860-pll";
197 sprd,syscon = <&ana_regs>; /* 0x40400000 */
199 #clock-cells = <1>;
202 ap_clk: clock-controller@20000000 {
203 compatible = "sprd,sc9860-ap-clk";
207 #clock-cells = <1>;
210 aon_prediv: aon-prediv {
211 compatible = "sprd,sc9860-aon-prediv";
215 #clock-cells = <1>;
218 apahb_gate: apahb-gate {
219 compatible = "sprd,sc9860-apahb-gate";
220 sprd,syscon = <&ap_ahb_regs>; /* 0x20210000 */
222 #clock-cells = <1>;
225 aon_gate: aon-gate {
226 compatible = "sprd,sc9860-aon-gate";
227 sprd,syscon = <&aon_regs>; /* 0x402e0000 */
229 #clock-cells = <1>;
232 aonsecure_clk: clock-controller@40880000 {
233 compatible = "sprd,sc9860-aonsecure-clk";
236 #clock-cells = <1>;
239 agcp_gate: agcp-gate {
240 compatible = "sprd,sc9860-agcp-gate";
241 sprd,syscon = <&agcp_regs>; /* 0x415e0000 */
243 #clock-cells = <1>;
246 gpu_clk: clock-controller@60200000 {
247 compatible = "sprd,sc9860-gpu-clk";
250 #clock-cells = <1>;
253 vsp_clk: clock-controller@61000000 {
254 compatible = "sprd,sc9860-vsp-clk";
257 #clock-cells = <1>;
260 vsp_gate: vsp-gate {
261 compatible = "sprd,sc9860-vsp-gate";
262 sprd,syscon = <&vsp_regs>; /* 0x61100000 */
264 #clock-cells = <1>;
267 cam_clk: clock-controller@62000000 {
268 compatible = "sprd,sc9860-cam-clk";
271 #clock-cells = <1>;
274 cam_gate: cam-gate {
275 compatible = "sprd,sc9860-cam-gate";
276 sprd,syscon = <&cam_regs>; /* 0x62100000 */
278 #clock-cells = <1>;
281 disp_clk: clock-controller@63000000 {
282 compatible = "sprd,sc9860-disp-clk";
285 #clock-cells = <1>;
288 disp_gate: disp-gate {
289 compatible = "sprd,sc9860-disp-gate";
290 sprd,syscon = <&disp_regs>; /* 0x63100000 */
292 #clock-cells = <1>;
295 apapb_gate: apapb-gate {
296 compatible = "sprd,sc9860-apapb-gate";
297 sprd,syscon = <&ap_apb_regs>; /* 0x70b00000 */
299 #clock-cells = <1>;
303 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
306 clock-names = "apb_pclk";
307 out-ports {
310 remote-endpoint = <&etb_in>;
315 in-ports {
316 #address-cells = <1>;
317 #size-cells = <0>;
322 remote-endpoint =
330 remote-endpoint =
338 compatible = "arm,coresight-tmc", "arm,primecell";
341 clock-names = "apb_pclk";
342 out-ports {
345 remote-endpoint =
353 compatible = "arm,coresight-stm", "arm,primecell";
356 reg-names = "stm-base", "stm-stimulus-base";
358 clock-names = "apb_pclk";
359 out-ports {
362 remote-endpoint =
370 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
373 clock-names = "apb_pclk";
374 out-ports {
377 remote-endpoint =
383 in-ports {
384 #address-cells = <1>;
385 #size-cells = <0>;
390 remote-endpoint = <&etm0_out>;
397 remote-endpoint = <&etm1_out>;
404 remote-endpoint = <&etm2_out>;
411 remote-endpoint = <&etm3_out>;
418 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
421 clock-names = "apb_pclk";
422 out-ports {
425 remote-endpoint =
431 in-ports {
432 #address-cells = <1>;
433 #size-cells = <0>;
438 remote-endpoint = <&etm4_out>;
445 remote-endpoint = <&etm5_out>;
452 remote-endpoint = <&etm6_out>;
459 remote-endpoint = <&etm7_out>;
466 compatible = "arm,coresight-tmc", "arm,primecell";
469 clock-names = "apb_pclk";
471 out-ports {
474 remote-endpoint =
480 in-ports {
483 remote-endpoint =
491 compatible = "arm,coresight-tmc", "arm,primecell";
494 clock-names = "apb_pclk";
496 out-ports {
499 remote-endpoint =
505 in-ports {
508 remote-endpoint =
516 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
519 clock-names = "apb_pclk";
521 out-ports {
524 remote-endpoint =
530 in-ports {
531 #address-cells = <1>;
532 #size-cells = <0>;
537 remote-endpoint =
545 remote-endpoint =
553 compatible = "arm,coresight-etm4x", "arm,primecell";
557 clock-names = "apb_pclk";
559 out-ports {
562 remote-endpoint =
570 compatible = "arm,coresight-etm4x", "arm,primecell";
574 clock-names = "apb_pclk";
576 out-ports {
579 remote-endpoint =
587 compatible = "arm,coresight-etm4x", "arm,primecell";
591 clock-names = "apb_pclk";
593 out-ports {
596 remote-endpoint =
604 compatible = "arm,coresight-etm4x", "arm,primecell";
608 clock-names = "apb_pclk";
610 out-ports {
613 remote-endpoint =
621 compatible = "arm,coresight-etm4x", "arm,primecell";
625 clock-names = "apb_pclk";
627 out-ports {
630 remote-endpoint =
638 compatible = "arm,coresight-etm4x", "arm,primecell";
642 clock-names = "apb_pclk";
644 out-ports {
647 remote-endpoint =
655 compatible = "arm,coresight-etm4x", "arm,primecell";
659 clock-names = "apb_pclk";
661 out-ports {
664 remote-endpoint =
672 compatible = "arm,coresight-etm4x", "arm,primecell";
676 clock-names = "apb_pclk";
678 out-ports {
681 remote-endpoint =
688 gpio-keys {
689 compatible = "gpio-keys";
691 key-volumedown {
695 debounce-interval = <2>;
696 wakeup-source;
699 key-volumeup {
703 debounce-interval = <2>;
704 wakeup-source;
707 key-power {
711 debounce-interval = <2>;
712 wakeup-source;