Lines Matching +full:stm +full:- +full:base

10 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 		#address-cells = <2>;
17 		#size-cells = <0>;
21 			compatible = "arm,cortex-a53";
23 			enable-method = "psci";
28 			compatible = "arm,cortex-a53";
30 			enable-method = "psci";
35 			compatible = "arm,cortex-a53";
37 			enable-method = "psci";
42 			compatible = "arm,cortex-a53";
44 			enable-method = "psci";
49 		compatible = "arm,coresight-tmc", "arm,primecell";
52 		clock-names = "apb_pclk";
53 		in-ports {
56 					remote-endpoint = <&funnel_out_port0>;
63 		compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
66 		clock-names = "apb_pclk";
68 		out-ports {
71 					remote-endpoint = <&etf_in>;
76 		in-ports {
77 			#address-cells = <1>;
78 			#size-cells = <0>;
83 					remote-endpoint = <&etm0_out>;
90 					remote-endpoint = <&etm1_out>;
97 					remote-endpoint = <&etm2_out>;
104 					remote-endpoint = <&etm3_out>;
111 					remote-endpoint = <&stm_out>;
119 		compatible = "arm,coresight-etm4x", "arm,primecell";
124 		clock-names = "apb_pclk";
125 		out-ports {
128 					remote-endpoint = <&funnel_in_port0>;
135 		compatible = "arm,coresight-etm4x", "arm,primecell";
140 		clock-names = "apb_pclk";
141 		out-ports {
144 					remote-endpoint = <&funnel_in_port1>;
151 		compatible = "arm,coresight-etm4x", "arm,primecell";
156 		clock-names = "apb_pclk";
157 		out-ports {
160 					remote-endpoint = <&funnel_in_port2>;
167 		compatible = "arm,coresight-etm4x", "arm,primecell";
172 		clock-names = "apb_pclk";
173 		out-ports {
176 					remote-endpoint = <&funnel_in_port3>;
182 	stm@10006000 {
183 		compatible = "arm,coresight-stm", "arm,primecell";
186 		reg-names = "stm-base", "stm-stimulus-base";
188 		clock-names = "apb_pclk";
189 		out-ports {
192 					remote-endpoint = <&funnel_in_port4>;
198 	gic: interrupt-controller@12001000 {
199 		compatible = "arm,gic-400";
204 		#interrupt-cells = <3>;
205 		interrupt-controller;
218 		compatible = "arm,armv8-timer";