Lines Matching +full:0 +full:xff970000
45 #size-cells = <0>;
73 cpu_l0: cpu@0 {
76 reg = <0x0 0x0>;
88 reg = <0x0 0x1>;
100 reg = <0x0 0x2>;
112 reg = <0x0 0x3>;
124 reg = <0x0 0x100>;
142 reg = <0x0 0x101>;
163 arm,psci-suspend-param = <0x0010000>;
172 arm,psci-suspend-param = <0x1010000>;
211 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
212 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
213 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
214 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
222 #clock-cells = <0>;
227 reg = <0x0 0xf8000000 0x0 0x2000000>,
228 <0x0 0xfd000000 0x0 0x1000000>;
235 bus-range = <0x0 0x1f>;
240 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
241 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
242 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
244 interrupt-map-mask = <0 0 0 7>;
245 interrupt-map = <0 0 0 1 &pcie0_intc 0>,
246 <0 0 0 2 &pcie0_intc 1>,
247 <0 0 0 3 &pcie0_intc 2>,
248 <0 0 0 4 &pcie0_intc 3>;
250 msi-map = <0x0 &its 0x0 0x1000>;
251 phys = <&pcie_phy 0>, <&pcie_phy 1>,
253 phy-names = "pcie-phy-0", "pcie-phy-1",
255 ranges = <0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>,
256 <0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
267 #address-cells = <0>;
274 reg = <0x0 0xfd000000 0x0 0x1000000>,
275 <0x0 0xfa000000 0x0 0x2000000>;
289 phys = <&pcie_phy 0>, <&pcie_phy 1>,
291 phy-names = "pcie-phy-0", "pcie-phy-1",
295 pinctrl-0 = <&pcie_clkreqnb_cpm>;
301 reg = <0x0 0xfe300000 0x0 0x10000>;
302 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
316 snps,txpbl = <0x4>;
323 reg = <0x0 0xfe310000 0x0 0x4000>;
324 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
329 fifo-depth = <0x100>;
339 reg = <0x0 0xfe320000 0x0 0x4000>;
340 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
347 fifo-depth = <0x100>;
356 reg = <0x0 0xfe330000 0x0 0x10000>;
357 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
364 #clock-cells = <0>;
374 reg = <0x0 0xfe380000 0x0 0x20000>;
375 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
385 reg = <0x0 0xfe3a0000 0x0 0x20000>;
386 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
396 reg = <0x0 0xfe3c0000 0x0 0x20000>;
397 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
407 reg = <0x0 0xfe3e0000 0x0 0x20000>;
408 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
418 reg = <0 0xfe430000 0 0x1000>;
426 reg = <0 0xfe432000 0 0x1000>;
434 reg = <0 0xfe434000 0 0x1000>;
442 reg = <0 0xfe436000 0 0x1000>;
450 reg = <0 0xfe610000 0 0x1000>;
458 reg = <0 0xfe710000 0 0x1000>;
481 reg = <0x0 0xfe800000 0x0 0x100000>;
482 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
517 reg = <0x0 0xfe900000 0x0 0x100000>;
518 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
538 reg = <0x0 0xfec00000 0x0 0x100000>;
539 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
557 #size-cells = <0>;
559 dp_in_vopb: endpoint@0 {
560 reg = <0>;
580 reg = <0x0 0xfee00000 0 0x10000>, /* GICD */
581 <0x0 0xfef00000 0 0xc0000>, /* GICR */
582 <0x0 0xfff00000 0 0x10000>, /* GICC */
583 <0x0 0xfff10000 0 0x10000>, /* GICH */
584 <0x0 0xfff20000 0 0x10000>; /* GICV */
585 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
590 reg = <0x0 0xfee20000 0x0 0x20000>;
594 ppi_cluster0: interrupt-partition-0 {
606 reg = <0x0 0xff100000 0x0 0x100>;
607 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH 0>;
618 reg = <0x0 0xff8b0000 0x0 0x4000>;
619 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 0>;
628 reg = <0x0 0xff8b8000 0x0 0x4000>;
629 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
638 reg = <0x0 0xff110000 0x0 0x1000>;
643 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH 0>;
645 pinctrl-0 = <&i2c1_xfer>;
647 #size-cells = <0>;
653 reg = <0x0 0xff120000 0x0 0x1000>;
658 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH 0>;
660 pinctrl-0 = <&i2c2_xfer>;
662 #size-cells = <0>;
668 reg = <0x0 0xff130000 0x0 0x1000>;
673 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH 0>;
675 pinctrl-0 = <&i2c3_xfer>;
677 #size-cells = <0>;
683 reg = <0x0 0xff140000 0x0 0x1000>;
688 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>;
690 pinctrl-0 = <&i2c5_xfer>;
692 #size-cells = <0>;
698 reg = <0x0 0xff150000 0x0 0x1000>;
703 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH 0>;
705 pinctrl-0 = <&i2c6_xfer>;
707 #size-cells = <0>;
713 reg = <0x0 0xff160000 0x0 0x1000>;
718 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH 0>;
720 pinctrl-0 = <&i2c7_xfer>;
722 #size-cells = <0>;
728 reg = <0x0 0xff180000 0x0 0x100>;
731 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
735 pinctrl-0 = <&uart0_xfer>;
741 reg = <0x0 0xff190000 0x0 0x100>;
744 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0>;
748 pinctrl-0 = <&uart1_xfer>;
754 reg = <0x0 0xff1a0000 0x0 0x100>;
757 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
761 pinctrl-0 = <&uart2c_xfer>;
767 reg = <0x0 0xff1b0000 0x0 0x100>;
770 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
774 pinctrl-0 = <&uart3_xfer>;
780 reg = <0x0 0xff1c0000 0x0 0x1000>;
783 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH 0>;
787 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
789 #size-cells = <0>;
795 reg = <0x0 0xff1d0000 0x0 0x1000>;
798 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH 0>;
802 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
804 #size-cells = <0>;
810 reg = <0x0 0xff1e0000 0x0 0x1000>;
813 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH 0>;
817 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
819 #size-cells = <0>;
825 reg = <0x0 0xff1f0000 0x0 0x1000>;
828 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>;
832 pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>;
834 #size-cells = <0>;
840 reg = <0x0 0xff200000 0x0 0x1000>;
843 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
847 pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
850 #size-cells = <0>;
859 thermal-sensors = <&tsadc 0>;
930 reg = <0x0 0xff260000 0x0 0x100>;
931 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
941 pinctrl-0 = <&otp_pin>;
950 reg = <0x0 0xffa58000 0x0 0x20>;
955 reg = <0x0 0xffa5c000 0x0 0x20>;
960 reg = <0x0 0xffa60080 0x0 0x20>;
965 reg = <0x0 0xffa60100 0x0 0x20>;
970 reg = <0x0 0xffa60180 0x0 0x20>;
975 reg = <0x0 0xffa70000 0x0 0x20>;
980 reg = <0x0 0xffa70080 0x0 0x20>;
985 reg = <0x0 0xffa74000 0x0 0x20>;
990 reg = <0x0 0xffa76000 0x0 0x20>;
995 reg = <0x0 0xffa90000 0x0 0x20>;
1000 reg = <0x0 0xffa98000 0x0 0x20>;
1005 reg = <0x0 0xffaa0000 0x0 0x20>;
1010 reg = <0x0 0xffaa0080 0x0 0x20>;
1015 reg = <0x0 0xffaa8000 0x0 0x20>;
1020 reg = <0x0 0xffaa8080 0x0 0x20>;
1025 reg = <0x0 0xffab0000 0x0 0x20>;
1030 reg = <0x0 0xffab0080 0x0 0x20>;
1035 reg = <0x0 0xffab8000 0x0 0x20>;
1040 reg = <0x0 0xffac0000 0x0 0x20>;
1045 reg = <0x0 0xffac0080 0x0 0x20>;
1050 reg = <0x0 0xffac8000 0x0 0x20>;
1055 reg = <0x0 0xffac8080 0x0 0x20>;
1060 reg = <0x0 0xffad0000 0x0 0x20>;
1065 reg = <0x0 0xffad8080 0x0 0x20>;
1070 reg = <0x0 0xffae0000 0x0 0x20>;
1075 reg = <0x0 0xff310000 0x0 0x1000>;
1088 #size-cells = <0>;
1096 #power-domain-cells = <0>;
1104 #power-domain-cells = <0>;
1111 #power-domain-cells = <0>;
1121 #power-domain-cells = <0>;
1129 #power-domain-cells = <0>;
1136 #power-domain-cells = <0>;
1142 #power-domain-cells = <0>;
1149 #power-domain-cells = <0>;
1156 #power-domain-cells = <0>;
1162 #power-domain-cells = <0>;
1168 #power-domain-cells = <0>;
1174 #power-domain-cells = <0>;
1181 #power-domain-cells = <0>;
1187 #size-cells = <0>;
1195 #power-domain-cells = <0>;
1203 #power-domain-cells = <0>;
1211 #power-domain-cells = <0>;
1217 #size-cells = <0>;
1225 #power-domain-cells = <0>;
1232 #power-domain-cells = <0>;
1241 reg = <0x0 0xff320000 0x0 0x1000>;
1251 reg = <0x0 0xff350000 0x0 0x1000>;
1254 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH 0>;
1256 pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>;
1258 #size-cells = <0>;
1264 reg = <0x0 0xff370000 0x0 0x100>;
1267 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0>;
1271 pinctrl-0 = <&uart4_xfer>;
1277 reg = <0x0 0xff3c0000 0x0 0x1000>;
1282 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
1284 pinctrl-0 = <&i2c0_xfer>;
1286 #size-cells = <0>;
1292 reg = <0x0 0xff3d0000 0x0 0x1000>;
1297 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH 0>;
1299 pinctrl-0 = <&i2c4_xfer>;
1301 #size-cells = <0>;
1307 reg = <0x0 0xff3e0000 0x0 0x1000>;
1312 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
1314 pinctrl-0 = <&i2c8_xfer>;
1316 #size-cells = <0>;
1322 reg = <0x0 0xff420000 0x0 0x10>;
1325 pinctrl-0 = <&pwm0_pin>;
1332 reg = <0x0 0xff420010 0x0 0x10>;
1335 pinctrl-0 = <&pwm1_pin>;
1342 reg = <0x0 0xff420020 0x0 0x10>;
1345 pinctrl-0 = <&pwm2_pin>;
1352 reg = <0x0 0xff420030 0x0 0x10>;
1355 pinctrl-0 = <&pwm3a_pin>;
1361 reg = <0x00 0xff630000 0x00 0x4000>;
1364 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1371 reg = <0x0 0xff650000 0x0 0x800>;
1372 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
1373 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1383 reg = <0x0 0xff650800 0x0 0x40>;
1384 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
1387 #iommu-cells = <0>;
1393 reg = <0x0 0xff660000 0x0 0x480>;
1394 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1404 reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
1405 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1409 #iommu-cells = <0>;
1414 reg = <0x0 0xff670800 0x0 0x40>;
1415 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
1418 #iommu-cells = <0>;
1424 reg = <0x0 0xff680000 0x0 0x10000>;
1425 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
1435 reg = <0x0 0xff690000 0x0 0x80>;
1443 reg = <0x07 0x10>;
1446 reg = <0x17 0x1>;
1449 reg = <0x18 0x1>;
1452 reg = <0x19 0x1>;
1455 reg = <0x1a 0x1>;
1458 reg = <0x1b 0x1>;
1461 reg = <0x1c 0x1>;
1467 reg = <0x0 0xff6d0000 0x0 0x4000>;
1468 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
1469 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
1478 reg = <0x0 0xff6e0000 0x0 0x4000>;
1479 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
1480 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
1489 reg = <0x0 0xff750000 0x0 0x1000>;
1501 reg = <0x0 0xff760000 0x0 0x1000>;
1535 reg = <0x0 0xff770000 0x0 0x10000>;
1551 #phy-cells = <0>;
1557 reg = <0xe450 0x10>;
1560 #clock-cells = <0>;
1565 #phy-cells = <0>;
1566 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
1572 #phy-cells = <0>;
1573 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
1574 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
1575 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
1584 reg = <0xe460 0x10>;
1587 #clock-cells = <0>;
1592 #phy-cells = <0>;
1593 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
1599 #phy-cells = <0>;
1600 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
1601 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
1602 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
1611 reg = <0xf780 0x24>;
1615 #phy-cells = <0>;
1632 reg = <0x0 0xff7c0000 0x0 0x40000>;
1647 #phy-cells = <0>;
1651 #phy-cells = <0>;
1657 reg = <0x0 0xff800000 0x0 0x40000>;
1672 #phy-cells = <0>;
1676 #phy-cells = <0>;
1682 reg = <0x0 0xff848000 0x0 0x100>;
1684 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
1689 reg = <0x0 0xff850000 0x0 0x1000>;
1690 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0>;
1697 reg = <0x0 0xff870000 0x0 0x1000>;
1698 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>;
1704 pinctrl-0 = <&spdif_bus>;
1706 #sound-dai-cells = <0>;
1712 reg = <0x0 0xff880000 0x0 0x1000>;
1714 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH 0>;
1715 dmas = <&dmac_bus 0>, <&dmac_bus 1>;
1720 pinctrl-0 = <&i2s0_8ch_bus>;
1723 #sound-dai-cells = <0>;
1729 reg = <0x0 0xff890000 0x0 0x1000>;
1730 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 0>;
1736 pinctrl-0 = <&i2s1_2ch_bus>;
1738 #sound-dai-cells = <0>;
1744 reg = <0x0 0xff8a0000 0x0 0x1000>;
1745 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 0>;
1751 #sound-dai-cells = <0>;
1757 reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
1758 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1771 #size-cells = <0>;
1773 vopl_out_mipi: endpoint@0 {
1774 reg = <0>;
1802 reg = <0x0 0xff8f3f00 0x0 0x100>;
1803 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1807 #iommu-cells = <0>;
1813 reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
1814 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1827 #size-cells = <0>;
1829 vopb_out_edp: endpoint@0 {
1830 reg = <0>;
1858 reg = <0x0 0xff903f00 0x0 0x100>;
1859 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1863 #iommu-cells = <0>;
1869 reg = <0x0 0xff910000 0x0 0x4000>;
1870 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1883 #size-cells = <0>;
1885 port@0 {
1886 reg = <0>;
1888 #size-cells = <0>;
1895 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1896 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1899 #iommu-cells = <0>;
1906 reg = <0x0 0xff920000 0x0 0x4000>;
1907 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
1920 #size-cells = <0>;
1922 port@0 {
1923 reg = <0>;
1925 #size-cells = <0>;
1932 reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
1933 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
1936 #iommu-cells = <0>;
1958 reg = <0x0 0xff940000 0x0 0x20000>;
1959 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
1969 #sound-dai-cells = <0>;
1975 #size-cells = <0>;
1977 hdmi_in_vopb: endpoint@0 {
1978 reg = <0>;
1991 reg = <0x0 0xff960000 0x0 0x8000>;
1992 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
2001 #size-cells = <0>;
2006 #size-cells = <0>;
2008 mipi_in: port@0 {
2009 reg = <0>;
2011 #size-cells = <0>;
2013 mipi_in_vopb: endpoint@0 {
2014 reg = <0>;
2032 reg = <0x0 0xff968000 0x0 0x8000>;
2033 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
2042 #size-cells = <0>;
2043 #phy-cells = <0>;
2048 #size-cells = <0>;
2050 mipi1_in: port@0 {
2051 reg = <0>;
2053 #size-cells = <0>;
2055 mipi1_in_vopb: endpoint@0 {
2056 reg = <0>;
2074 reg = <0x0 0xff970000 0x0 0x8000>;
2075 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
2079 pinctrl-0 = <&edp_hpd>;
2088 #size-cells = <0>;
2090 edp_in: port@0 {
2091 reg = <0>;
2093 #size-cells = <0>;
2095 edp_in_vopb: endpoint@0 {
2096 reg = <0>;
2114 reg = <0x0 0xff9a0000 0x0 0x10000>;
2115 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
2116 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
2117 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>;
2136 reg = <0x0 0xff720000 0x0 0x100>;
2138 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
2141 #gpio-cells = <0x2>;
2144 #interrupt-cells = <0x2>;
2149 reg = <0x0 0xff730000 0x0 0x100>;
2151 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
2154 #gpio-cells = <0x2>;
2157 #interrupt-cells = <0x2>;
2162 reg = <0x0 0xff780000 0x0 0x100>;
2164 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
2167 #gpio-cells = <0x2>;
2170 #interrupt-cells = <0x2>;
2175 reg = <0x0 0xff788000 0x0 0x100>;
2177 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
2180 #gpio-cells = <0x2>;
2183 #interrupt-cells = <0x2>;
2188 reg = <0x0 0xff790000 0x0 0x100>;
2190 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
2193 #gpio-cells = <0x2>;
2196 #interrupt-cells = <0x2>;
2300 rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
2564 <0 RK_PA3 1 &pcfg_pull_up>;
2569 <0 RK_PA4 1 &pcfg_pull_up>;
2599 <0 RK_PA7 1 &pcfg_pull_up>;
2604 <0 RK_PB0 1 &pcfg_pull_up>;
2614 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
2751 <0 RK_PA0 1 &pcfg_pull_none>;
2761 <0 RK_PB0 3 &pcfg_pull_none>;
2908 <0 RK_PA6 1 &pcfg_pull_none>;