Lines Matching +full:ns +full:- +full:cru
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
19 stdout-path = "serial2:115200n8";
28 * - Rails that only connect to the EC (or devices that the EC talks to)
30 * - Rails _are_ included if the rails go to the AP even if the AP
39 * - The EC controls the enable and the EC always enables a rail as
41 * - The rails are actually connected to each other by a jumper and
46 ppvar_sys: ppvar-sys {
47 compatible = "regulator-fixed";
48 regulator-name = "ppvar_sys";
49 regulator-always-on;
50 regulator-boot-on;
53 pp1200_lpddr: pp1200-lpddr {
54 compatible = "regulator-fixed";
55 regulator-name = "pp1200_lpddr";
58 regulator-always-on;
59 regulator-boot-on;
60 regulator-min-microvolt = <1200000>;
61 regulator-max-microvolt = <1200000>;
63 vin-supply = <&ppvar_sys>;
67 compatible = "regulator-fixed";
68 regulator-name = "pp1800";
71 regulator-always-on;
72 regulator-boot-on;
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <1800000>;
76 vin-supply = <&ppvar_sys>;
80 compatible = "regulator-fixed";
81 regulator-name = "pp3300";
84 regulator-always-on;
85 regulator-boot-on;
86 regulator-min-microvolt = <3300000>;
87 regulator-max-microvolt = <3300000>;
89 vin-supply = <&ppvar_sys>;
93 compatible = "regulator-fixed";
94 regulator-name = "pp5000";
97 regulator-always-on;
98 regulator-boot-on;
99 regulator-min-microvolt = <5000000>;
100 regulator-max-microvolt = <5000000>;
102 vin-supply = <&ppvar_sys>;
105 ppvar_bigcpu_pwm: ppvar-bigcpu-pwm {
106 compatible = "pwm-regulator";
107 regulator-name = "ppvar_bigcpu_pwm";
110 pwm-supply = <&ppvar_sys>;
111 pwm-dutycycle-range = <100 0>;
112 pwm-dutycycle-unit = <100>;
115 regulator-always-on;
116 regulator-boot-on;
117 regulator-min-microvolt = <800107>;
118 regulator-max-microvolt = <1302232>;
121 ppvar_bigcpu: ppvar-bigcpu {
122 compatible = "vctrl-regulator";
123 regulator-name = "ppvar_bigcpu";
125 regulator-min-microvolt = <800107>;
126 regulator-max-microvolt = <1302232>;
128 ctrl-supply = <&ppvar_bigcpu_pwm>;
129 ctrl-voltage-range = <800107 1302232>;
131 regulator-settling-time-up-us = <322>;
134 ppvar_litcpu_pwm: ppvar-litcpu-pwm {
135 compatible = "pwm-regulator";
136 regulator-name = "ppvar_litcpu_pwm";
139 pwm-supply = <&ppvar_sys>;
140 pwm-dutycycle-range = <100 0>;
141 pwm-dutycycle-unit = <100>;
144 regulator-always-on;
145 regulator-boot-on;
146 regulator-min-microvolt = <797743>;
147 regulator-max-microvolt = <1307837>;
150 ppvar_litcpu: ppvar-litcpu {
151 compatible = "vctrl-regulator";
152 regulator-name = "ppvar_litcpu";
154 regulator-min-microvolt = <797743>;
155 regulator-max-microvolt = <1307837>;
157 ctrl-supply = <&ppvar_litcpu_pwm>;
158 ctrl-voltage-range = <797743 1307837>;
160 regulator-settling-time-up-us = <384>;
163 ppvar_gpu_pwm: ppvar-gpu-pwm {
164 compatible = "pwm-regulator";
165 regulator-name = "ppvar_gpu_pwm";
168 pwm-supply = <&ppvar_sys>;
169 pwm-dutycycle-range = <100 0>;
170 pwm-dutycycle-unit = <100>;
173 regulator-always-on;
174 regulator-boot-on;
175 regulator-min-microvolt = <786384>;
176 regulator-max-microvolt = <1217747>;
179 ppvar_gpu: ppvar-gpu {
180 compatible = "vctrl-regulator";
181 regulator-name = "ppvar_gpu";
183 regulator-min-microvolt = <786384>;
184 regulator-max-microvolt = <1217747>;
186 ctrl-supply = <&ppvar_gpu_pwm>;
187 ctrl-voltage-range = <786384 1217747>;
189 regulator-settling-time-up-us = <390>;
193 pp900_ddrpll: pp900-ap {
197 pp900_pll: pp900-ap {
201 pp900_pmu: pp900-ap {
228 pp3000_sd_slot: pp3000-sd-slot {
229 compatible = "regulator-fixed";
230 regulator-name = "pp3000_sd_slot";
231 pinctrl-names = "default";
232 pinctrl-0 = <&sd_slot_pwr_en>;
234 enable-active-high;
237 vin-supply = <&pp3000>;
241 * Technically, this is a small abuse of 'regulator-gpio'; this
246 ppvar_sd_card_io: ppvar-sd-card-io {
247 compatible = "regulator-gpio";
248 regulator-name = "ppvar_sd_card_io";
249 pinctrl-names = "default";
250 pinctrl-0 = <&sd_io_pwr_en &sd_pwr_1800_sel>;
252 enable-active-high;
253 enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
258 regulator-min-microvolt = <1800000>;
259 regulator-max-microvolt = <3000000>;
263 pp3300_trackpad: pp3300-trackpad {
270 ap_rtc_clk: ap-rtc-clk {
271 compatible = "fixed-clock";
272 clock-frequency = <32768>;
273 clock-output-names = "xin32k";
274 #clock-cells = <0>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&sdmode_en>;
281 sdmode-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
282 sdmode-delay = <2>;
283 #sound-dai-cells = <0>;
288 compatible = "rockchip,rk3399-gru-sound";
316 opp-suspend;
322 opp-suspend;
327 cpu-supply = <&ppvar_litcpu>;
331 cpu-supply = <&ppvar_litcpu>;
335 cpu-supply = <&ppvar_litcpu>;
339 cpu-supply = <&ppvar_litcpu>;
343 cpu-supply = <&ppvar_bigcpu>;
347 cpu-supply = <&ppvar_bigcpu>;
351 &cru {
352 assigned-clocks =
353 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
354 <&cru PLL_NPLL>,
355 <&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
356 <&cru PCLK_PERIHP>,
357 <&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
358 <&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
359 <&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
360 <&cru ACLK_VIO>, <&cru ACLK_HDCP>,
361 <&cru ACLK_GIC_PRE>,
362 <&cru PCLK_DDR>;
363 assigned-clock-rates =
383 rockchip,pd-idle-ns = <160>;
384 rockchip,sr-idle-ns = <10240>;
385 rockchip,sr-mc-gate-idle-ns = <40960>;
386 rockchip,srpd-lite-idle-ns = <61440>;
387 rockchip,standby-idle-ns = <81920>;
393 rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>;
394 rockchip,srpd-lite-idle-dis-freq-hz = <0>;
395 rockchip,standby-idle-dis-freq-hz = <928000000>;
400 opp-suspend;
409 mali-supply = <&ppvar_gpu>;
416 clock-frequency = <400000>;
419 i2c-scl-falling-time-ns = <50>;
420 i2c-scl-rising-time-ns = <300>;
426 clock-frequency = <400000>;
429 i2c-scl-falling-time-ns = <50>;
430 i2c-scl-rising-time-ns = <300>;
435 interrupt-parent = <&gpio1>;
437 clocks = <&cru SCLK_I2S_8CH_OUT>;
438 clock-names = "mclk";
439 dlg,micbias-lvl = <2600>;
440 dlg,mic-amp-in-sel = "diff";
441 pinctrl-names = "default";
442 pinctrl-0 = <&headset_int_l>;
443 VDD-supply = <&pp1800>;
444 VDDMIC-supply = <&pp3300>;
445 VDDIO-supply = <&pp1800>;
448 dlg,adc-1bit-rpt = <1>;
449 dlg,btn-avg = <4>;
450 dlg,btn-cfg = <50>;
451 dlg,mic-det-thr = <500>;
452 dlg,jack-ins-deb = <20>;
453 dlg,jack-det-rate = "32ms_64ms";
454 dlg,jack-rem-deb = <1>;
456 dlg,a-d-btn-thr = <0xa>;
457 dlg,d-b-btn-thr = <0x16>;
458 dlg,b-c-btn-thr = <0x21>;
459 dlg,c-mic-btn-thr = <0x3E>;
471 audio-supply = <&pp1800_audio>; /* APIO5_VDD; 3d 4a */
472 bt656-supply = <&pp1800_ap_io>; /* APIO2_VDD; 2a 2b */
473 gpio1830-supply = <&pp3000_ap>; /* APIO4_VDD; 4c 4d */
474 sdmmc-supply = <&ppvar_sd_card_io>; /* SDMMC0_VDD; 4b */
480 ep-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
481 pinctrl-names = "default";
482 pinctrl-0 = <&pcie_clkreqn_cpm>, <&wifi_perst_l>;
483 vpcie3v3-supply = <&pp3300_wifi_bt>;
484 vpcie1v8-supply = <&wlan_pd_n>; /* HACK: see &wlan_pd_n */
485 vpcie0v9-supply = <&pp900_pcie>;
489 #address-cells = <3>;
490 #size-cells = <2>;
503 pmu1830-supply = <&pp1800_pmu>; /* PMUIO2_VDD */
528 assigned-clock-rates = <150000000>;
530 bus-width = <8>;
531 mmc-hs400-1_8v;
532 mmc-hs400-enhanced-strobe;
533 non-removable;
542 * hooked to ground. Because we specified "cd-gpios" below dw_mmc
548 pinctrl-names = "default";
549 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_pin
552 bus-width = <4>;
553 cap-mmc-highspeed;
554 cap-sd-highspeed;
555 cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
556 disable-wp;
557 sd-uhs-sdr12;
558 sd-uhs-sdr25;
559 sd-uhs-sdr50;
560 sd-uhs-sdr104;
561 vmmc-supply = <&pp3000_sd_slot>;
562 vqmmc-supply = <&ppvar_sd_card_io>;
572 /delete-property/ pinctrl-0;
573 /delete-property/ pinctrl-names;
579 pinctrl-names = "default", "sleep";
580 pinctrl-1 = <&spi1_sleep>;
583 compatible = "jedec,spi-nor";
587 spi-max-frequency = <10000000>;
599 compatible = "google,cros-ec-spi";
601 interrupt-parent = <&gpio0>;
603 pinctrl-names = "default";
604 pinctrl-0 = <&ec_ap_int_l>;
605 spi-max-frequency = <3000000>;
607 i2c_tunnel: i2c-tunnel {
608 compatible = "google,cros-ec-i2c-tunnel";
609 google,remote-bus = <4>;
610 #address-cells = <1>;
611 #size-cells = <0>;
615 compatible = "google,extcon-usbc-cros-ec";
616 google,usb-port-id = <0>;
624 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
625 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
687 #include <arm/cros-ec-keyboard.dtsi>
688 #include <arm/cros-ec-sbs.dtsi>
697 pinctrl-names = "default";
698 pinctrl-0 = <
699 &ap_pwroff /* AP will auto-assert this when in S3 */
703 pcfg_output_low: pcfg-output-low {
704 output-low;
707 pcfg_output_high: pcfg-output-high {
708 output-high;
711 pcfg_pull_none_8ma: pcfg-pull-none-8ma {
712 bias-disable;
713 drive-strength = <8>;
716 backlight-enable {
717 bl_en: bl-en {
722 cros-ec {
723 ec_ap_int_l: ec-ap-int-l {
728 discrete-regulators {
729 sd_io_pwr_en: sd-io-pwr-en {
734 sd_pwr_1800_sel: sd-pwr-1800-sel {
739 sd_slot_pwr_en: sd-slot-pwr-en {
747 headset_int_l: headset-int-l {
751 mic_int: mic-int {
757 sdmode_en: sdmode-en {
763 pcie_clkreqn_cpm: pci-clkreqn-cpm {
767 * de-assert it along and make ClockPM(CPM) work.
778 sdmmc_bus4: sdmmc-bus4 {
786 sdmmc_clk: sdmmc-clk {
791 sdmmc_cmd: sdmmc-cmd {
805 sdmmc_cd: sdmmc-cd {
811 sdmmc_cd_pin: sdmmc-cd-pin {
817 spi1_sleep: spi1-sleep {
830 touch_int_l: touch-int-l {
834 touch_reset_l: touch-reset-l {
840 ap_i2c_tp_pu_en: ap-i2c-tp-pu-en {
844 trackpad_int_l: trackpad-int-l {
850 wlan_module_reset_l: wlan-module-reset-l {
854 bt_host_wake_l: bt-host-wake-l {
860 write-protect {
861 ap_fw_wp: ap-fw-wp {