Lines Matching +full:axi +full:- +full:adc
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g054-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
27 clock-frequency = <0>;
30 /* External CAN clock - to be overridden by boards that provide it */
31 can_clk: can-clk {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
38 extal_clk: extal-clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-150000000 {
50 opp-hz = /bits/ 64 <150000000>;
51 opp-microvolt = <1100000>;
52 clock-latency-ns = <300000>;
54 opp-300000000 {
55 opp-hz = /bits/ 64 <300000000>;
56 opp-microvolt = <1100000>;
57 clock-latency-ns = <300000>;
59 opp-600000000 {
60 opp-hz = /bits/ 64 <600000000>;
61 opp-microvolt = <1100000>;
62 clock-latency-ns = <300000>;
64 opp-1200000000 {
65 opp-hz = /bits/ 64 <1200000000>;
66 opp-microvolt = <1100000>;
67 clock-latency-ns = <300000>;
68 opp-suspend;
73 #address-cells = <1>;
74 #size-cells = <0>;
76 cpu-map {
88 compatible = "arm,cortex-a55";
91 #cooling-cells = <2>;
92 next-level-cache = <&L3_CA55>;
93 enable-method = "psci";
95 operating-points-v2 = <&cluster0_opp>;
99 compatible = "arm,cortex-a55";
102 next-level-cache = <&L3_CA55>;
103 enable-method = "psci";
105 operating-points-v2 = <&cluster0_opp>;
108 L3_CA55: cache-controller-0 {
110 cache-unified;
111 cache-size = <0x40000>;
112 cache-level = <3>;
116 gpu_opp_table: opp-table-1 {
117 compatible = "operating-points-v2";
119 opp-500000000 {
120 opp-hz = /bits/ 64 <500000000>;
121 opp-microvolt = <1100000>;
124 opp-400000000 {
125 opp-hz = /bits/ 64 <400000000>;
126 opp-microvolt = <1100000>;
129 opp-250000000 {
130 opp-hz = /bits/ 64 <250000000>;
131 opp-microvolt = <1100000>;
134 opp-200000000 {
135 opp-hz = /bits/ 64 <200000000>;
136 opp-microvolt = <1100000>;
139 opp-125000000 {
140 opp-hz = /bits/ 64 <125000000>;
141 opp-microvolt = <1100000>;
144 opp-100000000 {
145 opp-hz = /bits/ 64 <100000000>;
146 opp-microvolt = <1100000>;
149 opp-62500000 {
150 opp-hz = /bits/ 64 <62500000>;
151 opp-microvolt = <1100000>;
154 opp-50000000 {
155 opp-hz = /bits/ 64 <50000000>;
156 opp-microvolt = <1100000>;
161 compatible = "arm,cortex-a55-pmu";
162 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
166 compatible = "arm,psci-1.0", "arm,psci-0.2";
171 compatible = "simple-bus";
172 interrupt-parent = <&gic>;
173 #address-cells = <2>;
174 #size-cells = <2>;
178 compatible = "renesas,r9a07g054-mtu3",
179 "renesas,rz-mtu3";
225 interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
241 power-domains = <&cpg>;
243 #pwm-cells = <2>;
248 compatible = "renesas,r9a07g054-ssi",
249 "renesas,rz-ssi";
254 interrupt-names = "int_req", "dma_rx", "dma_tx";
258 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
261 dma-names = "tx", "rx";
262 power-domains = <&cpg>;
263 #sound-dai-cells = <0>;
268 compatible = "renesas,r9a07g054-ssi",
269 "renesas,rz-ssi";
274 interrupt-names = "int_req", "dma_rx", "dma_tx";
278 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
281 dma-names = "tx", "rx";
282 power-domains = <&cpg>;
283 #sound-dai-cells = <0>;
288 compatible = "renesas,r9a07g054-ssi",
289 "renesas,rz-ssi";
293 interrupt-names = "int_req", "dma_rt";
297 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
300 dma-names = "rt";
301 power-domains = <&cpg>;
302 #sound-dai-cells = <0>;
307 compatible = "renesas,r9a07g054-ssi",
308 "renesas,rz-ssi";
313 interrupt-names = "int_req", "dma_rx", "dma_tx";
317 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
320 dma-names = "tx", "rx";
321 power-domains = <&cpg>;
322 #sound-dai-cells = <0>;
327 compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
332 interrupt-names = "error", "rx", "tx";
336 dma-names = "tx", "rx";
337 power-domains = <&cpg>;
338 num-cs = <1>;
339 #address-cells = <1>;
340 #size-cells = <0>;
345 compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
350 interrupt-names = "error", "rx", "tx";
354 dma-names = "tx", "rx";
355 power-domains = <&cpg>;
356 num-cs = <1>;
357 #address-cells = <1>;
358 #size-cells = <0>;
363 compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
368 interrupt-names = "error", "rx", "tx";
372 dma-names = "tx", "rx";
373 power-domains = <&cpg>;
374 num-cs = <1>;
375 #address-cells = <1>;
376 #size-cells = <0>;
381 compatible = "renesas,scif-r9a07g054",
382 "renesas,scif-r9a07g044";
390 interrupt-names = "eri", "rxi", "txi",
393 clock-names = "fck";
394 power-domains = <&cpg>;
400 compatible = "renesas,scif-r9a07g054",
401 "renesas,scif-r9a07g044";
409 interrupt-names = "eri", "rxi", "txi",
412 clock-names = "fck";
413 power-domains = <&cpg>;
419 compatible = "renesas,scif-r9a07g054",
420 "renesas,scif-r9a07g044";
428 interrupt-names = "eri", "rxi", "txi",
431 clock-names = "fck";
432 power-domains = <&cpg>;
438 compatible = "renesas,scif-r9a07g054",
439 "renesas,scif-r9a07g044";
447 interrupt-names = "eri", "rxi", "txi",
450 clock-names = "fck";
451 power-domains = <&cpg>;
457 compatible = "renesas,scif-r9a07g054",
458 "renesas,scif-r9a07g044";
466 interrupt-names = "eri", "rxi", "txi",
469 clock-names = "fck";
470 power-domains = <&cpg>;
476 compatible = "renesas,r9a07g054-sci", "renesas,sci";
482 interrupt-names = "eri", "rxi", "txi", "tei";
484 clock-names = "fck";
485 power-domains = <&cpg>;
491 compatible = "renesas,r9a07g054-sci", "renesas,sci";
497 interrupt-names = "eri", "rxi", "txi", "tei";
499 clock-names = "fck";
500 power-domains = <&cpg>;
506 compatible = "renesas,r9a07g054-canfd", "renesas,rzg2l-canfd";
516 interrupt-names = "g_err", "g_recc",
522 clock-names = "fck", "canfd", "can_clk";
523 assigned-clocks = <&cpg CPG_CORE R9A07G054_CLK_P0_DIV2>;
524 assigned-clock-rates = <50000000>;
527 reset-names = "rstp_n", "rstc_n";
528 power-domains = <&cpg>;
540 #address-cells = <1>;
541 #size-cells = <0>;
542 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
552 interrupt-names = "tei", "ri", "ti", "spi", "sti",
555 clock-frequency = <100000>;
557 power-domains = <&cpg>;
562 #address-cells = <1>;
563 #size-cells = <0>;
564 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
574 interrupt-names = "tei", "ri", "ti", "spi", "sti",
577 clock-frequency = <100000>;
579 power-domains = <&cpg>;
584 #address-cells = <1>;
585 #size-cells = <0>;
586 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
596 interrupt-names = "tei", "ri", "ti", "spi", "sti",
599 clock-frequency = <100000>;
601 power-domains = <&cpg>;
606 #address-cells = <1>;
607 #size-cells = <0>;
608 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
618 interrupt-names = "tei", "ri", "ti", "spi", "sti",
621 clock-frequency = <100000>;
623 power-domains = <&cpg>;
627 adc: adc@10059000 { label
628 compatible = "renesas,r9a07g054-adc", "renesas,rzg2l-adc";
633 clock-names = "adclk", "pclk";
636 reset-names = "presetn", "adrst-n";
637 power-domains = <&cpg>;
640 #address-cells = <1>;
641 #size-cells = <0>;
670 compatible = "renesas,r9a07g054-tsu",
671 "renesas,rzg2l-tsu";
675 power-domains = <&cpg>;
676 #thermal-sensor-cells = <1>;
680 compatible = "renesas,r9a07g054-rpc-if",
681 "renesas,rzg2l-rpc-if";
685 reg-names = "regs", "dirmap", "wbuf";
690 power-domains = <&cpg>;
691 #address-cells = <1>;
692 #size-cells = <0>;
697 compatible = "renesas,r9a07g054-cru", "renesas,rzg2l-cru";
702 clock-names = "video", "apb", "axi";
706 interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";
709 reset-names = "presetn", "aresetn";
710 power-domains = <&cpg>;
714 #address-cells = <1>;
715 #size-cells = <0>;
718 #address-cells = <1>;
719 #size-cells = <0>;
728 #address-cells = <1>;
729 #size-cells = <0>;
734 remote-endpoint = <&csi2cru>;
741 compatible = "renesas,r9a07g054-csi2", "renesas,rzg2l-csi2";
747 clock-names = "system", "video", "apb";
750 reset-names = "presetn", "cmn-rstb";
751 power-domains = <&cpg>;
755 #address-cells = <1>;
756 #size-cells = <0>;
763 #address-cells = <1>;
764 #size-cells = <0>;
769 remote-endpoint = <&crucsi2>;
776 compatible = "renesas,r9a07g054-mipi-dsi",
777 "renesas,rzg2l-mipi-dsi";
786 interrupt-names = "seq0", "seq1", "vin1", "rcv",
794 clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
798 reset-names = "rst", "arst", "prst";
799 power-domains = <&cpg>;
804 compatible = "renesas,r9a07g054-vsp2",
805 "renesas,r9a07g044-vsp2";
811 clock-names = "aclk", "pclk", "vclk";
812 power-domains = <&cpg>;
818 compatible = "renesas,r9a07g054-fcpvd",
824 clock-names = "aclk", "pclk", "vclk";
825 power-domains = <&cpg>;
829 cpg: clock-controller@11010000 {
830 compatible = "renesas,r9a07g054-cpg";
833 clock-names = "extal";
834 #clock-cells = <2>;
835 #reset-cells = <1>;
836 #power-domain-cells = <0>;
839 sysc: system-controller@11020000 {
840 compatible = "renesas,r9a07g054-sysc";
846 interrupt-names = "lpm_int", "ca55stbydone_int",
852 compatible = "renesas,r9a07g054-pinctrl",
853 "renesas,r9a07g044-pinctrl";
855 gpio-controller;
856 #gpio-cells = <2>;
857 #interrupt-cells = <2>;
858 interrupt-parent = <&irqc>;
859 interrupt-controller;
860 gpio-ranges = <&pinctrl 0 0 392>;
862 power-domains = <&cpg>;
868 irqc: interrupt-controller@110a0000 {
869 compatible = "renesas,r9a07g054-irqc",
870 "renesas,rzg2l-irqc";
871 #interrupt-cells = <2>;
872 #address-cells = <0>;
873 interrupt-controller;
918 clock-names = "clk", "pclk";
919 power-domains = <&cpg>;
923 dmac: dma-controller@11820000 {
924 compatible = "renesas,r9a07g054-dmac",
925 "renesas,rz-dmac";
945 interrupt-names = "error",
952 clock-names = "main", "register";
953 power-domains = <&cpg>;
956 reset-names = "arst", "rst_async";
957 #dma-cells = <1>;
958 dma-channels = <16>;
962 compatible = "renesas,r9a07g054-mali",
963 "arm,mali-bifrost";
969 interrupt-names = "job", "mmu", "gpu", "event";
973 clock-names = "gpu", "bus", "bus_ace";
974 power-domains = <&cpg>;
978 reset-names = "rst", "axi_rst", "ace_rst";
979 operating-points-v2 = <&gpu_opp_table>;
982 gic: interrupt-controller@11900000 {
983 compatible = "arm,gic-v3";
984 #interrupt-cells = <3>;
985 #address-cells = <0>;
986 interrupt-controller;
993 compatible = "renesas,sdhi-r9a07g054",
994 "renesas,rcar-gen3-sdhi";
1002 clock-names = "core", "clkh", "cd", "aclk";
1004 power-domains = <&cpg>;
1009 compatible = "renesas,sdhi-r9a07g054",
1010 "renesas,rcar-gen3-sdhi";
1018 clock-names = "core", "clkh", "cd", "aclk";
1020 power-domains = <&cpg>;
1025 compatible = "renesas,r9a07g054-gbeth",
1026 "renesas,rzg2l-gbeth";
1031 interrupt-names = "mux", "fil", "arp_ns";
1032 phy-mode = "rgmii";
1036 clock-names = "axi", "chi", "refclk";
1038 power-domains = <&cpg>;
1039 #address-cells = <1>;
1040 #size-cells = <0>;
1045 compatible = "renesas,r9a07g054-gbeth",
1046 "renesas,rzg2l-gbeth";
1051 interrupt-names = "mux", "fil", "arp_ns";
1052 phy-mode = "rgmii";
1056 clock-names = "axi", "chi", "refclk";
1058 power-domains = <&cpg>;
1059 #address-cells = <1>;
1060 #size-cells = <0>;
1064 phyrst: usbphy-ctrl@11c40000 {
1065 compatible = "renesas,r9a07g054-usbphy-ctrl",
1066 "renesas,rzg2l-usbphy-ctrl";
1070 power-domains = <&cpg>;
1071 #reset-cells = <1>;
1076 compatible = "generic-ohci";
1084 phy-names = "usb";
1085 power-domains = <&cpg>;
1090 compatible = "generic-ohci";
1098 phy-names = "usb";
1099 power-domains = <&cpg>;
1104 compatible = "generic-ehci";
1112 phy-names = "usb";
1114 power-domains = <&cpg>;
1119 compatible = "generic-ehci";
1127 phy-names = "usb";
1129 power-domains = <&cpg>;
1133 usb2_phy0: usb-phy@11c50200 {
1134 compatible = "renesas,usb2-phy-r9a07g054",
1135 "renesas,rzg2l-usb2-phy";
1141 #phy-cells = <1>;
1142 power-domains = <&cpg>;
1146 usb2_phy1: usb-phy@11c70200 {
1147 compatible = "renesas,usb2-phy-r9a07g054",
1148 "renesas,rzg2l-usb2-phy";
1154 #phy-cells = <1>;
1155 power-domains = <&cpg>;
1160 compatible = "renesas,usbhs-r9a07g054",
1161 "renesas,rza2-usbhs";
1173 phy-names = "usb";
1174 power-domains = <&cpg>;
1179 compatible = "renesas,r9a07g054-wdt",
1180 "renesas,rzg2l-wdt";
1184 clock-names = "pclk", "oscclk";
1187 interrupt-names = "wdt", "perrout";
1189 power-domains = <&cpg>;
1194 compatible = "renesas,r9a07g054-wdt",
1195 "renesas,rzg2l-wdt";
1199 clock-names = "pclk", "oscclk";
1202 interrupt-names = "wdt", "perrout";
1204 power-domains = <&cpg>;
1209 compatible = "renesas,r9a07g054-ostm",
1215 power-domains = <&cpg>;
1220 compatible = "renesas,r9a07g054-ostm",
1226 power-domains = <&cpg>;
1231 compatible = "renesas,r9a07g054-ostm",
1237 power-domains = <&cpg>;
1242 thermal-zones {
1243 cpu-thermal {
1244 polling-delay-passive = <250>;
1245 polling-delay = <1000>;
1246 thermal-sensors = <&tsu 0>;
1247 sustainable-power = <717>;
1249 cooling-maps {
1252 cooling-device = <&cpu0 0 2>;
1258 sensor_crit: sensor-crit {
1264 target: trip-point {
1274 compatible = "arm,armv8-timer";
1275 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,