Lines Matching +full:1 +full:a400
73 #address-cells = <1>;
116 gpu_opp_table: opp-table-1 {
402 ssi2: ssi@1004a400 {
453 num-cs = <1>;
454 #address-cells = <1>;
471 num-cs = <1>;
472 #address-cells = <1>;
489 num-cs = <1>;
490 #address-cells = <1>;
650 #address-cells = <1>;
672 #address-cells = <1>;
694 #address-cells = <1>;
716 #address-cells = <1>;
750 #address-cells = <1>;
756 channel@1 {
757 reg = <1>;
786 #thermal-sensor-cells = <1>;
801 #address-cells = <1>;
824 #address-cells = <1>;
828 #address-cells = <1>;
837 port@1 {
838 #address-cells = <1>;
841 reg = <1>;
865 #address-cells = <1>;
872 port@1 {
873 #address-cells = <1>;
875 reg = <1>;
913 #address-cells = <1>;
923 port@1 {
924 reg = <1>;
968 #address-cells = <1>;
978 port@1 {
979 reg = <1>;
990 #reset-cells = <1>;
1030 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
1088 "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1",
1089 "ec7tiovf-1";
1131 #dma-cells = <1>;
1213 #address-cells = <1>;
1233 #address-cells = <1>;
1245 #reset-cells = <1>;
1261 phys = <&usb2_phy0 1>;
1273 resets = <&phyrst 1>,
1275 phys = <&usb2_phy1 1>;
1302 resets = <&phyrst 1>,
1319 #phy-cells = <1>;
1331 resets = <&phyrst 1>;
1332 #phy-cells = <1>;