Lines Matching +full:master +full:- +full:dsi
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R-Car V4H ES3.0 Sparrow Hawk board
20 * CONN3 (HeadSet) ---+----> MSIOF1
22 * CONN4 AUX ---------+ on/off (A)
36 * > arecord -f cd xxx.wav
39 /dts-v1/;
40 #include <dt-bindings/gpio/gpio.h>
46 compatible = "retronix,sparrow-hawk", "renesas,r8a779g3",
65 stdout-path = "serial0:921600n8";
69 fan: pwm-fan {
70 pinctrl-0 = <&irq4_pins>;
71 pinctrl-names = "default";
72 compatible = "pwm-fan";
73 #cooling-cells = <2>;
74 interrupts-extended = <&intc_ex 4 IRQ_TYPE_EDGE_FALLING>;
77 * by user. Set "cooling-levels" DT property to single 255
83 * User has to configure "pwms" and "pulses-per-revolution"
85 * extend "cooling-levels = <0 m n ... 255>" property to
89 cooling-levels = <255>;
90 pulses-per-revolution = <2>;
98 * with MT62F1G64D8EK-023 WT:C LPDDR5 part populated on the board.
100 * A variant with 16 GiB MT62F2G64D8EK-023 WT:C part populated on
120 /* Page 27 / DSI to Display */
121 mini-dp-con {
122 compatible = "dp-connector";
124 type = "full-size";
128 remote-endpoint = <&sn65dsi86_out>;
134 pcie_refclk: clk-x8 {
135 compatible = "fixed-clock";
136 #clock-cells = <0>;
137 clock-frequency = <25000000>;
140 reg_1p2v: regulator-1p2v {
141 compatible = "regulator-fixed";
142 regulator-name = "fixed-1.2V";
143 regulator-min-microvolt = <1200000>;
144 regulator-max-microvolt = <1200000>;
145 regulator-boot-on;
146 regulator-always-on;
149 reg_1p8v: regulator-1p8v {
150 compatible = "regulator-fixed";
151 regulator-name = "fixed-1.8V";
152 regulator-min-microvolt = <1800000>;
153 regulator-max-microvolt = <1800000>;
154 regulator-boot-on;
155 regulator-always-on;
158 reg_3p3v: regulator-3p3v {
159 compatible = "regulator-fixed";
160 regulator-name = "fixed-3.3V";
161 regulator-min-microvolt = <3300000>;
162 regulator-max-microvolt = <3300000>;
163 regulator-boot-on;
164 regulator-always-on;
167 /* Page 27 / DSI to Display */
168 sn65dsi86_refclk: clk-x9 {
169 compatible = "fixed-clock";
170 #clock-cells = <0>;
171 clock-frequency = <38400000>;
176 compatible = "audio-graph-card2";
180 /* Page 17 uSD-Slot */
181 vcc_sdhi: regulator-vcc-sdhi {
182 compatible = "regulator-gpio";
183 regulator-name = "SDHI VccQ";
184 regulator-min-microvolt = <1800000>;
185 regulator-max-microvolt = <3300000>;
187 gpios-states = <1>;
193 clock-frequency = <24576000>;
198 pinctrl-0 = <&avb0_pins>;
199 pinctrl-names = "default";
200 phy-handle = <&avb0_phy>;
201 tx-internal-delay-ps = <2000>;
205 #address-cells = <1>;
206 #size-cells = <0>;
208 avb0_phy: ethernet-phy@0 { /* KSZ9031RNXVB */
209 compatible = "ethernet-phy-id0022.1622",
210 "ethernet-phy-ieee802.3-c22";
211 rxc-skew-ps = <1500>;
214 interrupts-extended = <&gpio7 5 IRQ_TYPE_LEVEL_LOW>;
216 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
217 reset-assert-us = <10000>;
218 reset-deassert-us = <300>;
225 clock-frequency = <40000000>;
230 pinctrl-0 = <&canfd3_pins>, <&canfd4_pins>, <&can_clk_pins>;
231 pinctrl-names = "default";
244 /* Page 27 / DSI to Display */
251 remote-endpoint = <&sn65dsi86_in>;
252 data-lanes = <1 2 3 4>;
258 /* Page 27 / DSI to Display */
263 /* Page 5 / R-Car V4H_INT_I2C */
265 clock-frequency = <16666666>;
268 /* Page 5 / R-Car V4H_INT_I2C */
270 clock-frequency = <32768>;
276 pcie-m2-oe-hog {
277 gpio-hog;
279 output-low;
280 line-name = "PCIe-CLK-nOE-M2";
284 pcie-usb-oe-hog {
285 gpio-hog;
287 output-low;
288 line-name = "PCIe-CLK-nOE-USB";
294 pinctrl-0 = <&hscif0_pins>;
295 pinctrl-names = "default";
296 uart-has-rtscts;
297 bootph-all;
304 pinctrl-0 = <&hscif1_pins>;
305 pinctrl-names = "default";
306 uart-has-rtscts;
313 pinctrl-0 = <&hscif3_pins>;
314 pinctrl-names = "default";
321 #address-cells = <1>;
322 #size-cells = <0>;
323 pinctrl-0 = <&i2c0_pins>;
324 pinctrl-names = "default";
325 clock-frequency = <400000>;
331 #address-cells = <1>;
332 #size-cells = <0>;
333 vdd-supply = <®_3p3v>;
337 #address-cells = <1>;
338 #size-cells = <0>;
340 /* Page 27 / DSI to Display */
342 pinctrl-0 = <&irq0_pins>;
343 pinctrl-names = "default";
349 clock-names = "refclk";
351 interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_HIGH>;
353 enable-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
355 vccio-supply = <®_1p8v>;
356 vpll-supply = <®_1p8v>;
357 vcca-supply = <®_1p2v>;
358 vcc-supply = <®_1p2v>;
361 #address-cells = <1>;
362 #size-cells = <0>;
367 remote-endpoint = <&dsi1_out>;
374 remote-endpoint = <&mini_dp_con_in>;
383 #address-cells = <1>;
384 #size-cells = <0>;
390 #sound-dai-cells = <0>;
394 clock-names = "mclk";
396 VDDA-supply = <®_1p8v>;
397 VDDMIC-supply = <®_3p3v>;
398 VDDIO-supply = <®_3p3v>;
402 bitclock-master;
403 frame-master;
404 remote-endpoint = <&msiof1_snd_endpoint>;
412 #address-cells = <1>;
413 #size-cells = <0>;
420 #clock-cells = <1>;
426 #address-cells = <1>;
427 #size-cells = <0>;
434 #address-cells = <1>;
435 #size-cells = <0>;
436 pinctrl-0 = <&i2c1_pins>;
437 pinctrl-names = "default";
442 #address-cells = <1>;
443 #size-cells = <0>;
444 pinctrl-0 = <&i2c2_pins>;
445 pinctrl-names = "default";
450 #address-cells = <1>;
451 #size-cells = <0>;
452 pinctrl-0 = <&i2c3_pins>;
453 pinctrl-names = "default";
458 #address-cells = <1>;
459 #size-cells = <0>;
460 pinctrl-0 = <&i2c4_pins>;
461 pinctrl-names = "default";
466 #address-cells = <1>;
467 #size-cells = <0>;
468 pinctrl-0 = <&i2c5_pins>;
469 pinctrl-names = "default";
472 /* Page 17 uSD-Slot */
474 pinctrl-0 = <&sd_pins>;
475 pinctrl-1 = <&sd_uhs_pins>;
476 pinctrl-names = "default", "state_uhs";
477 bus-width = <4>;
478 cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; /* SD_CD */
479 sd-uhs-sdr50;
480 sd-uhs-sdr104;
481 vmmc-supply = <®_3p3v>;
482 vqmmc-supply = <&vcc_sdhi>;
487 pinctrl-0 = <&msiof1_pins>;
488 pinctrl-names = "default";
493 /delete-property/#address-cells;
494 /delete-property/#size-cells;
498 remote-endpoint = <&da7212_endpoint>;
510 reset-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
516 vpcie3v3-supply = <®_3p3v>;
527 num-lanes = <1>;
528 reset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
534 vpcie3v3-supply = <®_3p3v>;
538 pinctrl-0 = <&scif_clk_pins>;
539 pinctrl-names = "default";
549 pins-mdio {
551 drive-strength = <21>;
554 pins-mii {
556 drive-strength = <21>;
562 can_clk_pins: can-clk {
633 /* Page 27 / DSI to Display */
673 bootph-all;
677 scif_clk_pins: scif-clk {
682 /* Page 17 uSD-Slot */
686 power-source = <3300>;
689 /* Page 17 uSD-Slot */
690 sd_uhs_pins: sd-uhs {
693 power-source = <1800>;
703 sound_clk_pins: sound-clk {
711 pinctrl-0 = <&pwm0_pins>;
712 pinctrl-names = "default";
718 pinctrl-0 = <&pwm1_pins>;
719 pinctrl-names = "default";
725 pinctrl-0 = <&pwm6_pins>;
726 pinctrl-names = "default";
732 pinctrl-0 = <&pwm7_pins>;
733 pinctrl-names = "default";
739 pinctrl-0 = <&sound_clk_pins>;
740 pinctrl-names = "default";
745 clock-frequency = <12288000>; /* 48 kHz groups */
752 pinctrl-0 = <&qspi0_pins>;
753 pinctrl-names = "default";
754 bootph-all;
759 compatible = "spansion,s25fs512s", "jedec,spi-nor";
761 spi-max-frequency = <40000000>;
762 spi-rx-bus-width = <4>;
763 spi-tx-bus-width = <4>;
764 bootph-all;
767 compatible = "fixed-partitions";
768 #address-cells = <1>;
769 #size-cells = <1>;
773 read-only;
792 timeout-sec = <60>;
798 clock-frequency = <24000000>;