Lines Matching +full:0 +full:xec500000
19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
38 #clock-cells = <0>;
39 clock-frequency = <0>;
44 #size-cells = <0>;
46 a53_0: cpu@0 {
48 reg = <0x0>;
65 #clock-cells = <0>;
67 clock-frequency = <0>;
82 #clock-cells = <0>;
83 clock-frequency = <0>;
96 reg = <0 0xe6020000 0 0x0c>;
107 reg = <0 0xe6050000 0 0x50>;
111 gpio-ranges = <&pfc 0 0 9>;
122 reg = <0 0xe6051000 0 0x50>;
126 gpio-ranges = <&pfc 0 32 32>;
137 reg = <0 0xe6052000 0 0x50>;
141 gpio-ranges = <&pfc 0 64 32>;
152 reg = <0 0xe6053000 0 0x50>;
156 gpio-ranges = <&pfc 0 96 10>;
167 reg = <0 0xe6054000 0 0x50>;
171 gpio-ranges = <&pfc 0 128 32>;
182 reg = <0 0xe6055000 0 0x50>;
186 gpio-ranges = <&pfc 0 160 21>;
197 reg = <0 0xe6055400 0 0x50>;
201 gpio-ranges = <&pfc 0 192 14>;
211 reg = <0 0xe6060000 0 0x508>;
217 reg = <0 0xe60f0000 0 0x1004>;
230 reg = <0 0xe6130000 0 0x1004>;
249 reg = <0 0xe6140000 0 0x1004>;
268 reg = <0 0xe6148000 0 0x1004>;
286 reg = <0 0xe6150000 0 0x1000>;
290 #power-domain-cells = <0>;
296 reg = <0 0xe6160000 0 0x0200>;
301 reg = <0 0xe6180000 0 0x0400>;
307 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
314 #thermal-sensor-cells = <0>;
321 reg = <0 0xe61c0000 0 0x200>;
322 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
335 reg = <0 0xe61e0000 0 0x30>;
348 reg = <0 0xe6fc0000 0 0x30>;
361 reg = <0 0xe6fd0000 0 0x30>;
374 reg = <0 0xe6fe0000 0 0x30>;
387 reg = <0 0xffc00000 0 0x30>;
400 #size-cells = <0>;
403 reg = <0 0xe6500000 0 0x40>;
408 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
409 <&dmac2 0x91>, <&dmac2 0x90>;
417 #size-cells = <0>;
420 reg = <0 0xe6508000 0 0x40>;
425 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
426 <&dmac2 0x93>, <&dmac2 0x92>;
434 #size-cells = <0>;
437 reg = <0 0xe6510000 0 0x40>;
442 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
443 <&dmac2 0x95>, <&dmac2 0x94>;
451 #size-cells = <0>;
454 reg = <0 0xe66d0000 0 0x40>;
459 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
469 reg = <0 0xe6540000 0 0x60>;
475 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
476 <&dmac2 0x31>, <&dmac2 0x30>;
487 reg = <0 0xe66a0000 0 0x60>;
493 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
503 reg = <0 0xe6590000 0 0x200>;
506 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
507 <&usb_dmac1 0>, <&usb_dmac1 1>;
520 reg = <0 0xe65a0000 0 0x100>;
534 reg = <0 0xe65b0000 0 0x100>;
548 reg = <0x0 0xe6601000 0 0x1000>;
557 reg = <0 0xe66c0000 0 0x8000>;
583 reg = <0 0xe6700000 0 0x10000>;
602 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
611 reg = <0 0xe7300000 0 0x10000>;
630 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
639 reg = <0 0xe7310000 0 0x10000>;
666 reg = <0 0xe6740000 0 0x1000>;
667 renesas,ipmmu-main = <&ipmmu_mm 0>;
674 reg = <0 0xe7740000 0 0x1000>;
682 reg = <0 0xe6570000 0 0x1000>;
690 reg = <0 0xe67b0000 0 0x1000>;
699 reg = <0 0xec670000 0 0x1000>;
707 reg = <0 0xfd800000 0 0x1000>;
715 reg = <0 0xffc80000 0 0x1000>;
723 reg = <0 0xfe6b0000 0 0x1000>;
731 reg = <0 0xfebd0000 0 0x1000>;
739 reg = <0 0xfe990000 0 0x1000>;
748 reg = <0 0xe6800000 0 0x800>;
789 #size-cells = <0>;
796 reg = <0 0xe6c30000 0 0x1000>;
812 reg = <0 0xe6c38000 0 0x1000>;
827 reg = <0 0xe6e30000 0 0x8>;
837 reg = <0 0xe6e31000 0 0x8>;
847 reg = <0 0xe6e32000 0 0x8>;
857 reg = <0 0xe6e33000 0 0x8>;
868 reg = <0 0xe6e60000 0 64>;
874 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
875 <&dmac2 0x51>, <&dmac2 0x50>;
885 reg = <0 0xe6e68000 0 64>;
891 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
892 <&dmac2 0x53>, <&dmac2 0x52>;
902 reg = <0 0xe6e88000 0 64>;
908 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
909 <&dmac2 0x13>, <&dmac2 0x12>;
919 reg = <0 0xe6c50000 0 64>;
925 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
935 reg = <0 0xe6c40000 0 64>;
941 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
951 reg = <0 0xe6f30000 0 64>;
957 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
958 <&dmac2 0x5b>, <&dmac2 0x5a>;
968 reg = <0 0xe6e90000 0 0x64>;
971 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
972 <&dmac2 0x41>, <&dmac2 0x40>;
977 #size-cells = <0>;
984 reg = <0 0xe6ea0000 0 0x64>;
987 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
988 <&dmac2 0x43>, <&dmac2 0x42>;
993 #size-cells = <0>;
1000 reg = <0 0xe6c00000 0 0x64>;
1003 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1008 #size-cells = <0>;
1015 reg = <0 0xe6c10000 0 0x64>;
1018 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1023 #size-cells = <0>;
1029 reg = <0 0xe6ef4000 0 0x1000>;
1042 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1048 * clkout : #clock-cells = <0>; <&rcar_sound>;
1052 reg = <0 0xec500000 0 0x1000>, /* SCU */
1053 <0 0xec5a0000 0 0x100>, /* ADG */
1054 <0 0xec540000 0 0x1000>, /* SSIU */
1055 <0 0xec541000 0 0x280>, /* SSI */
1056 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1070 "mix.1", "mix.0",
1071 "ctu.1", "ctu.0",
1072 "dvc.0", "dvc.1",
1082 ctu00: ctu-0 { };
1093 dvc0: dvc-0 {
1094 dmas = <&audma0 0xbc>;
1098 dmas = <&audma0 0xbe>;
1104 mix0: mix-0 { };
1111 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1116 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1124 dmas = <&audma0 0x07>, <&audma0 0x08>,
1125 <&audma0 0x6f>, <&audma0 0x70>;
1130 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1131 <&audma0 0x71>, <&audma0 0x72>;
1140 reg = <0 0xec520000 0 0x800>;
1152 reg = <0 0xec700000 0 0x10000>;
1181 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1193 reg = <0 0xee080000 0 0x100>;
1205 reg = <0 0xee080100 0 0x100>;
1219 reg = <0 0xee080200 0 0x700>;
1231 reg = <0 0xee140000 0 0x2000>;
1245 reg = <0 0xee200000 0 0x200>,
1246 <0 0x08000000 0 0x04000000>,
1247 <0 0xee208000 0 0x100>;
1254 #size-cells = <0>;
1261 #address-cells = <0>;
1263 reg = <0x0 0xf1010000 0 0x1000>,
1264 <0x0 0xf1020000 0 0x20000>,
1265 <0x0 0xf1040000 0 0x20000>,
1266 <0x0 0xf1060000 0 0x20000>;
1277 reg = <0 0xfe960000 0 0x8000>;
1287 reg = <0 0xfea20000 0 0x5000>;
1297 reg = <0 0xfea28000 0 0x5000>;
1307 reg = <0 0xfe96f000 0 0x200>;
1316 reg = <0 0xfea27000 0 0x200>;
1325 reg = <0 0xfea2f000 0 0x200>;
1335 reg = <0 0xfea40000 0 0x1000>;
1344 reg = <0 0xfea50000 0 0x1000>;
1352 reg = <0 0xfeb00000 0 0x40000>;
1356 clock-names = "du.0", "du.1";
1358 reset-names = "du.0";
1361 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1367 #size-cells = <0>;
1369 port@0 {
1370 reg = <0>;
1391 reg = <0 0xfeb90000 0 0x20>;
1401 #size-cells = <0>;
1403 port@0 {
1404 reg = <0>;
1418 reg = <0 0xfeb90100 0 0x20>;
1426 #size-cells = <0>;
1428 port@0 {
1429 reg = <0>;
1443 reg = <0 0xfff00044 0 4>;