Lines Matching +full:tsc +full:- +full:irq
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/r8a77980-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
19 /* External CAN clock - to be overridden by boards that provide it */
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <0>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 compatible = "arm,cortex-a53";
35 power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
36 next-level-cache = <&L2_CA53>;
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
45 power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
46 next-level-cache = <&L2_CA53>;
47 enable-method = "psci";
52 compatible = "arm,cortex-a53";
55 power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
56 next-level-cache = <&L2_CA53>;
57 enable-method = "psci";
62 compatible = "arm,cortex-a53";
65 power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
66 next-level-cache = <&L2_CA53>;
67 enable-method = "psci";
70 L2_CA53: cache-controller {
72 power-domains = <&sysc R8A77980_PD_CA53_SCU>;
73 cache-unified;
74 cache-level = <2>;
79 compatible = "fixed-clock";
80 #clock-cells = <0>;
82 clock-frequency = <0>;
86 compatible = "fixed-clock";
87 #clock-cells = <0>;
89 clock-frequency = <0>;
92 /* External PCIe clock - can be overridden by the board */
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 clock-frequency = <0>;
100 compatible = "arm,cortex-a53-pmu";
101 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
105 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
109 compatible = "arm,psci-1.0", "arm,psci-0.2";
113 /* External SCIF clock - to be overridden by boards that provide it */
115 compatible = "fixed-clock";
116 #clock-cells = <0>;
117 clock-frequency = <0>;
121 compatible = "simple-bus";
122 interrupt-parent = <&gic>;
124 #address-cells = <2>;
125 #size-cells = <2>;
129 compatible = "renesas,r8a77980-wdt",
130 "renesas,rcar-gen3-wdt";
134 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
140 compatible = "renesas,gpio-r8a77980",
141 "renesas,rcar-gen3-gpio";
144 #gpio-cells = <2>;
145 gpio-controller;
146 gpio-ranges = <&pfc 0 0 22>;
147 #interrupt-cells = <2>;
148 interrupt-controller;
150 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
155 compatible = "renesas,gpio-r8a77980",
156 "renesas,rcar-gen3-gpio";
159 #gpio-cells = <2>;
160 gpio-controller;
161 gpio-ranges = <&pfc 0 32 28>;
162 #interrupt-cells = <2>;
163 interrupt-controller;
165 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
170 compatible = "renesas,gpio-r8a77980",
171 "renesas,rcar-gen3-gpio";
174 #gpio-cells = <2>;
175 gpio-controller;
176 gpio-ranges = <&pfc 0 64 30>;
177 #interrupt-cells = <2>;
178 interrupt-controller;
180 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
185 compatible = "renesas,gpio-r8a77980",
186 "renesas,rcar-gen3-gpio";
189 #gpio-cells = <2>;
190 gpio-controller;
191 gpio-ranges = <&pfc 0 96 17>;
192 #interrupt-cells = <2>;
193 interrupt-controller;
195 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
200 compatible = "renesas,gpio-r8a77980",
201 "renesas,rcar-gen3-gpio";
204 #gpio-cells = <2>;
205 gpio-controller;
206 gpio-ranges = <&pfc 0 128 25>;
207 #interrupt-cells = <2>;
208 interrupt-controller;
210 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
215 compatible = "renesas,gpio-r8a77980",
216 "renesas,rcar-gen3-gpio";
219 #gpio-cells = <2>;
220 gpio-controller;
221 gpio-ranges = <&pfc 0 160 15>;
222 #interrupt-cells = <2>;
223 interrupt-controller;
225 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
230 compatible = "renesas,pfc-r8a77980";
235 compatible = "renesas,r8a77980-cmt0",
236 "renesas,rcar-gen3-cmt0";
241 clock-names = "fck";
242 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
248 compatible = "renesas,r8a77980-cmt1",
249 "renesas,rcar-gen3-cmt1";
260 clock-names = "fck";
261 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
267 compatible = "renesas,r8a77980-cmt1",
268 "renesas,rcar-gen3-cmt1";
279 clock-names = "fck";
280 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
286 compatible = "renesas,r8a77980-cmt1",
287 "renesas,rcar-gen3-cmt1";
298 clock-names = "fck";
299 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
304 cpg: clock-controller@e6150000 {
305 compatible = "renesas,r8a77980-cpg-mssr";
308 clock-names = "extal", "extalr";
309 #clock-cells = <2>;
310 #power-domain-cells = <0>;
311 #reset-cells = <1>;
314 rst: reset-controller@e6160000 {
315 compatible = "renesas,r8a77980-rst";
319 sysc: system-controller@e6180000 {
320 compatible = "renesas,r8a77980-sysc";
322 #power-domain-cells = <1>;
325 tsc: thermal@e6198000 { label
326 compatible = "renesas,r8a77980-thermal";
333 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
335 #thermal-sensor-cells = <1>;
338 intc_ex: interrupt-controller@e61c0000 {
339 compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
340 #interrupt-cells = <2>;
341 interrupt-controller;
350 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
355 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
361 clock-names = "fck";
362 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
368 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
374 clock-names = "fck";
375 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
381 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
387 clock-names = "fck";
388 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
394 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
400 clock-names = "fck";
401 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
407 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
413 clock-names = "fck";
414 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
420 compatible = "renesas,i2c-r8a77980",
421 "renesas,rcar-gen3-i2c";
425 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
429 dma-names = "tx", "rx", "tx", "rx";
430 i2c-scl-internal-delay-ns = <6>;
431 #address-cells = <1>;
432 #size-cells = <0>;
437 compatible = "renesas,i2c-r8a77980",
438 "renesas,rcar-gen3-i2c";
442 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
446 dma-names = "tx", "rx", "tx", "rx";
447 i2c-scl-internal-delay-ns = <6>;
448 #address-cells = <1>;
449 #size-cells = <0>;
454 compatible = "renesas,i2c-r8a77980",
455 "renesas,rcar-gen3-i2c";
459 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
463 dma-names = "tx", "rx", "tx", "rx";
464 i2c-scl-internal-delay-ns = <6>;
465 #address-cells = <1>;
466 #size-cells = <0>;
471 compatible = "renesas,i2c-r8a77980",
472 "renesas,rcar-gen3-i2c";
476 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
478 i2c-scl-internal-delay-ns = <6>;
479 #address-cells = <1>;
480 #size-cells = <0>;
485 compatible = "renesas,i2c-r8a77980",
486 "renesas,rcar-gen3-i2c";
490 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
492 i2c-scl-internal-delay-ns = <6>;
493 #address-cells = <1>;
494 #size-cells = <0>;
499 compatible = "renesas,i2c-r8a77980",
500 "renesas,rcar-gen3-i2c";
504 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
508 dma-names = "tx", "rx", "tx", "rx";
509 i2c-scl-internal-delay-ns = <6>;
510 #address-cells = <1>;
511 #size-cells = <0>;
516 compatible = "renesas,hscif-r8a77980",
517 "renesas,rcar-gen3-hscif",
524 clock-names = "fck", "brg_int", "scif_clk";
527 dma-names = "tx", "rx", "tx", "rx";
528 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
534 compatible = "renesas,hscif-r8a77980",
535 "renesas,rcar-gen3-hscif",
542 clock-names = "fck", "brg_int", "scif_clk";
545 dma-names = "tx", "rx", "tx", "rx";
546 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
552 compatible = "renesas,hscif-r8a77980",
553 "renesas,rcar-gen3-hscif",
560 clock-names = "fck", "brg_int", "scif_clk";
563 dma-names = "tx", "rx", "tx", "rx";
564 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
570 compatible = "renesas,hscif-r8a77980",
571 "renesas,rcar-gen3-hscif",
578 clock-names = "fck", "brg_int", "scif_clk";
581 dma-names = "tx", "rx", "tx", "rx";
582 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
587 pcie_phy: pcie-phy@e65d0000 {
588 compatible = "renesas,r8a77980-pcie-phy";
590 #phy-cells = <0>;
592 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
598 compatible = "renesas,r8a77980-canfd",
599 "renesas,rcar-gen3-canfd";
603 interrupt-names = "ch_int", "g_int";
607 clock-names = "fck", "canfd", "can_clk";
608 assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
609 assigned-clock-rates = <40000000>;
610 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
624 compatible = "renesas,etheravb-r8a77980",
625 "renesas,etheravb-rcar-gen3";
652 interrupt-names = "ch0", "ch1", "ch2", "ch3",
660 clock-names = "fck";
661 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
663 phy-mode = "rgmii";
664 rx-internal-delay-ps = <0>;
665 tx-internal-delay-ps = <2000>;
667 #address-cells = <1>;
668 #size-cells = <0>;
673 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
675 #pwm-cells = <2>;
677 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
683 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
685 #pwm-cells = <2>;
687 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
693 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
695 #pwm-cells = <2>;
697 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
703 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
705 #pwm-cells = <2>;
707 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
713 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
715 #pwm-cells = <2>;
717 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
723 compatible = "renesas,scif-r8a77980",
724 "renesas,rcar-gen3-scif",
731 clock-names = "fck", "brg_int", "scif_clk";
734 dma-names = "tx", "rx", "tx", "rx";
735 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
741 compatible = "renesas,scif-r8a77980",
742 "renesas,rcar-gen3-scif",
749 clock-names = "fck", "brg_int", "scif_clk";
752 dma-names = "tx", "rx", "tx", "rx";
753 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
759 compatible = "renesas,scif-r8a77980",
760 "renesas,rcar-gen3-scif",
767 clock-names = "fck", "brg_int", "scif_clk";
770 dma-names = "tx", "rx", "tx", "rx";
771 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
777 compatible = "renesas,scif-r8a77980",
778 "renesas,rcar-gen3-scif",
785 clock-names = "fck", "brg_int", "scif_clk";
788 dma-names = "tx", "rx", "tx", "rx";
789 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
795 compatible = "renesas,tpu-r8a77980", "renesas,tpu";
799 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
801 #pwm-cells = <3>;
806 compatible = "renesas,msiof-r8a77980",
807 "renesas,rcar-gen3-msiof";
811 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
813 #address-cells = <1>;
814 #size-cells = <0>;
819 compatible = "renesas,msiof-r8a77980",
820 "renesas,rcar-gen3-msiof";
824 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
826 #address-cells = <1>;
827 #size-cells = <0>;
832 compatible = "renesas,msiof-r8a77980",
833 "renesas,rcar-gen3-msiof";
837 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
839 #address-cells = <1>;
840 #size-cells = <0>;
845 compatible = "renesas,msiof-r8a77980",
846 "renesas,rcar-gen3-msiof";
850 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
852 #address-cells = <1>;
853 #size-cells = <0>;
858 compatible = "renesas,vin-r8a77980";
862 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
868 #address-cells = <1>;
869 #size-cells = <0>;
872 #address-cells = <1>;
873 #size-cells = <0>;
879 remote-endpoint = <&csi40vin0>;
886 compatible = "renesas,vin-r8a77980";
890 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
896 #address-cells = <1>;
897 #size-cells = <0>;
900 #address-cells = <1>;
901 #size-cells = <0>;
907 remote-endpoint = <&csi40vin1>;
914 compatible = "renesas,vin-r8a77980";
918 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
924 #address-cells = <1>;
925 #size-cells = <0>;
928 #address-cells = <1>;
929 #size-cells = <0>;
935 remote-endpoint = <&csi40vin2>;
942 compatible = "renesas,vin-r8a77980";
946 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
952 #address-cells = <1>;
953 #size-cells = <0>;
956 #address-cells = <1>;
957 #size-cells = <0>;
963 remote-endpoint = <&csi40vin3>;
970 compatible = "renesas,vin-r8a77980";
974 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
980 #address-cells = <1>;
981 #size-cells = <0>;
984 #address-cells = <1>;
985 #size-cells = <0>;
991 remote-endpoint = <&csi41vin4>;
998 compatible = "renesas,vin-r8a77980";
1002 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1008 #address-cells = <1>;
1009 #size-cells = <0>;
1012 #address-cells = <1>;
1013 #size-cells = <0>;
1019 remote-endpoint = <&csi41vin5>;
1026 compatible = "renesas,vin-r8a77980";
1030 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1036 #address-cells = <1>;
1037 #size-cells = <0>;
1040 #address-cells = <1>;
1041 #size-cells = <0>;
1047 remote-endpoint = <&csi41vin6>;
1054 compatible = "renesas,vin-r8a77980";
1058 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1064 #address-cells = <1>;
1065 #size-cells = <0>;
1068 #address-cells = <1>;
1069 #size-cells = <0>;
1075 remote-endpoint = <&csi41vin7>;
1082 compatible = "renesas,vin-r8a77980";
1086 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1093 compatible = "renesas,vin-r8a77980";
1097 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1104 compatible = "renesas,vin-r8a77980";
1108 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1115 compatible = "renesas,vin-r8a77980";
1119 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1126 compatible = "renesas,vin-r8a77980";
1130 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1137 compatible = "renesas,vin-r8a77980";
1141 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1148 compatible = "renesas,vin-r8a77980";
1152 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1159 compatible = "renesas,vin-r8a77980";
1163 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1169 dmac1: dma-controller@e7300000 {
1170 compatible = "renesas,dmac-r8a77980",
1171 "renesas,rcar-dmac";
1190 interrupt-names = "error",
1196 clock-names = "fck";
1197 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1199 #dma-cells = <1>;
1200 dma-channels = <16>;
1211 dmac2: dma-controller@e7310000 {
1212 compatible = "renesas,dmac-r8a77980",
1213 "renesas,rcar-dmac";
1232 interrupt-names = "error",
1238 clock-names = "fck";
1239 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1241 #dma-cells = <1>;
1242 dma-channels = <16>;
1254 compatible = "renesas,gether-r8a77980";
1258 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1260 #address-cells = <1>;
1261 #size-cells = <0>;
1266 compatible = "renesas,ipmmu-r8a77980";
1268 renesas,ipmmu-main = <&ipmmu_mm 0>;
1269 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1270 #iommu-cells = <1>;
1274 compatible = "renesas,ipmmu-r8a77980";
1276 renesas,ipmmu-main = <&ipmmu_mm 3>;
1277 power-domains = <&sysc R8A77980_PD_A3IR>;
1278 #iommu-cells = <1>;
1282 compatible = "renesas,ipmmu-r8a77980";
1286 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1287 #iommu-cells = <1>;
1291 compatible = "renesas,ipmmu-r8a77980";
1293 renesas,ipmmu-main = <&ipmmu_mm 10>;
1294 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1295 #iommu-cells = <1>;
1299 compatible = "renesas,ipmmu-r8a77980";
1301 renesas,ipmmu-main = <&ipmmu_mm 12>;
1302 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1303 #iommu-cells = <1>;
1307 compatible = "renesas,ipmmu-r8a77980";
1309 renesas,ipmmu-main = <&ipmmu_mm 14>;
1310 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1311 #iommu-cells = <1>;
1315 compatible = "renesas,ipmmu-r8a77980";
1317 renesas,ipmmu-main = <&ipmmu_mm 4>;
1318 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1319 #iommu-cells = <1>;
1323 compatible = "renesas,ipmmu-r8a77980";
1325 renesas,ipmmu-main = <&ipmmu_mm 11>;
1326 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1327 #iommu-cells = <1>;
1331 compatible = "renesas,sdhi-r8a77980",
1332 "renesas,rcar-gen3-sdhi";
1336 clock-names = "core", "clkh";
1337 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1339 max-frequency = <200000000>;
1345 compatible = "renesas,r8a77980-rpc-if",
1346 "renesas,rcar-gen3-rpc-if";
1350 reg-names = "regs", "dirmap", "wbuf";
1353 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1355 #address-cells = <1>;
1356 #size-cells = <0>;
1360 gic: interrupt-controller@f1010000 {
1361 compatible = "arm,gic-400";
1362 #interrupt-cells = <3>;
1363 #address-cells = <0>;
1364 interrupt-controller;
1372 clock-names = "clk";
1373 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1378 compatible = "renesas,pcie-r8a77980",
1379 "renesas,pcie-rcar-gen3";
1381 #address-cells = <3>;
1382 #size-cells = <2>;
1383 bus-range = <0x00 0xff>;
1390 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1394 #interrupt-cells = <1>;
1395 interrupt-map-mask = <0 0 0 0>;
1396 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1398 clock-names = "pcie", "pcie_bus";
1399 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1402 phy-names = "pcie";
1403 iommu-map = <0 &ipmmu_vi0 5 1>;
1404 iommu-map-mask = <0>;
1413 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1422 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1427 compatible = "renesas,r8a77980-csi2";
1431 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1436 #address-cells = <1>;
1437 #size-cells = <0>;
1444 #address-cells = <1>;
1445 #size-cells = <0>;
1451 remote-endpoint = <&vin0csi40>;
1455 remote-endpoint = <&vin1csi40>;
1459 remote-endpoint = <&vin2csi40>;
1463 remote-endpoint = <&vin3csi40>;
1470 compatible = "renesas,r8a77980-csi2";
1474 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1479 #address-cells = <1>;
1480 #size-cells = <0>;
1487 #address-cells = <1>;
1488 #size-cells = <0>;
1494 remote-endpoint = <&vin4csi41>;
1498 remote-endpoint = <&vin5csi41>;
1502 remote-endpoint = <&vin6csi41>;
1506 remote-endpoint = <&vin7csi41>;
1513 compatible = "renesas,du-r8a77980";
1517 clock-names = "du.0";
1518 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1520 reset-names = "du.0";
1526 #address-cells = <1>;
1527 #size-cells = <0>;
1536 remote-endpoint = <&lvds0_in>;
1542 lvds0: lvds-encoder@feb90000 {
1543 compatible = "renesas,r8a77980-lvds";
1546 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1551 #address-cells = <1>;
1552 #size-cells = <0>;
1557 remote-endpoint =
1574 thermal-zones {
1575 sensor1_thermal: sensor1-thermal {
1576 polling-delay-passive = <250>;
1577 polling-delay = <1000>;
1578 thermal-sensors = <&tsc 0>;
1581 sensor1-passive {
1586 sensor1-critical {
1594 sensor2_thermal: sensor2-thermal {
1595 polling-delay-passive = <250>;
1596 polling-delay = <1000>;
1597 thermal-sensors = <&tsc 1>;
1600 sensor2-passive {
1605 sensor2-critical {
1615 compatible = "arm,armv8-timer";
1616 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |