Lines Matching +full:- +full:sysc

1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a77970-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
19 /* External CAN clock - to be overridden by boards that provide it */
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <0>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 compatible = "arm,cortex-a53";
35 power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
36 next-level-cache = <&L2_CA53>;
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
45 power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
46 next-level-cache = <&L2_CA53>;
47 enable-method = "psci";
50 L2_CA53: cache-controller {
52 power-domains = <&sysc R8A77970_PD_CA53_SCU>;
53 cache-unified;
54 cache-level = <2>;
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
62 clock-frequency = <0>;
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
69 clock-frequency = <0>;
73 compatible = "arm,cortex-a53-pmu";
74 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
76 interrupt-affinity = <&a53_0>, <&a53_1>;
80 compatible = "arm,psci-1.0", "arm,psci-0.2";
84 /* External SCIF clock - to be overridden by boards that provide it */
86 compatible = "fixed-clock";
87 #clock-cells = <0>;
88 clock-frequency = <0>;
92 compatible = "simple-bus";
93 interrupt-parent = <&gic>;
95 #address-cells = <2>;
96 #size-cells = <2>;
100 compatible = "renesas,r8a77970-wdt",
101 "renesas,rcar-gen3-wdt";
105 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
111 compatible = "renesas,gpio-r8a77970",
112 "renesas,rcar-gen3-gpio";
115 #gpio-cells = <2>;
116 gpio-controller;
117 gpio-ranges = <&pfc 0 0 22>;
118 #interrupt-cells = <2>;
119 interrupt-controller;
121 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
126 compatible = "renesas,gpio-r8a77970",
127 "renesas,rcar-gen3-gpio";
130 #gpio-cells = <2>;
131 gpio-controller;
132 gpio-ranges = <&pfc 0 32 28>;
133 #interrupt-cells = <2>;
134 interrupt-controller;
136 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
141 compatible = "renesas,gpio-r8a77970",
142 "renesas,rcar-gen3-gpio";
145 #gpio-cells = <2>;
146 gpio-controller;
147 gpio-ranges = <&pfc 0 64 17>;
148 #interrupt-cells = <2>;
149 interrupt-controller;
151 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
156 compatible = "renesas,gpio-r8a77970",
157 "renesas,rcar-gen3-gpio";
160 #gpio-cells = <2>;
161 gpio-controller;
162 gpio-ranges = <&pfc 0 96 17>;
163 #interrupt-cells = <2>;
164 interrupt-controller;
166 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
171 compatible = "renesas,gpio-r8a77970",
172 "renesas,rcar-gen3-gpio";
175 #gpio-cells = <2>;
176 gpio-controller;
177 gpio-ranges = <&pfc 0 128 6>;
178 #interrupt-cells = <2>;
179 interrupt-controller;
181 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
186 compatible = "renesas,gpio-r8a77970",
187 "renesas,rcar-gen3-gpio";
190 #gpio-cells = <2>;
191 gpio-controller;
192 gpio-ranges = <&pfc 0 160 15>;
193 #interrupt-cells = <2>;
194 interrupt-controller;
196 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
201 compatible = "renesas,pfc-r8a77970";
206 compatible = "renesas,r8a77970-cmt0",
207 "renesas,rcar-gen3-cmt0";
212 clock-names = "fck";
213 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
219 compatible = "renesas,r8a77970-cmt1",
220 "renesas,rcar-gen3-cmt1";
231 clock-names = "fck";
232 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
238 compatible = "renesas,r8a77970-cmt1",
239 "renesas,rcar-gen3-cmt1";
250 clock-names = "fck";
251 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
257 compatible = "renesas,r8a77970-cmt1",
258 "renesas,rcar-gen3-cmt1";
269 clock-names = "fck";
270 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
275 cpg: clock-controller@e6150000 {
276 compatible = "renesas,r8a77970-cpg-mssr";
279 clock-names = "extal", "extalr";
280 #clock-cells = <2>;
281 #power-domain-cells = <0>;
282 #reset-cells = <1>;
285 rst: reset-controller@e6160000 {
286 compatible = "renesas,r8a77970-rst";
290 sysc: system-controller@e6180000 { label
291 compatible = "renesas,r8a77970-sysc";
293 #power-domain-cells = <1>;
297 compatible = "renesas,thermal-r8a77970";
304 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
306 #thermal-sensor-cells = <0>;
309 intc_ex: interrupt-controller@e61c0000 {
310 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
311 #interrupt-cells = <2>;
312 interrupt-controller;
321 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
326 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
332 clock-names = "fck";
333 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
339 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
345 clock-names = "fck";
346 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
352 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
358 clock-names = "fck";
359 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
365 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
371 clock-names = "fck";
372 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
378 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
384 clock-names = "fck";
385 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
391 compatible = "renesas,i2c-r8a77970",
392 "renesas,rcar-gen3-i2c";
396 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
400 dma-names = "tx", "rx", "tx", "rx";
401 i2c-scl-internal-delay-ns = <6>;
402 #address-cells = <1>;
403 #size-cells = <0>;
408 compatible = "renesas,i2c-r8a77970",
409 "renesas,rcar-gen3-i2c";
413 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
417 dma-names = "tx", "rx", "tx", "rx";
418 i2c-scl-internal-delay-ns = <6>;
419 #address-cells = <1>;
420 #size-cells = <0>;
425 compatible = "renesas,i2c-r8a77970",
426 "renesas,rcar-gen3-i2c";
430 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
434 dma-names = "tx", "rx", "tx", "rx";
435 i2c-scl-internal-delay-ns = <6>;
436 #address-cells = <1>;
437 #size-cells = <0>;
442 compatible = "renesas,i2c-r8a77970",
443 "renesas,rcar-gen3-i2c";
447 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
451 dma-names = "tx", "rx", "tx", "rx";
452 i2c-scl-internal-delay-ns = <6>;
453 #address-cells = <1>;
454 #size-cells = <0>;
459 compatible = "renesas,i2c-r8a77970",
460 "renesas,rcar-gen3-i2c";
464 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
468 dma-names = "tx", "rx", "tx", "rx";
469 i2c-scl-internal-delay-ns = <6>;
470 #address-cells = <1>;
471 #size-cells = <0>;
476 compatible = "renesas,hscif-r8a77970",
477 "renesas,rcar-gen3-hscif",
484 clock-names = "fck", "brg_int", "scif_clk";
487 dma-names = "tx", "rx", "tx", "rx";
488 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
494 compatible = "renesas,hscif-r8a77970",
495 "renesas,rcar-gen3-hscif",
502 clock-names = "fck", "brg_int", "scif_clk";
505 dma-names = "tx", "rx", "tx", "rx";
506 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
512 compatible = "renesas,hscif-r8a77970",
513 "renesas,rcar-gen3-hscif",
520 clock-names = "fck", "brg_int", "scif_clk";
523 dma-names = "tx", "rx", "tx", "rx";
524 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
530 compatible = "renesas,hscif-r8a77970",
531 "renesas,rcar-gen3-hscif", "renesas,hscif";
537 clock-names = "fck", "brg_int", "scif_clk";
540 dma-names = "tx", "rx", "tx", "rx";
541 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
547 compatible = "renesas,r8a77970-canfd",
548 "renesas,rcar-gen3-canfd";
552 interrupt-names = "ch_int", "g_int";
556 clock-names = "fck", "canfd", "can_clk";
557 assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
558 assigned-clock-rates = <40000000>;
559 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
573 compatible = "renesas,etheravb-r8a77970",
574 "renesas,etheravb-rcar-gen3";
601 interrupt-names = "ch0", "ch1", "ch2", "ch3",
609 clock-names = "fck";
610 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
612 phy-mode = "rgmii";
613 rx-internal-delay-ps = <0>;
614 tx-internal-delay-ps = <0>;
616 #address-cells = <1>;
617 #size-cells = <0>;
622 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
624 #pwm-cells = <2>;
626 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
632 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
634 #pwm-cells = <2>;
636 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
642 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
644 #pwm-cells = <2>;
646 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
652 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
654 #pwm-cells = <2>;
656 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
662 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
664 #pwm-cells = <2>;
666 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
672 compatible = "renesas,scif-r8a77970",
673 "renesas,rcar-gen3-scif",
680 clock-names = "fck", "brg_int", "scif_clk";
683 dma-names = "tx", "rx", "tx", "rx";
684 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
690 compatible = "renesas,scif-r8a77970",
691 "renesas,rcar-gen3-scif",
698 clock-names = "fck", "brg_int", "scif_clk";
701 dma-names = "tx", "rx", "tx", "rx";
702 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
708 compatible = "renesas,scif-r8a77970",
709 "renesas,rcar-gen3-scif",
716 clock-names = "fck", "brg_int", "scif_clk";
719 dma-names = "tx", "rx", "tx", "rx";
720 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
726 compatible = "renesas,scif-r8a77970",
727 "renesas,rcar-gen3-scif", "renesas,scif";
733 clock-names = "fck", "brg_int", "scif_clk";
736 dma-names = "tx", "rx", "tx", "rx";
737 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
743 compatible = "renesas,tpu-r8a77970", "renesas,tpu";
747 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
749 #pwm-cells = <3>;
754 compatible = "renesas,msiof-r8a77970",
755 "renesas,rcar-gen3-msiof";
759 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
763 dma-names = "tx", "rx", "tx", "rx";
764 #address-cells = <1>;
765 #size-cells = <0>;
770 compatible = "renesas,msiof-r8a77970",
771 "renesas,rcar-gen3-msiof";
775 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
779 dma-names = "tx", "rx", "tx", "rx";
780 #address-cells = <1>;
781 #size-cells = <0>;
786 compatible = "renesas,msiof-r8a77970",
787 "renesas,rcar-gen3-msiof";
791 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
795 dma-names = "tx", "rx", "tx", "rx";
796 #address-cells = <1>;
797 #size-cells = <0>;
802 compatible = "renesas,msiof-r8a77970",
803 "renesas,rcar-gen3-msiof";
807 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
811 dma-names = "tx", "rx", "tx", "rx";
812 #address-cells = <1>;
813 #size-cells = <0>;
818 compatible = "renesas,vin-r8a77970";
822 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
828 #address-cells = <1>;
829 #size-cells = <0>;
832 #address-cells = <1>;
833 #size-cells = <0>;
839 remote-endpoint = <&csi40vin0>;
846 compatible = "renesas,vin-r8a77970";
850 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
856 #address-cells = <1>;
857 #size-cells = <0>;
860 #address-cells = <1>;
861 #size-cells = <0>;
867 remote-endpoint = <&csi40vin1>;
874 compatible = "renesas,vin-r8a77970";
878 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
884 #address-cells = <1>;
885 #size-cells = <0>;
888 #address-cells = <1>;
889 #size-cells = <0>;
895 remote-endpoint = <&csi40vin2>;
902 compatible = "renesas,vin-r8a77970";
906 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
912 #address-cells = <1>;
913 #size-cells = <0>;
916 #address-cells = <1>;
917 #size-cells = <0>;
923 remote-endpoint = <&csi40vin3>;
929 dmac1: dma-controller@e7300000 {
930 compatible = "renesas,dmac-r8a77970",
931 "renesas,rcar-dmac";
942 interrupt-names = "error",
946 clock-names = "fck";
947 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
949 #dma-cells = <1>;
950 dma-channels = <8>;
957 dmac2: dma-controller@e7310000 {
958 compatible = "renesas,dmac-r8a77970",
959 "renesas,rcar-dmac";
970 interrupt-names = "error",
974 clock-names = "fck";
975 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
977 #dma-cells = <1>;
978 dma-channels = <8>;
986 compatible = "renesas,ipmmu-r8a77970";
988 renesas,ipmmu-main = <&ipmmu_mm 0>;
989 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
990 #iommu-cells = <1>;
994 compatible = "renesas,ipmmu-r8a77970";
996 renesas,ipmmu-main = <&ipmmu_mm 3>;
997 power-domains = <&sysc R8A77970_PD_A3IR>;
998 #iommu-cells = <1>;
1002 compatible = "renesas,ipmmu-r8a77970";
1006 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1007 #iommu-cells = <1>;
1011 compatible = "renesas,ipmmu-r8a77970";
1013 renesas,ipmmu-main = <&ipmmu_mm 7>;
1014 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1015 #iommu-cells = <1>;
1019 compatible = "renesas,ipmmu-r8a77970";
1021 renesas,ipmmu-main = <&ipmmu_mm 9>;
1022 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1023 #iommu-cells = <1>;
1027 compatible = "renesas,sdhi-r8a77970",
1028 "renesas,rcar-gen3-sdhi";
1032 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1034 max-frequency = <200000000>;
1040 compatible = "renesas,r8a77970-rpc-if",
1041 "renesas,rcar-gen3-rpc-if";
1045 reg-names = "regs", "dirmap", "wbuf";
1048 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1050 #address-cells = <1>;
1051 #size-cells = <0>;
1055 gic: interrupt-controller@f1010000 {
1056 compatible = "arm,gic-400";
1057 #interrupt-cells = <3>;
1058 #address-cells = <0>;
1059 interrupt-controller;
1067 clock-names = "clk";
1068 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1077 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1086 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1091 compatible = "renesas,r8a77970-csi2";
1095 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1100 #address-cells = <1>;
1101 #size-cells = <0>;
1108 #address-cells = <1>;
1109 #size-cells = <0>;
1115 remote-endpoint = <&vin0csi40>;
1119 remote-endpoint = <&vin1csi40>;
1123 remote-endpoint = <&vin2csi40>;
1127 remote-endpoint = <&vin3csi40>;
1134 compatible = "renesas,du-r8a77970";
1138 clock-names = "du.0";
1139 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1141 reset-names = "du.0";
1147 #address-cells = <1>;
1148 #size-cells = <0>;
1157 remote-endpoint = <&lvds0_in>;
1163 lvds0: lvds-encoder@feb90000 {
1164 compatible = "renesas,r8a77970-lvds";
1167 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1172 #address-cells = <1>;
1173 #size-cells = <0>;
1178 remote-endpoint =
1194 thermal-zones {
1195 cpu-thermal {
1196 polling-delay-passive = <250>;
1197 polling-delay = <1000>;
1198 thermal-sensors = <&thermal>;
1200 cooling-maps {
1204 cpu-crit {
1214 compatible = "arm,armv8-timer";
1215 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,