Lines Matching +full:0 +full:xe65a0000
23 * The external audio clocks are configured as 0 Hz fixed frequency
29 #clock-cells = <0>;
30 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
41 #clock-cells = <0>;
42 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
52 cluster0_opp: opp-table-0 {
108 #size-cells = <0>;
142 a57_0: cpu@0 {
144 reg = <0x0>;
159 reg = <0x1>;
173 reg = <0x2>;
187 reg = <0x3>;
201 reg = <0x100>;
216 reg = <0x101>;
229 reg = <0x102>;
242 reg = <0x103>;
253 L2_CA57: cache-controller-0 {
270 CPU_SLEEP_0: cpu-sleep-0 {
272 arm,psci-suspend-param = <0x0010000>;
281 arm,psci-suspend-param = <0x0010000>;
292 #clock-cells = <0>;
294 clock-frequency = <0>;
299 #clock-cells = <0>;
301 clock-frequency = <0>;
307 #clock-cells = <0>;
308 clock-frequency = <0>;
343 #clock-cells = <0>;
344 clock-frequency = <0>;
357 reg = <0 0xe6020000 0 0x0c>;
368 reg = <0 0xe6050000 0 0x50>;
372 gpio-ranges = <&pfc 0 0 16>;
383 reg = <0 0xe6051000 0 0x50>;
387 gpio-ranges = <&pfc 0 32 29>;
398 reg = <0 0xe6052000 0 0x50>;
402 gpio-ranges = <&pfc 0 64 15>;
413 reg = <0 0xe6053000 0 0x50>;
417 gpio-ranges = <&pfc 0 96 16>;
428 reg = <0 0xe6054000 0 0x50>;
432 gpio-ranges = <&pfc 0 128 18>;
443 reg = <0 0xe6055000 0 0x50>;
447 gpio-ranges = <&pfc 0 160 26>;
458 reg = <0 0xe6055400 0 0x50>;
462 gpio-ranges = <&pfc 0 192 32>;
473 reg = <0 0xe6055800 0 0x50>;
477 gpio-ranges = <&pfc 0 224 4>;
487 reg = <0 0xe6060000 0 0x50c>;
493 reg = <0 0xe60f0000 0 0x1004>;
506 reg = <0 0xe6130000 0 0x1004>;
525 reg = <0 0xe6140000 0 0x1004>;
544 reg = <0 0xe6148000 0 0x1004>;
562 reg = <0 0xe6150000 0 0x1000>;
566 #power-domain-cells = <0>;
572 reg = <0 0xe6160000 0 0x0200>;
577 reg = <0 0xe6180000 0 0x0400>;
583 reg = <0 0xe6198000 0 0x100>,
584 <0 0xe61a0000 0 0x100>,
585 <0 0xe61a8000 0 0x100>;
599 reg = <0 0xe61c0000 0 0x200>;
600 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
613 reg = <0 0xe61e0000 0 0x30>;
626 reg = <0 0xe6fc0000 0 0x30>;
639 reg = <0 0xe6fd0000 0 0x30>;
652 reg = <0 0xe6fe0000 0 0x30>;
665 reg = <0 0xffc00000 0 0x30>;
678 #size-cells = <0>;
681 reg = <0 0xe6500000 0 0x40>;
686 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
687 <&dmac2 0x91>, <&dmac2 0x90>;
695 #size-cells = <0>;
698 reg = <0 0xe6508000 0 0x40>;
703 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
704 <&dmac2 0x93>, <&dmac2 0x92>;
712 #size-cells = <0>;
715 reg = <0 0xe6510000 0 0x40>;
720 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
721 <&dmac2 0x95>, <&dmac2 0x94>;
729 #size-cells = <0>;
732 reg = <0 0xe66d0000 0 0x40>;
737 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
745 #size-cells = <0>;
748 reg = <0 0xe66d8000 0 0x40>;
753 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
761 #size-cells = <0>;
764 reg = <0 0xe66e0000 0 0x40>;
769 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
777 #size-cells = <0>;
780 reg = <0 0xe66e8000 0 0x40>;
785 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
793 #size-cells = <0>;
797 reg = <0 0xe60b0000 0 0x425>;
802 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
811 reg = <0 0xe6540000 0 96>;
817 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
818 <&dmac2 0x31>, <&dmac2 0x30>;
829 reg = <0 0xe6550000 0 96>;
835 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
836 <&dmac2 0x33>, <&dmac2 0x32>;
847 reg = <0 0xe6560000 0 96>;
853 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
854 <&dmac2 0x35>, <&dmac2 0x34>;
865 reg = <0 0xe66a0000 0 96>;
871 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
882 reg = <0 0xe66b0000 0 96>;
888 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
898 reg = <0 0xe6590000 0 0x200>;
901 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
902 <&usb_dmac1 0>, <&usb_dmac1 1>;
915 reg = <0 0xe659c000 0 0x200>;
918 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
919 <&usb_dmac3 0>, <&usb_dmac3 1>;
932 reg = <0 0xe65a0000 0 0x100>;
946 reg = <0 0xe65b0000 0 0x100>;
960 reg = <0 0xe6460000 0 0x100>;
974 reg = <0 0xe6470000 0 0x100>;
988 reg = <0 0xe65ee000 0 0x90>;
994 #phy-cells = <0>;
1001 reg = <0x0 0xe6601000 0 0x1000>;
1010 reg = <0 0xe6700000 0 0x10000>;
1039 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1052 reg = <0 0xe7300000 0 0x10000>;
1081 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1094 reg = <0 0xe7310000 0 0x10000>;
1135 reg = <0 0xe6740000 0 0x1000>;
1136 renesas,ipmmu-main = <&ipmmu_mm 0>;
1143 reg = <0 0xe7740000 0 0x1000>;
1151 reg = <0 0xe6570000 0 0x1000>;
1159 reg = <0 0xff8b0000 0 0x1000>;
1167 reg = <0 0xe67b0000 0 0x1000>;
1176 reg = <0 0xec670000 0 0x1000>;
1184 reg = <0 0xfd800000 0 0x1000>;
1192 reg = <0 0xfd950000 0 0x1000>;
1200 reg = <0 0xfd960000 0 0x1000>;
1208 reg = <0 0xfd970000 0 0x1000>;
1216 reg = <0 0xffc80000 0 0x1000>;
1224 reg = <0 0xfe6b0000 0 0x1000>;
1232 reg = <0 0xfe6f0000 0 0x1000>;
1240 reg = <0 0xfebd0000 0 0x1000>;
1248 reg = <0 0xfebe0000 0 0x1000>;
1256 reg = <0 0xfe990000 0 0x1000>;
1264 reg = <0 0xfe980000 0 0x1000>;
1273 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1311 rx-internal-delay-ps = <0>;
1312 tx-internal-delay-ps = <0>;
1315 #size-cells = <0>;
1322 reg = <0 0xe6c30000 0 0x1000>;
1338 reg = <0 0xe6c38000 0 0x1000>;
1354 reg = <0 0xe66c0000 0 0x8000>;
1379 reg = <0 0xe6e30000 0 0x8>;
1389 reg = <0 0xe6e31000 0 0x8>;
1399 reg = <0 0xe6e32000 0 0x8>;
1409 reg = <0 0xe6e33000 0 0x8>;
1419 reg = <0 0xe6e34000 0 0x8>;
1429 reg = <0 0xe6e35000 0 0x8>;
1439 reg = <0 0xe6e36000 0 0x8>;
1450 reg = <0 0xe6e60000 0 64>;
1456 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1457 <&dmac2 0x51>, <&dmac2 0x50>;
1467 reg = <0 0xe6e68000 0 64>;
1473 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1474 <&dmac2 0x53>, <&dmac2 0x52>;
1484 reg = <0 0xe6e88000 0 64>;
1490 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1491 <&dmac2 0x13>, <&dmac2 0x12>;
1501 reg = <0 0xe6c50000 0 64>;
1507 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1517 reg = <0 0xe6c40000 0 64>;
1523 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1533 reg = <0 0xe6f30000 0 64>;
1539 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1540 <&dmac2 0x5b>, <&dmac2 0x5a>;
1549 reg = <0 0xe6e80000 0 0x148>;
1561 reg = <0 0xe6e90000 0 0x0064>;
1564 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1565 <&dmac2 0x41>, <&dmac2 0x40>;
1570 #size-cells = <0>;
1577 reg = <0 0xe6ea0000 0 0x0064>;
1580 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1581 <&dmac2 0x43>, <&dmac2 0x42>;
1586 #size-cells = <0>;
1593 reg = <0 0xe6c00000 0 0x0064>;
1596 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1601 #size-cells = <0>;
1608 reg = <0 0xe6c10000 0 0x0064>;
1611 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1616 #size-cells = <0>;
1622 reg = <0 0xe6ef0000 0 0x1000>;
1627 renesas,id = <0>;
1632 #size-cells = <0>;
1636 #size-cells = <0>;
1640 vin0csi20: endpoint@0 {
1641 reg = <0>;
1654 reg = <0 0xe6ef1000 0 0x1000>;
1664 #size-cells = <0>;
1668 #size-cells = <0>;
1672 vin1csi20: endpoint@0 {
1673 reg = <0>;
1686 reg = <0 0xe6ef2000 0 0x1000>;
1696 #size-cells = <0>;
1700 #size-cells = <0>;
1704 vin2csi20: endpoint@0 {
1705 reg = <0>;
1718 reg = <0 0xe6ef3000 0 0x1000>;
1728 #size-cells = <0>;
1732 #size-cells = <0>;
1736 vin3csi20: endpoint@0 {
1737 reg = <0>;
1750 reg = <0 0xe6ef4000 0 0x1000>;
1760 #size-cells = <0>;
1764 #size-cells = <0>;
1768 vin4csi20: endpoint@0 {
1769 reg = <0>;
1782 reg = <0 0xe6ef5000 0 0x1000>;
1792 #size-cells = <0>;
1796 #size-cells = <0>;
1800 vin5csi20: endpoint@0 {
1801 reg = <0>;
1814 reg = <0 0xe6ef6000 0 0x1000>;
1824 #size-cells = <0>;
1828 #size-cells = <0>;
1832 vin6csi20: endpoint@0 {
1833 reg = <0>;
1846 reg = <0 0xe6ef7000 0 0x1000>;
1856 #size-cells = <0>;
1860 #size-cells = <0>;
1864 vin7csi20: endpoint@0 {
1865 reg = <0>;
1879 reg = <0 0xe6f40000 0 0x64>;
1883 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1894 reg = <0 0xe6f50000 0 0x64>;
1898 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1909 reg = <0 0xe6f60000 0 0x64>;
1913 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1924 reg = <0 0xe6f70000 0 0x64>;
1928 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1939 reg = <0 0xe6f80000 0 0x64>;
1943 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1954 reg = <0 0xe6f90000 0 0x64>;
1958 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1969 reg = <0 0xe6fa0000 0 0x64>;
1973 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1984 reg = <0 0xe6fb0000 0 0x64>;
1988 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
2000 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
2006 * clkout : #clock-cells = <0>; <&rcar_sound>;
2010 reg = <0 0xec500000 0 0x1000>, /* SCU */
2011 <0 0xec5a0000 0 0x100>, /* ADG */
2012 <0 0xec540000 0 0x1000>, /* SSIU */
2013 <0 0xec541000 0 0x280>, /* SSI */
2014 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
2037 "ssi.1", "ssi.0",
2040 "src.1", "src.0",
2041 "mix.1", "mix.0",
2042 "ctu.1", "ctu.0",
2043 "dvc.0", "dvc.1",
2055 "ssi.1", "ssi.0";
2059 dvc0: dvc-0 {
2060 dmas = <&audma1 0xbc>;
2064 dmas = <&audma1 0xbe>;
2070 mix0: mix-0 { };
2075 ctu00: ctu-0 { };
2086 src0: src-0 {
2088 dmas = <&audma0 0x85>, <&audma1 0x9a>;
2093 dmas = <&audma0 0x87>, <&audma1 0x9c>;
2098 dmas = <&audma0 0x89>, <&audma1 0x9e>;
2103 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2108 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2113 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2118 dmas = <&audma0 0x91>, <&audma1 0xb4>;
2123 dmas = <&audma0 0x93>, <&audma1 0xb6>;
2128 dmas = <&audma0 0x95>, <&audma1 0xb8>;
2133 dmas = <&audma0 0x97>, <&audma1 0xba>;
2139 ssiu00: ssiu-0 {
2140 dmas = <&audma0 0x15>, <&audma1 0x16>;
2144 dmas = <&audma0 0x35>, <&audma1 0x36>;
2148 dmas = <&audma0 0x37>, <&audma1 0x38>;
2152 dmas = <&audma0 0x47>, <&audma1 0x48>;
2156 dmas = <&audma0 0x3F>, <&audma1 0x40>;
2160 dmas = <&audma0 0x43>, <&audma1 0x44>;
2164 dmas = <&audma0 0x4F>, <&audma1 0x50>;
2168 dmas = <&audma0 0x53>, <&audma1 0x54>;
2172 dmas = <&audma0 0x49>, <&audma1 0x4a>;
2176 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2180 dmas = <&audma0 0x57>, <&audma1 0x58>;
2184 dmas = <&audma0 0x59>, <&audma1 0x5A>;
2188 dmas = <&audma0 0x5F>, <&audma1 0x60>;
2192 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2196 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2200 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2204 dmas = <&audma0 0x63>, <&audma1 0x64>;
2208 dmas = <&audma0 0x67>, <&audma1 0x68>;
2212 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2216 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2220 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2224 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2228 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2232 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2236 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2240 dmas = <&audma0 0x21>, <&audma1 0x22>;
2244 dmas = <&audma0 0x23>, <&audma1 0x24>;
2248 dmas = <&audma0 0x25>, <&audma1 0x26>;
2252 dmas = <&audma0 0x27>, <&audma1 0x28>;
2256 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2260 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2264 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2268 dmas = <&audma0 0x71>, <&audma1 0x72>;
2272 dmas = <&audma0 0x17>, <&audma1 0x18>;
2276 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2280 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2284 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2288 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2292 dmas = <&audma0 0x31>, <&audma1 0x32>;
2296 dmas = <&audma0 0x33>, <&audma1 0x34>;
2300 dmas = <&audma0 0x73>, <&audma1 0x74>;
2304 dmas = <&audma0 0x75>, <&audma1 0x76>;
2308 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2312 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2316 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2320 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2324 dmas = <&audma0 0x81>, <&audma1 0x82>;
2328 dmas = <&audma0 0x83>, <&audma1 0x84>;
2332 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2336 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2340 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2344 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2350 ssi0: ssi-0 {
2352 dmas = <&audma0 0x01>, <&audma1 0x02>;
2357 dmas = <&audma0 0x03>, <&audma1 0x04>;
2362 dmas = <&audma0 0x05>, <&audma1 0x06>;
2367 dmas = <&audma0 0x07>, <&audma1 0x08>;
2372 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2377 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2382 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2387 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2392 dmas = <&audma0 0x11>, <&audma1 0x12>;
2397 dmas = <&audma0 0x13>, <&audma1 0x14>;
2406 reg = <0 0xec520000 0 0x800>;
2418 reg = <0 0xec700000 0 0x10000>;
2447 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2460 reg = <0 0xec720000 0 0x10000>;
2501 reg = <0 0xee000000 0 0xc00>;
2512 reg = <0 0xee020000 0 0x400>;
2522 reg = <0 0xee080000 0 0x100>;
2534 reg = <0 0xee0a0000 0 0x100>;
2546 reg = <0 0xee0c0000 0 0x100>;
2558 reg = <0 0xee0e0000 0 0x100>;
2570 reg = <0 0xee080100 0 0x100>;
2583 reg = <0 0xee0a0100 0 0x100>;
2596 reg = <0 0xee0c0100 0 0x100>;
2609 reg = <0 0xee0e0100 0 0x100>;
2623 reg = <0 0xee080200 0 0x700>;
2635 reg = <0 0xee0a0200 0 0x700>;
2646 reg = <0 0xee0c0200 0 0x700>;
2657 reg = <0 0xee0e0200 0 0x700>;
2669 reg = <0 0xee100000 0 0x2000>;
2683 reg = <0 0xee120000 0 0x2000>;
2697 reg = <0 0xee140000 0 0x2000>;
2711 reg = <0 0xee160000 0 0x2000>;
2725 reg = <0 0xee200000 0 0x200>,
2726 <0 0x08000000 0 0x04000000>,
2727 <0 0xee208000 0 0x100>;
2734 #size-cells = <0>;
2741 reg = <0 0xee300000 0 0x200000>;
2753 #address-cells = <0>;
2755 reg = <0x0 0xf1010000 0 0x1000>,
2756 <0x0 0xf1020000 0 0x20000>,
2757 <0x0 0xf1040000 0 0x20000>,
2758 <0x0 0xf1060000 0 0x20000>;
2770 reg = <0 0xfe000000 0 0x80000>;
2773 bus-range = <0x00 0xff>;
2775 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2776 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2777 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2778 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2780 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2785 interrupt-map-mask = <0 0 0 0>;
2786 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2791 iommu-map = <0 &ipmmu_hc 0 1>;
2792 iommu-map-mask = <0>;
2799 reg = <0 0xee800000 0 0x80000>;
2802 bus-range = <0x00 0xff>;
2804 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2805 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2806 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2807 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2809 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2814 interrupt-map-mask = <0 0 0 0>;
2815 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2820 iommu-map = <0 &ipmmu_hc 1 1>;
2821 iommu-map-mask = <0>;
2828 reg = <0x0 0xfe000000 0 0x80000>,
2829 <0x0 0xfe100000 0 0x100000>,
2830 <0x0 0xfe200000 0 0x200000>,
2831 <0x0 0x30000000 0 0x8000000>,
2832 <0x0 0x38000000 0 0x8000000>;
2847 reg = <0x0 0xee800000 0 0x80000>,
2848 <0x0 0xee900000 0 0x100000>,
2849 <0x0 0xeea00000 0 0x200000>,
2850 <0x0 0xc0000000 0 0x8000000>,
2851 <0x0 0xc8000000 0 0x8000000>;
2866 reg = <0 0xfe860000 0 0x2000>;
2876 reg = <0 0xfe870000 0 0x2000>;
2886 reg = <0 0xfe880000 0 0x2000>;
2896 reg = <0 0xfe890000 0 0x2000>;
2905 reg = <0 0xfe920000 0 0x8000>;
2916 reg = <0 0xfe960000 0 0x8000>;
2927 reg = <0 0xfea20000 0 0x5000>;
2938 reg = <0 0xfea28000 0 0x5000>;
2949 reg = <0 0xfea30000 0 0x5000>;
2960 reg = <0 0xfe9a0000 0 0x8000>;
2971 reg = <0 0xfe9b0000 0 0x8000>;
2982 reg = <0 0xfe940000 0 0x2400>;
2992 reg = <0 0xfe944000 0 0x2400>;
3002 reg = <0 0xfe950000 0 0x200>;
3006 iommus = <&ipmmu_vp0 0>;
3011 reg = <0 0xfe951000 0 0x200>;
3020 reg = <0 0xfe96f000 0 0x200>;
3029 reg = <0 0xfe92f000 0 0x200>;
3038 reg = <0 0xfe9af000 0 0x200>;
3047 reg = <0 0xfe9bf000 0 0x200>;
3056 reg = <0 0xfea27000 0 0x200>;
3065 reg = <0 0xfea2f000 0 0x200>;
3074 reg = <0 0xfea37000 0 0x200>;
3084 reg = <0 0xfea40000 0 0x1000>;
3093 reg = <0 0xfea50000 0 0x1000>;
3102 reg = <0 0xfea60000 0 0x1000>;
3111 reg = <0 0xfea70000 0 0x1000>;
3119 reg = <0 0xfea80000 0 0x10000>;
3128 #size-cells = <0>;
3130 port@0 {
3131 reg = <0>;
3136 #size-cells = <0>;
3140 csi20vin0: endpoint@0 {
3141 reg = <0>;
3178 reg = <0 0xfeaa0000 0 0x10000>;
3187 #size-cells = <0>;
3189 port@0 {
3190 reg = <0>;
3195 #size-cells = <0>;
3199 csi40vin0: endpoint@0 {
3200 reg = <0>;
3221 reg = <0 0xfeab0000 0 0x10000>;
3230 #size-cells = <0>;
3232 port@0 {
3233 reg = <0>;
3238 #size-cells = <0>;
3242 csi41vin4: endpoint@0 {
3243 reg = <0>;
3264 reg = <0 0xfead0000 0 0x10000>;
3274 #size-cells = <0>;
3275 port@0 {
3276 reg = <0>;
3293 reg = <0 0xfeae0000 0 0x10000>;
3303 #size-cells = <0>;
3304 port@0 {
3305 reg = <0>;
3322 reg = <0 0xfeb00000 0 0x80000>;
3329 clock-names = "du.0", "du.1", "du.2", "du.3";
3331 reset-names = "du.0", "du.2";
3334 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
3341 #size-cells = <0>;
3343 port@0 {
3344 reg = <0>;
3369 reg = <0 0xfeb90000 0 0x14>;
3377 #size-cells = <0>;
3379 port@0 {
3380 reg = <0>;
3393 reg = <0 0xfff00044 0 4>;
3401 thermal-sensors = <&tsc 0>;
3456 cooling-device = <&a53_0 0 2>;
3474 #clock-cells = <0>;
3475 clock-frequency = <0>;
3480 #clock-cells = <0>;
3481 clock-frequency = <0>;