Lines Matching +full:ssiu +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a774c0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <0>;
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <0>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <0>;
40 /* External CAN clock - to be overridden by boards that provide it */
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <0>;
47 cluster1_opp: opp-table-1 {
48 compatible = "operating-points-v2";
49 opp-shared;
50 opp-800000000 {
51 opp-hz = /bits/ 64 <800000000>;
52 clock-latency-ns = <300000>;
54 opp-1000000000 {
55 opp-hz = /bits/ 64 <1000000000>;
56 clock-latency-ns = <300000>;
58 opp-1200000000 {
59 opp-hz = /bits/ 64 <1200000000>;
60 clock-latency-ns = <300000>;
61 opp-suspend;
66 #address-cells = <1>;
67 #size-cells = <0>;
70 compatible = "arm,cortex-a53";
73 #cooling-cells = <2>;
74 power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
75 next-level-cache = <&L2_CA53>;
76 enable-method = "psci";
77 dynamic-power-coefficient = <277>;
79 operating-points-v2 = <&cluster1_opp>;
83 compatible = "arm,cortex-a53";
86 power-domains = <&sysc R8A774C0_PD_CA53_CPU1>;
87 next-level-cache = <&L2_CA53>;
88 enable-method = "psci";
90 operating-points-v2 = <&cluster1_opp>;
93 L2_CA53: cache-controller-0 {
95 power-domains = <&sysc R8A774C0_PD_CA53_SCU>;
96 cache-unified;
97 cache-level = <2>;
102 compatible = "fixed-clock";
103 #clock-cells = <0>;
105 clock-frequency = <0>;
108 /* External PCIe clock - can be overridden by the board */
110 compatible = "fixed-clock";
111 #clock-cells = <0>;
112 clock-frequency = <0>;
116 compatible = "arm,cortex-a53-pmu";
117 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
119 interrupt-affinity = <&a53_0>, <&a53_1>;
123 compatible = "arm,psci-1.0", "arm,psci-0.2";
127 /* External SCIF clock - to be overridden by boards that provide it */
129 compatible = "fixed-clock";
130 #clock-cells = <0>;
131 clock-frequency = <0>;
135 compatible = "simple-bus";
136 interrupt-parent = <&gic>;
137 #address-cells = <2>;
138 #size-cells = <2>;
142 compatible = "renesas,r8a774c0-wdt",
143 "renesas,rcar-gen3-wdt";
147 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
153 compatible = "renesas,gpio-r8a774c0",
154 "renesas,rcar-gen3-gpio";
157 #gpio-cells = <2>;
158 gpio-controller;
159 gpio-ranges = <&pfc 0 0 18>;
160 #interrupt-cells = <2>;
161 interrupt-controller;
163 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
168 compatible = "renesas,gpio-r8a774c0",
169 "renesas,rcar-gen3-gpio";
172 #gpio-cells = <2>;
173 gpio-controller;
174 gpio-ranges = <&pfc 0 32 23>;
175 #interrupt-cells = <2>;
176 interrupt-controller;
178 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
183 compatible = "renesas,gpio-r8a774c0",
184 "renesas,rcar-gen3-gpio";
187 #gpio-cells = <2>;
188 gpio-controller;
189 gpio-ranges = <&pfc 0 64 26>;
190 #interrupt-cells = <2>;
191 interrupt-controller;
193 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
198 compatible = "renesas,gpio-r8a774c0",
199 "renesas,rcar-gen3-gpio";
202 #gpio-cells = <2>;
203 gpio-controller;
204 gpio-ranges = <&pfc 0 96 16>;
205 #interrupt-cells = <2>;
206 interrupt-controller;
208 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
213 compatible = "renesas,gpio-r8a774c0",
214 "renesas,rcar-gen3-gpio";
217 #gpio-cells = <2>;
218 gpio-controller;
219 gpio-ranges = <&pfc 0 128 11>;
220 #interrupt-cells = <2>;
221 interrupt-controller;
223 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
228 compatible = "renesas,gpio-r8a774c0",
229 "renesas,rcar-gen3-gpio";
232 #gpio-cells = <2>;
233 gpio-controller;
234 gpio-ranges = <&pfc 0 160 20>;
235 #interrupt-cells = <2>;
236 interrupt-controller;
238 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
243 compatible = "renesas,gpio-r8a774c0",
244 "renesas,rcar-gen3-gpio";
247 #gpio-cells = <2>;
248 gpio-controller;
249 gpio-ranges = <&pfc 0 192 18>;
250 #interrupt-cells = <2>;
251 interrupt-controller;
253 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
258 compatible = "renesas,pfc-r8a774c0";
263 compatible = "renesas,r8a774c0-cmt0",
264 "renesas,rcar-gen3-cmt0";
269 clock-names = "fck";
270 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
276 compatible = "renesas,r8a774c0-cmt1",
277 "renesas,rcar-gen3-cmt1";
288 clock-names = "fck";
289 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
295 compatible = "renesas,r8a774c0-cmt1",
296 "renesas,rcar-gen3-cmt1";
307 clock-names = "fck";
308 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
314 compatible = "renesas,r8a774c0-cmt1",
315 "renesas,rcar-gen3-cmt1";
326 clock-names = "fck";
327 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
332 cpg: clock-controller@e6150000 {
333 compatible = "renesas,r8a774c0-cpg-mssr";
336 clock-names = "extal";
337 #clock-cells = <2>;
338 #power-domain-cells = <0>;
339 #reset-cells = <1>;
342 rst: reset-controller@e6160000 {
343 compatible = "renesas,r8a774c0-rst";
347 sysc: system-controller@e6180000 {
348 compatible = "renesas,r8a774c0-sysc";
350 #power-domain-cells = <1>;
354 compatible = "renesas,thermal-r8a774c0";
360 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
362 #thermal-sensor-cells = <0>;
365 intc_ex: interrupt-controller@e61c0000 {
366 compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc";
367 #interrupt-cells = <2>;
368 interrupt-controller;
372 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
377 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
382 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
388 clock-names = "fck";
389 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
395 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
401 clock-names = "fck";
402 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
408 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
414 clock-names = "fck";
415 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
421 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
427 clock-names = "fck";
428 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
434 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
440 clock-names = "fck";
441 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
447 #address-cells = <1>;
448 #size-cells = <0>;
449 compatible = "renesas,i2c-r8a774c0",
450 "renesas,rcar-gen3-i2c";
454 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
458 dma-names = "tx", "rx", "tx", "rx";
459 i2c-scl-internal-delay-ns = <110>;
464 #address-cells = <1>;
465 #size-cells = <0>;
466 compatible = "renesas,i2c-r8a774c0",
467 "renesas,rcar-gen3-i2c";
471 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
475 dma-names = "tx", "rx", "tx", "rx";
476 i2c-scl-internal-delay-ns = <6>;
481 #address-cells = <1>;
482 #size-cells = <0>;
483 compatible = "renesas,i2c-r8a774c0",
484 "renesas,rcar-gen3-i2c";
488 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
492 dma-names = "tx", "rx", "tx", "rx";
493 i2c-scl-internal-delay-ns = <6>;
498 #address-cells = <1>;
499 #size-cells = <0>;
500 compatible = "renesas,i2c-r8a774c0",
501 "renesas,rcar-gen3-i2c";
505 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
508 dma-names = "tx", "rx";
509 i2c-scl-internal-delay-ns = <110>;
514 #address-cells = <1>;
515 #size-cells = <0>;
516 compatible = "renesas,i2c-r8a774c0",
517 "renesas,rcar-gen3-i2c";
521 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
524 dma-names = "tx", "rx";
525 i2c-scl-internal-delay-ns = <6>;
530 #address-cells = <1>;
531 #size-cells = <0>;
532 compatible = "renesas,i2c-r8a774c0",
533 "renesas,rcar-gen3-i2c";
537 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
540 dma-names = "tx", "rx";
541 i2c-scl-internal-delay-ns = <6>;
546 #address-cells = <1>;
547 #size-cells = <0>;
548 compatible = "renesas,i2c-r8a774c0",
549 "renesas,rcar-gen3-i2c";
553 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
556 dma-names = "tx", "rx";
557 i2c-scl-internal-delay-ns = <6>;
562 #address-cells = <1>;
563 #size-cells = <0>;
564 compatible = "renesas,i2c-r8a774c0",
565 "renesas,rcar-gen3-i2c";
569 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
571 i2c-scl-internal-delay-ns = <6>;
576 #address-cells = <1>;
577 #size-cells = <0>;
578 compatible = "renesas,iic-r8a774c0",
579 "renesas,rcar-gen3-iic",
580 "renesas,rmobile-iic";
584 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
587 dma-names = "tx", "rx";
592 compatible = "renesas,hscif-r8a774c0",
593 "renesas,rcar-gen3-hscif",
600 clock-names = "fck", "brg_int", "scif_clk";
603 dma-names = "tx", "rx", "tx", "rx";
604 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
610 compatible = "renesas,hscif-r8a774c0",
611 "renesas,rcar-gen3-hscif",
618 clock-names = "fck", "brg_int", "scif_clk";
621 dma-names = "tx", "rx", "tx", "rx";
622 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
628 compatible = "renesas,hscif-r8a774c0",
629 "renesas,rcar-gen3-hscif",
636 clock-names = "fck", "brg_int", "scif_clk";
639 dma-names = "tx", "rx", "tx", "rx";
640 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
646 compatible = "renesas,hscif-r8a774c0",
647 "renesas,rcar-gen3-hscif",
654 clock-names = "fck", "brg_int", "scif_clk";
656 dma-names = "tx", "rx";
657 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
663 compatible = "renesas,hscif-r8a774c0",
664 "renesas,rcar-gen3-hscif",
671 clock-names = "fck", "brg_int", "scif_clk";
673 dma-names = "tx", "rx";
674 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
680 compatible = "renesas,usbhs-r8a774c0",
681 "renesas,rcar-gen3-usbhs";
687 dma-names = "ch0", "ch1", "ch2", "ch3";
690 phy-names = "usb";
691 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
696 usb_dmac0: dma-controller@e65a0000 {
697 compatible = "renesas,r8a774c0-usb-dmac",
698 "renesas,usb-dmac";
702 interrupt-names = "ch0", "ch1";
704 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
706 #dma-cells = <1>;
707 dma-channels = <2>;
710 usb_dmac1: dma-controller@e65b0000 {
711 compatible = "renesas,r8a774c0-usb-dmac",
712 "renesas,usb-dmac";
716 interrupt-names = "ch0", "ch1";
718 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
720 #dma-cells = <1>;
721 dma-channels = <2>;
724 dmac0: dma-controller@e6700000 {
725 compatible = "renesas,dmac-r8a774c0",
726 "renesas,rcar-dmac";
745 interrupt-names = "error",
751 clock-names = "fck";
752 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
754 #dma-cells = <1>;
755 dma-channels = <16>;
757 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
766 dmac1: dma-controller@e7300000 {
767 compatible = "renesas,dmac-r8a774c0",
768 "renesas,rcar-dmac";
787 interrupt-names = "error",
793 clock-names = "fck";
794 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
796 #dma-cells = <1>;
797 dma-channels = <16>;
799 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
808 dmac2: dma-controller@e7310000 {
809 compatible = "renesas,dmac-r8a774c0",
810 "renesas,rcar-dmac";
829 interrupt-names = "error",
835 clock-names = "fck";
836 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
838 #dma-cells = <1>;
839 dma-channels = <16>;
851 compatible = "renesas,ipmmu-r8a774c0";
853 renesas,ipmmu-main = <&ipmmu_mm 0>;
854 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
855 #iommu-cells = <1>;
859 compatible = "renesas,ipmmu-r8a774c0";
861 renesas,ipmmu-main = <&ipmmu_mm 1>;
862 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
863 #iommu-cells = <1>;
867 compatible = "renesas,ipmmu-r8a774c0";
869 renesas,ipmmu-main = <&ipmmu_mm 2>;
870 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
871 #iommu-cells = <1>;
875 compatible = "renesas,ipmmu-r8a774c0";
879 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
880 #iommu-cells = <1>;
884 compatible = "renesas,ipmmu-r8a774c0";
886 renesas,ipmmu-main = <&ipmmu_mm 4>;
887 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
888 #iommu-cells = <1>;
892 compatible = "renesas,ipmmu-r8a774c0";
894 renesas,ipmmu-main = <&ipmmu_mm 6>;
895 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
896 #iommu-cells = <1>;
900 compatible = "renesas,ipmmu-r8a774c0";
902 renesas,ipmmu-main = <&ipmmu_mm 12>;
903 power-domains = <&sysc R8A774C0_PD_A3VC>;
904 #iommu-cells = <1>;
908 compatible = "renesas,ipmmu-r8a774c0";
910 renesas,ipmmu-main = <&ipmmu_mm 14>;
911 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
912 #iommu-cells = <1>;
916 compatible = "renesas,ipmmu-r8a774c0";
918 renesas,ipmmu-main = <&ipmmu_mm 16>;
919 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
920 #iommu-cells = <1>;
924 compatible = "renesas,etheravb-r8a774c0",
925 "renesas,etheravb-rcar-gen3";
952 interrupt-names = "ch0", "ch1", "ch2", "ch3",
960 clock-names = "fck";
961 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
963 phy-mode = "rgmii";
964 rx-internal-delay-ps = <0>;
966 #address-cells = <1>;
967 #size-cells = <0>;
972 compatible = "renesas,can-r8a774c0",
973 "renesas,rcar-gen3-can";
979 clock-names = "clkp1", "clkp2", "can_clk";
980 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
981 assigned-clock-rates = <40000000>;
982 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
988 compatible = "renesas,can-r8a774c0",
989 "renesas,rcar-gen3-can";
995 clock-names = "clkp1", "clkp2", "can_clk";
996 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
997 assigned-clock-rates = <40000000>;
998 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1004 compatible = "renesas,r8a774c0-canfd",
1005 "renesas,rcar-gen3-canfd";
1009 interrupt-names = "ch_int", "g_int";
1013 clock-names = "fck", "canfd", "can_clk";
1014 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1015 assigned-clock-rates = <40000000>;
1016 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1030 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1033 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1035 #pwm-cells = <2>;
1040 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1043 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1045 #pwm-cells = <2>;
1050 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1053 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1055 #pwm-cells = <2>;
1060 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1063 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1065 #pwm-cells = <2>;
1070 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1073 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1075 #pwm-cells = <2>;
1080 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1083 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1085 #pwm-cells = <2>;
1090 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1093 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1095 #pwm-cells = <2>;
1100 compatible = "renesas,scif-r8a774c0",
1101 "renesas,rcar-gen3-scif", "renesas,scif";
1107 clock-names = "fck", "brg_int", "scif_clk";
1110 dma-names = "tx", "rx", "tx", "rx";
1111 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1117 compatible = "renesas,scif-r8a774c0",
1118 "renesas,rcar-gen3-scif", "renesas,scif";
1124 clock-names = "fck", "brg_int", "scif_clk";
1127 dma-names = "tx", "rx", "tx", "rx";
1128 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1134 compatible = "renesas,scif-r8a774c0",
1135 "renesas,rcar-gen3-scif", "renesas,scif";
1141 clock-names = "fck", "brg_int", "scif_clk";
1144 dma-names = "tx", "rx", "tx", "rx";
1145 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1151 compatible = "renesas,scif-r8a774c0",
1152 "renesas,rcar-gen3-scif", "renesas,scif";
1158 clock-names = "fck", "brg_int", "scif_clk";
1160 dma-names = "tx", "rx";
1161 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1167 compatible = "renesas,scif-r8a774c0",
1168 "renesas,rcar-gen3-scif", "renesas,scif";
1174 clock-names = "fck", "brg_int", "scif_clk";
1176 dma-names = "tx", "rx";
1177 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1183 compatible = "renesas,scif-r8a774c0",
1184 "renesas,rcar-gen3-scif", "renesas,scif";
1190 clock-names = "fck", "brg_int", "scif_clk";
1192 dma-names = "tx", "rx";
1193 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1199 compatible = "renesas,msiof-r8a774c0",
1200 "renesas,rcar-gen3-msiof";
1206 dma-names = "tx", "rx", "tx", "rx";
1207 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1209 #address-cells = <1>;
1210 #size-cells = <0>;
1215 compatible = "renesas,msiof-r8a774c0",
1216 "renesas,rcar-gen3-msiof";
1221 dma-names = "tx", "rx";
1222 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1224 #address-cells = <1>;
1225 #size-cells = <0>;
1230 compatible = "renesas,msiof-r8a774c0",
1231 "renesas,rcar-gen3-msiof";
1236 dma-names = "tx", "rx";
1237 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1239 #address-cells = <1>;
1240 #size-cells = <0>;
1245 compatible = "renesas,msiof-r8a774c0",
1246 "renesas,rcar-gen3-msiof";
1251 dma-names = "tx", "rx";
1252 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1254 #address-cells = <1>;
1255 #size-cells = <0>;
1260 compatible = "renesas,vin-r8a774c0";
1264 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1270 #address-cells = <1>;
1271 #size-cells = <0>;
1274 #address-cells = <1>;
1275 #size-cells = <0>;
1279 vin4csi40: endpoint@2 {
1280 reg = <2>;
1281 remote-endpoint = <&csi40vin4>;
1288 compatible = "renesas,vin-r8a774c0";
1292 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1298 #address-cells = <1>;
1299 #size-cells = <0>;
1302 #address-cells = <1>;
1303 #size-cells = <0>;
1307 vin5csi40: endpoint@2 {
1308 reg = <2>;
1309 remote-endpoint = <&csi40vin5>;
1317 * #sound-dai-cells is required if simple-card
1319 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1320 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1323 * #clock-cells is required for audio_clkout0/1/2/3
1325 * clkout : #clock-cells = <0>; <&rcar_sound>;
1326 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1328 compatible = "renesas,rcar_sound-r8a774c0",
1329 "renesas,rcar_sound-gen3";
1332 <0 0xec540000 0 0x1000>, /* SSIU */
1335 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1354 clock-names = "ssi-all",
1356 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1359 "src.5", "src.4", "src.3", "src.2",
1365 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1372 reset-names = "ssi-all",
1374 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1379 ctu00: ctu-0 { };
1380 ctu01: ctu-1 { };
1381 ctu02: ctu-2 { };
1382 ctu03: ctu-3 { };
1383 ctu10: ctu-4 { };
1384 ctu11: ctu-5 { };
1385 ctu12: ctu-6 { };
1386 ctu13: ctu-7 { };
1390 dvc0: dvc-0 {
1392 dma-names = "tx";
1394 dvc1: dvc-1 {
1396 dma-names = "tx";
1401 mix0: mix-0 { };
1402 mix1: mix-1 { };
1406 src0: src-0 {
1409 dma-names = "rx", "tx";
1411 src1: src-1 {
1414 dma-names = "rx", "tx";
1416 src2: src-2 {
1419 dma-names = "rx", "tx";
1421 src3: src-3 {
1424 dma-names = "rx", "tx";
1426 src4: src-4 {
1429 dma-names = "rx", "tx";
1431 src5: src-5 {
1434 dma-names = "rx", "tx";
1436 src6: src-6 {
1439 dma-names = "rx", "tx";
1441 src7: src-7 {
1444 dma-names = "rx", "tx";
1446 src8: src-8 {
1449 dma-names = "rx", "tx";
1451 src9: src-9 {
1454 dma-names = "rx", "tx";
1459 ssi0: ssi-0 {
1463 dma-names = "rx", "tx", "rxu", "txu";
1465 ssi1: ssi-1 {
1469 dma-names = "rx", "tx", "rxu", "txu";
1471 ssi2: ssi-2 {
1475 dma-names = "rx", "tx", "rxu", "txu";
1477 ssi3: ssi-3 {
1481 dma-names = "rx", "tx", "rxu", "txu";
1483 ssi4: ssi-4 {
1487 dma-names = "rx", "tx", "rxu", "txu";
1489 ssi5: ssi-5 {
1493 dma-names = "rx", "tx", "rxu", "txu";
1495 ssi6: ssi-6 {
1499 dma-names = "rx", "tx", "rxu", "txu";
1501 ssi7: ssi-7 {
1505 dma-names = "rx", "tx", "rxu", "txu";
1507 ssi8: ssi-8 {
1511 dma-names = "rx", "tx", "rxu", "txu";
1513 ssi9: ssi-9 {
1517 dma-names = "rx", "tx", "rxu", "txu";
1522 audma0: dma-controller@ec700000 {
1523 compatible = "renesas,dmac-r8a774c0",
1524 "renesas,rcar-dmac";
1543 interrupt-names = "error",
1549 clock-names = "fck";
1550 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1552 #dma-cells = <1>;
1553 dma-channels = <16>;
1555 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1565 compatible = "renesas,xhci-r8a774c0",
1566 "renesas,rcar-gen3-xhci";
1570 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1576 compatible = "renesas,r8a774c0-usb3-peri",
1577 "renesas,rcar-gen3-usb3-peri";
1581 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1587 compatible = "generic-ohci";
1592 phy-names = "usb";
1593 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1599 compatible = "generic-ehci";
1603 phys = <&usb2_phy0 2>;
1604 phy-names = "usb";
1606 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1611 usb2_phy0: usb-phy@ee080200 {
1612 compatible = "renesas,usb2-phy-r8a774c0",
1613 "renesas,rcar-gen3-usb2-phy";
1617 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1619 #phy-cells = <1>;
1624 compatible = "renesas,sdhi-r8a774c0",
1625 "renesas,rcar-gen3-sdhi";
1629 clock-names = "core", "clkh";
1630 max-frequency = <200000000>;
1631 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1637 compatible = "renesas,sdhi-r8a774c0",
1638 "renesas,rcar-gen3-sdhi";
1642 clock-names = "core", "clkh";
1643 max-frequency = <200000000>;
1644 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1650 compatible = "renesas,sdhi-r8a774c0",
1651 "renesas,rcar-gen3-sdhi";
1655 clock-names = "core", "clkh";
1656 max-frequency = <200000000>;
1657 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1663 compatible = "renesas,r8a774c0-rpc-if",
1664 "renesas,rcar-gen3-rpc-if";
1668 reg-names = "regs", "dirmap", "wbuf";
1671 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1673 #address-cells = <1>;
1674 #size-cells = <0>;
1678 gic: interrupt-controller@f1010000 {
1679 compatible = "arm,gic-400";
1680 #interrupt-cells = <3>;
1681 #address-cells = <0>;
1682 interrupt-controller;
1688 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1690 clock-names = "clk";
1691 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1696 compatible = "renesas,pcie-r8a774c0",
1697 "renesas,pcie-rcar-gen3";
1699 #address-cells = <3>;
1700 #size-cells = <2>;
1701 bus-range = <0x00 0xff>;
1708 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1712 #interrupt-cells = <1>;
1713 interrupt-map-mask = <0 0 0 0>;
1714 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1716 clock-names = "pcie", "pcie_bus";
1717 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1719 iommu-map = <0 &ipmmu_hc 0 1>;
1720 iommu-map-mask = <0>;
1724 pciec0_ep: pcie-ep@fe000000 {
1725 compatible = "renesas,r8a774c0-pcie-ep",
1726 "renesas,rcar-gen3-pcie-ep";
1732 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
1737 clock-names = "pcie";
1739 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1748 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1758 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1768 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1778 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1787 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1796 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1805 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1814 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1820 compatible = "renesas,r8a774c0-csi2";
1824 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1829 #address-cells = <1>;
1830 #size-cells = <0>;
1837 #address-cells = <1>;
1838 #size-cells = <0>;
1844 remote-endpoint = <&vin4csi40>;
1848 remote-endpoint = <&vin5csi40>;
1855 compatible = "renesas,du-r8a774c0";
1860 clock-names = "du.0", "du.1";
1862 reset-names = "du.0";
1868 #address-cells = <1>;
1869 #size-cells = <0>;
1878 remote-endpoint = <&lvds0_in>;
1882 port@2 {
1883 reg = <2>;
1885 remote-endpoint = <&lvds1_in>;
1891 lvds0: lvds-encoder@feb90000 {
1892 compatible = "renesas,r8a774c0-lvds";
1895 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1902 #address-cells = <1>;
1903 #size-cells = <0>;
1908 remote-endpoint = <&du_out_lvds0>;
1918 lvds1: lvds-encoder@feb90100 {
1919 compatible = "renesas,r8a774c0-lvds";
1922 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1927 #address-cells = <1>;
1928 #size-cells = <0>;
1933 remote-endpoint = <&du_out_lvds1>;
1949 thermal-zones {
1950 cpu-thermal {
1951 polling-delay-passive = <250>;
1952 polling-delay = <0>;
1953 thermal-sensors = <&thermal>;
1954 sustainable-power = <717>;
1956 cooling-maps {
1959 cooling-device = <&a53_0 0 2>;
1965 sensor1_crit: sensor1-crit {
1971 target: trip-point1 {
1981 compatible = "arm,armv8-timer";
1982 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1983 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1984 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1985 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1988 /* External USB clocks - can be overridden by the board */
1990 compatible = "fixed-clock";
1991 #clock-cells = <0>;
1992 clock-frequency = <0>;
1996 compatible = "fixed-clock";
1997 #clock-cells = <0>;
1998 clock-frequency = <0>;