Lines Matching +full:ssiu +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774a1-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
41 /* External CAN clock - to be overridden by boards that provide it */
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
49 compatible = "operating-points-v2";
50 opp-shared;
52 opp-500000000 {
53 opp-hz = /bits/ 64 <500000000>;
54 opp-microvolt = <820000>;
55 clock-latency-ns = <300000>;
57 opp-1000000000 {
58 opp-hz = /bits/ 64 <1000000000>;
59 opp-microvolt = <820000>;
60 clock-latency-ns = <300000>;
62 opp-1500000000 {
63 opp-hz = /bits/ 64 <1500000000>;
64 opp-microvolt = <820000>;
65 clock-latency-ns = <300000>;
66 opp-suspend;
70 cluster1_opp: opp-table-1 {
71 compatible = "operating-points-v2";
72 opp-shared;
74 opp-800000000 {
75 opp-hz = /bits/ 64 <800000000>;
76 opp-microvolt = <820000>;
77 clock-latency-ns = <300000>;
79 opp-1000000000 {
80 opp-hz = /bits/ 64 <1000000000>;
81 opp-microvolt = <820000>;
82 clock-latency-ns = <300000>;
84 opp-1200000000 {
85 opp-hz = /bits/ 64 <1200000000>;
86 opp-microvolt = <820000>;
87 clock-latency-ns = <300000>;
92 #address-cells = <1>;
93 #size-cells = <0>;
95 cpu-map {
122 compatible = "arm,cortex-a57";
125 power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
126 next-level-cache = <&L2_CA57>;
127 enable-method = "psci";
128 dynamic-power-coefficient = <854>;
130 operating-points-v2 = <&cluster0_opp>;
131 capacity-dmips-mhz = <1024>;
132 #cooling-cells = <2>;
136 compatible = "arm,cortex-a57";
139 power-domains = <&sysc R8A774A1_PD_CA57_CPU1>;
140 next-level-cache = <&L2_CA57>;
141 enable-method = "psci";
143 operating-points-v2 = <&cluster0_opp>;
144 capacity-dmips-mhz = <1024>;
145 #cooling-cells = <2>;
149 compatible = "arm,cortex-a53";
152 power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
153 next-level-cache = <&L2_CA53>;
154 enable-method = "psci";
155 #cooling-cells = <2>;
156 dynamic-power-coefficient = <277>;
158 operating-points-v2 = <&cluster1_opp>;
159 capacity-dmips-mhz = <560>;
163 compatible = "arm,cortex-a53";
166 power-domains = <&sysc R8A774A1_PD_CA53_CPU1>;
167 next-level-cache = <&L2_CA53>;
168 enable-method = "psci";
170 operating-points-v2 = <&cluster1_opp>;
171 capacity-dmips-mhz = <560>;
175 compatible = "arm,cortex-a53";
178 power-domains = <&sysc R8A774A1_PD_CA53_CPU2>;
179 next-level-cache = <&L2_CA53>;
180 enable-method = "psci";
182 operating-points-v2 = <&cluster1_opp>;
183 capacity-dmips-mhz = <560>;
187 compatible = "arm,cortex-a53";
190 power-domains = <&sysc R8A774A1_PD_CA53_CPU3>;
191 next-level-cache = <&L2_CA53>;
192 enable-method = "psci";
194 operating-points-v2 = <&cluster1_opp>;
195 capacity-dmips-mhz = <560>;
198 L2_CA57: cache-controller-0 {
200 power-domains = <&sysc R8A774A1_PD_CA57_SCU>;
201 cache-unified;
202 cache-level = <2>;
205 L2_CA53: cache-controller-1 {
207 power-domains = <&sysc R8A774A1_PD_CA53_SCU>;
208 cache-unified;
209 cache-level = <2>;
214 compatible = "fixed-clock";
215 #clock-cells = <0>;
217 clock-frequency = <0>;
221 compatible = "fixed-clock";
222 #clock-cells = <0>;
224 clock-frequency = <0>;
227 /* External PCIe clock - can be overridden by the board */
229 compatible = "fixed-clock";
230 #clock-cells = <0>;
231 clock-frequency = <0>;
235 compatible = "arm,cortex-a53-pmu";
236 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
240 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
244 compatible = "arm,cortex-a57-pmu";
245 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
247 interrupt-affinity = <&a57_0>, <&a57_1>;
251 compatible = "arm,psci-1.0", "arm,psci-0.2";
255 /* External SCIF clock - to be overridden by boards that provide it */
257 compatible = "fixed-clock";
258 #clock-cells = <0>;
259 clock-frequency = <0>;
263 compatible = "simple-bus";
264 interrupt-parent = <&gic>;
265 #address-cells = <2>;
266 #size-cells = <2>;
270 compatible = "renesas,r8a774a1-wdt",
271 "renesas,rcar-gen3-wdt";
275 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
281 compatible = "renesas,gpio-r8a774a1",
282 "renesas,rcar-gen3-gpio";
285 #gpio-cells = <2>;
286 gpio-controller;
287 gpio-ranges = <&pfc 0 0 16>;
288 #interrupt-cells = <2>;
289 interrupt-controller;
291 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
296 compatible = "renesas,gpio-r8a774a1",
297 "renesas,rcar-gen3-gpio";
300 #gpio-cells = <2>;
301 gpio-controller;
302 gpio-ranges = <&pfc 0 32 29>;
303 #interrupt-cells = <2>;
304 interrupt-controller;
306 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
311 compatible = "renesas,gpio-r8a774a1",
312 "renesas,rcar-gen3-gpio";
315 #gpio-cells = <2>;
316 gpio-controller;
317 gpio-ranges = <&pfc 0 64 15>;
318 #interrupt-cells = <2>;
319 interrupt-controller;
321 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
326 compatible = "renesas,gpio-r8a774a1",
327 "renesas,rcar-gen3-gpio";
330 #gpio-cells = <2>;
331 gpio-controller;
332 gpio-ranges = <&pfc 0 96 16>;
333 #interrupt-cells = <2>;
334 interrupt-controller;
336 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
341 compatible = "renesas,gpio-r8a774a1",
342 "renesas,rcar-gen3-gpio";
345 #gpio-cells = <2>;
346 gpio-controller;
347 gpio-ranges = <&pfc 0 128 18>;
348 #interrupt-cells = <2>;
349 interrupt-controller;
351 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
356 compatible = "renesas,gpio-r8a774a1",
357 "renesas,rcar-gen3-gpio";
360 #gpio-cells = <2>;
361 gpio-controller;
362 gpio-ranges = <&pfc 0 160 26>;
363 #interrupt-cells = <2>;
364 interrupt-controller;
366 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
371 compatible = "renesas,gpio-r8a774a1",
372 "renesas,rcar-gen3-gpio";
375 #gpio-cells = <2>;
376 gpio-controller;
377 gpio-ranges = <&pfc 0 192 32>;
378 #interrupt-cells = <2>;
379 interrupt-controller;
381 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
386 compatible = "renesas,gpio-r8a774a1",
387 "renesas,rcar-gen3-gpio";
390 #gpio-cells = <2>;
391 gpio-controller;
392 gpio-ranges = <&pfc 0 224 4>;
393 #interrupt-cells = <2>;
394 interrupt-controller;
396 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
401 compatible = "renesas,pfc-r8a774a1";
406 compatible = "renesas,r8a774a1-cmt0",
407 "renesas,rcar-gen3-cmt0";
412 clock-names = "fck";
413 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
419 compatible = "renesas,r8a774a1-cmt1",
420 "renesas,rcar-gen3-cmt1";
431 clock-names = "fck";
432 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
438 compatible = "renesas,r8a774a1-cmt1",
439 "renesas,rcar-gen3-cmt1";
450 clock-names = "fck";
451 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
457 compatible = "renesas,r8a774a1-cmt1",
458 "renesas,rcar-gen3-cmt1";
469 clock-names = "fck";
470 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
475 cpg: clock-controller@e6150000 {
476 compatible = "renesas,r8a774a1-cpg-mssr";
479 clock-names = "extal", "extalr";
480 #clock-cells = <2>;
481 #power-domain-cells = <0>;
482 #reset-cells = <1>;
485 rst: reset-controller@e6160000 {
486 compatible = "renesas,r8a774a1-rst";
490 sysc: system-controller@e6180000 {
491 compatible = "renesas,r8a774a1-sysc";
493 #power-domain-cells = <1>;
497 compatible = "renesas,r8a774a1-thermal";
505 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
507 #thermal-sensor-cells = <1>;
510 intc_ex: interrupt-controller@e61c0000 {
511 compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
512 #interrupt-cells = <2>;
513 interrupt-controller;
517 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
522 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
527 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
533 clock-names = "fck";
534 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
540 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
546 clock-names = "fck";
547 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
553 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
559 clock-names = "fck";
560 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
566 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
572 clock-names = "fck";
573 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
579 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
585 clock-names = "fck";
586 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
592 #address-cells = <1>;
593 #size-cells = <0>;
594 compatible = "renesas,i2c-r8a774a1",
595 "renesas,rcar-gen3-i2c";
599 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
603 dma-names = "tx", "rx", "tx", "rx";
604 i2c-scl-internal-delay-ns = <110>;
609 #address-cells = <1>;
610 #size-cells = <0>;
611 compatible = "renesas,i2c-r8a774a1",
612 "renesas,rcar-gen3-i2c";
616 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
620 dma-names = "tx", "rx", "tx", "rx";
621 i2c-scl-internal-delay-ns = <6>;
626 #address-cells = <1>;
627 #size-cells = <0>;
628 compatible = "renesas,i2c-r8a774a1",
629 "renesas,rcar-gen3-i2c";
633 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
637 dma-names = "tx", "rx", "tx", "rx";
638 i2c-scl-internal-delay-ns = <6>;
643 #address-cells = <1>;
644 #size-cells = <0>;
645 compatible = "renesas,i2c-r8a774a1",
646 "renesas,rcar-gen3-i2c";
650 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
653 dma-names = "tx", "rx";
654 i2c-scl-internal-delay-ns = <110>;
659 #address-cells = <1>;
660 #size-cells = <0>;
661 compatible = "renesas,i2c-r8a774a1",
662 "renesas,rcar-gen3-i2c";
666 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
669 dma-names = "tx", "rx";
670 i2c-scl-internal-delay-ns = <110>;
675 #address-cells = <1>;
676 #size-cells = <0>;
677 compatible = "renesas,i2c-r8a774a1",
678 "renesas,rcar-gen3-i2c";
682 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
685 dma-names = "tx", "rx";
686 i2c-scl-internal-delay-ns = <110>;
691 #address-cells = <1>;
692 #size-cells = <0>;
693 compatible = "renesas,i2c-r8a774a1",
694 "renesas,rcar-gen3-i2c";
698 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
701 dma-names = "tx", "rx";
702 i2c-scl-internal-delay-ns = <6>;
707 #address-cells = <1>;
708 #size-cells = <0>;
709 compatible = "renesas,iic-r8a774a1",
710 "renesas,rcar-gen3-iic",
711 "renesas,rmobile-iic";
715 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
718 dma-names = "tx", "rx";
723 compatible = "renesas,hscif-r8a774a1",
724 "renesas,rcar-gen3-hscif",
731 clock-names = "fck", "brg_int", "scif_clk";
734 dma-names = "tx", "rx", "tx", "rx";
735 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
741 compatible = "renesas,hscif-r8a774a1",
742 "renesas,rcar-gen3-hscif",
749 clock-names = "fck", "brg_int", "scif_clk";
752 dma-names = "tx", "rx", "tx", "rx";
753 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
759 compatible = "renesas,hscif-r8a774a1",
760 "renesas,rcar-gen3-hscif",
767 clock-names = "fck", "brg_int", "scif_clk";
770 dma-names = "tx", "rx", "tx", "rx";
771 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
777 compatible = "renesas,hscif-r8a774a1",
778 "renesas,rcar-gen3-hscif",
785 clock-names = "fck", "brg_int", "scif_clk";
787 dma-names = "tx", "rx";
788 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
794 compatible = "renesas,hscif-r8a774a1",
795 "renesas,rcar-gen3-hscif",
802 clock-names = "fck", "brg_int", "scif_clk";
804 dma-names = "tx", "rx";
805 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
811 compatible = "renesas,usbhs-r8a774a1",
812 "renesas,rcar-gen3-usbhs";
818 dma-names = "ch0", "ch1", "ch2", "ch3";
821 phy-names = "usb";
822 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
827 usb2_clksel: clock-controller@e6590630 {
828 compatible = "renesas,r8a774a1-rcar-usb2-clock-sel",
829 "renesas,rcar-gen3-usb2-clock-sel";
833 clock-names = "ehci_ohci", "hs-usb-if",
835 #clock-cells = <0>;
836 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
838 reset-names = "ehci_ohci", "hs-usb-if";
842 usb_dmac0: dma-controller@e65a0000 {
843 compatible = "renesas,r8a774a1-usb-dmac",
844 "renesas,usb-dmac";
848 interrupt-names = "ch0", "ch1";
850 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
852 #dma-cells = <1>;
853 dma-channels = <2>;
856 usb_dmac1: dma-controller@e65b0000 {
857 compatible = "renesas,r8a774a1-usb-dmac",
858 "renesas,usb-dmac";
862 interrupt-names = "ch0", "ch1";
864 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
866 #dma-cells = <1>;
867 dma-channels = <2>;
870 usb3_phy0: usb-phy@e65ee000 {
871 compatible = "renesas,r8a774a1-usb3-phy",
872 "renesas,rcar-gen3-usb3-phy";
876 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
877 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
879 #phy-cells = <0>;
883 dmac0: dma-controller@e6700000 {
884 compatible = "renesas,dmac-r8a774a1",
885 "renesas,rcar-dmac";
904 interrupt-names = "error",
910 clock-names = "fck";
911 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
913 #dma-cells = <1>;
914 dma-channels = <16>;
916 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
925 dmac1: dma-controller@e7300000 {
926 compatible = "renesas,dmac-r8a774a1",
927 "renesas,rcar-dmac";
946 interrupt-names = "error",
952 clock-names = "fck";
953 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
955 #dma-cells = <1>;
956 dma-channels = <16>;
958 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
967 dmac2: dma-controller@e7310000 {
968 compatible = "renesas,dmac-r8a774a1",
969 "renesas,rcar-dmac";
988 interrupt-names = "error",
994 clock-names = "fck";
995 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
997 #dma-cells = <1>;
998 dma-channels = <16>;
1010 compatible = "renesas,ipmmu-r8a774a1";
1012 renesas,ipmmu-main = <&ipmmu_mm 0>;
1013 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1014 #iommu-cells = <1>;
1018 compatible = "renesas,ipmmu-r8a774a1";
1020 renesas,ipmmu-main = <&ipmmu_mm 1>;
1021 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1022 #iommu-cells = <1>;
1026 compatible = "renesas,ipmmu-r8a774a1";
1028 renesas,ipmmu-main = <&ipmmu_mm 2>;
1029 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1030 #iommu-cells = <1>;
1034 compatible = "renesas,ipmmu-r8a774a1";
1038 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1039 #iommu-cells = <1>;
1043 compatible = "renesas,ipmmu-r8a774a1";
1045 renesas,ipmmu-main = <&ipmmu_mm 4>;
1046 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1047 #iommu-cells = <1>;
1051 compatible = "renesas,ipmmu-r8a774a1";
1053 renesas,ipmmu-main = <&ipmmu_mm 5>;
1054 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1055 #iommu-cells = <1>;
1059 compatible = "renesas,ipmmu-r8a774a1";
1061 renesas,ipmmu-main = <&ipmmu_mm 6>;
1062 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1063 #iommu-cells = <1>;
1067 compatible = "renesas,ipmmu-r8a774a1";
1069 renesas,ipmmu-main = <&ipmmu_mm 8>;
1070 power-domains = <&sysc R8A774A1_PD_A3VC>;
1071 #iommu-cells = <1>;
1075 compatible = "renesas,ipmmu-r8a774a1";
1077 renesas,ipmmu-main = <&ipmmu_mm 9>;
1078 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1079 #iommu-cells = <1>;
1083 compatible = "renesas,etheravb-r8a774a1",
1084 "renesas,etheravb-rcar-gen3";
1111 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1119 clock-names = "fck";
1120 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1122 phy-mode = "rgmii";
1123 rx-internal-delay-ps = <0>;
1124 tx-internal-delay-ps = <0>;
1126 #address-cells = <1>;
1127 #size-cells = <0>;
1132 compatible = "renesas,can-r8a774a1",
1133 "renesas,rcar-gen3-can";
1139 clock-names = "clkp1", "clkp2", "can_clk";
1140 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1141 assigned-clock-rates = <40000000>;
1142 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1148 compatible = "renesas,can-r8a774a1",
1149 "renesas,rcar-gen3-can";
1155 clock-names = "clkp1", "clkp2", "can_clk";
1156 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1157 assigned-clock-rates = <40000000>;
1158 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1164 compatible = "renesas,r8a774a1-canfd",
1165 "renesas,rcar-gen3-canfd";
1169 interrupt-names = "ch_int", "g_int";
1173 clock-names = "fck", "canfd", "can_clk";
1174 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1175 assigned-clock-rates = <40000000>;
1176 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1190 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1192 #pwm-cells = <2>;
1195 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1200 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1202 #pwm-cells = <2>;
1205 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1210 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1212 #pwm-cells = <2>;
1215 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1220 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1222 #pwm-cells = <2>;
1225 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1230 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1232 #pwm-cells = <2>;
1235 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1240 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1242 #pwm-cells = <2>;
1245 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1250 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1252 #pwm-cells = <2>;
1255 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1260 compatible = "renesas,scif-r8a774a1",
1261 "renesas,rcar-gen3-scif", "renesas,scif";
1267 clock-names = "fck", "brg_int", "scif_clk";
1270 dma-names = "tx", "rx", "tx", "rx";
1271 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1277 compatible = "renesas,scif-r8a774a1",
1278 "renesas,rcar-gen3-scif", "renesas,scif";
1284 clock-names = "fck", "brg_int", "scif_clk";
1287 dma-names = "tx", "rx", "tx", "rx";
1288 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1294 compatible = "renesas,scif-r8a774a1",
1295 "renesas,rcar-gen3-scif", "renesas,scif";
1301 clock-names = "fck", "brg_int", "scif_clk";
1304 dma-names = "tx", "rx", "tx", "rx";
1305 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1311 compatible = "renesas,scif-r8a774a1",
1312 "renesas,rcar-gen3-scif", "renesas,scif";
1318 clock-names = "fck", "brg_int", "scif_clk";
1320 dma-names = "tx", "rx";
1321 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1327 compatible = "renesas,scif-r8a774a1",
1328 "renesas,rcar-gen3-scif", "renesas,scif";
1334 clock-names = "fck", "brg_int", "scif_clk";
1336 dma-names = "tx", "rx";
1337 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1343 compatible = "renesas,scif-r8a774a1",
1344 "renesas,rcar-gen3-scif", "renesas,scif";
1350 clock-names = "fck", "brg_int", "scif_clk";
1353 dma-names = "tx", "rx", "tx", "rx";
1354 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1360 compatible = "renesas,msiof-r8a774a1",
1361 "renesas,rcar-gen3-msiof";
1367 dma-names = "tx", "rx", "tx", "rx";
1368 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1370 #address-cells = <1>;
1371 #size-cells = <0>;
1376 compatible = "renesas,msiof-r8a774a1",
1377 "renesas,rcar-gen3-msiof";
1383 dma-names = "tx", "rx", "tx", "rx";
1384 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1386 #address-cells = <1>;
1387 #size-cells = <0>;
1392 compatible = "renesas,msiof-r8a774a1",
1393 "renesas,rcar-gen3-msiof";
1398 dma-names = "tx", "rx";
1399 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1401 #address-cells = <1>;
1402 #size-cells = <0>;
1407 compatible = "renesas,msiof-r8a774a1",
1408 "renesas,rcar-gen3-msiof";
1413 dma-names = "tx", "rx";
1414 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1416 #address-cells = <1>;
1417 #size-cells = <0>;
1422 compatible = "renesas,vin-r8a774a1";
1426 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1432 #address-cells = <1>;
1433 #size-cells = <0>;
1436 #address-cells = <1>;
1437 #size-cells = <0>;
1443 remote-endpoint = <&csi20vin0>;
1445 vin0csi40: endpoint@2 {
1446 reg = <2>;
1447 remote-endpoint = <&csi40vin0>;
1454 compatible = "renesas,vin-r8a774a1";
1458 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1464 #address-cells = <1>;
1465 #size-cells = <0>;
1468 #address-cells = <1>;
1469 #size-cells = <0>;
1475 remote-endpoint = <&csi20vin1>;
1477 vin1csi40: endpoint@2 {
1478 reg = <2>;
1479 remote-endpoint = <&csi40vin1>;
1486 compatible = "renesas,vin-r8a774a1";
1490 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1492 renesas,id = <2>;
1496 #address-cells = <1>;
1497 #size-cells = <0>;
1500 #address-cells = <1>;
1501 #size-cells = <0>;
1507 remote-endpoint = <&csi20vin2>;
1509 vin2csi40: endpoint@2 {
1510 reg = <2>;
1511 remote-endpoint = <&csi40vin2>;
1518 compatible = "renesas,vin-r8a774a1";
1522 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1528 #address-cells = <1>;
1529 #size-cells = <0>;
1532 #address-cells = <1>;
1533 #size-cells = <0>;
1539 remote-endpoint = <&csi20vin3>;
1541 vin3csi40: endpoint@2 {
1542 reg = <2>;
1543 remote-endpoint = <&csi40vin3>;
1550 compatible = "renesas,vin-r8a774a1";
1554 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1560 #address-cells = <1>;
1561 #size-cells = <0>;
1564 #address-cells = <1>;
1565 #size-cells = <0>;
1571 remote-endpoint = <&csi20vin4>;
1573 vin4csi40: endpoint@2 {
1574 reg = <2>;
1575 remote-endpoint = <&csi40vin4>;
1582 compatible = "renesas,vin-r8a774a1";
1586 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1592 #address-cells = <1>;
1593 #size-cells = <0>;
1596 #address-cells = <1>;
1597 #size-cells = <0>;
1603 remote-endpoint = <&csi20vin5>;
1605 vin5csi40: endpoint@2 {
1606 reg = <2>;
1607 remote-endpoint = <&csi40vin5>;
1614 compatible = "renesas,vin-r8a774a1";
1618 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1624 #address-cells = <1>;
1625 #size-cells = <0>;
1628 #address-cells = <1>;
1629 #size-cells = <0>;
1635 remote-endpoint = <&csi20vin6>;
1637 vin6csi40: endpoint@2 {
1638 reg = <2>;
1639 remote-endpoint = <&csi40vin6>;
1646 compatible = "renesas,vin-r8a774a1";
1650 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1656 #address-cells = <1>;
1657 #size-cells = <0>;
1660 #address-cells = <1>;
1661 #size-cells = <0>;
1667 remote-endpoint = <&csi20vin7>;
1669 vin7csi40: endpoint@2 {
1670 reg = <2>;
1671 remote-endpoint = <&csi40vin7>;
1679 * #sound-dai-cells is required if simple-card
1681 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1682 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1685 * #clock-cells is required for audio_clkout0/1/2/3
1687 * clkout : #clock-cells = <0>; <&rcar_sound>;
1688 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1690 compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
1693 <0 0xec540000 0 0x1000>, /* SSIU */
1696 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1715 clock-names = "ssi-all",
1717 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1720 "src.5", "src.4", "src.3", "src.2",
1726 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1733 reset-names = "ssi-all",
1735 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1740 ctu00: ctu-0 { };
1741 ctu01: ctu-1 { };
1742 ctu02: ctu-2 { };
1743 ctu03: ctu-3 { };
1744 ctu10: ctu-4 { };
1745 ctu11: ctu-5 { };
1746 ctu12: ctu-6 { };
1747 ctu13: ctu-7 { };
1751 dvc0: dvc-0 {
1753 dma-names = "tx";
1755 dvc1: dvc-1 {
1757 dma-names = "tx";
1762 mix0: mix-0 { };
1763 mix1: mix-1 { };
1767 src0: src-0 {
1770 dma-names = "rx", "tx";
1772 src1: src-1 {
1775 dma-names = "rx", "tx";
1777 src2: src-2 {
1780 dma-names = "rx", "tx";
1782 src3: src-3 {
1785 dma-names = "rx", "tx";
1787 src4: src-4 {
1790 dma-names = "rx", "tx";
1792 src5: src-5 {
1795 dma-names = "rx", "tx";
1797 src6: src-6 {
1800 dma-names = "rx", "tx";
1802 src7: src-7 {
1805 dma-names = "rx", "tx";
1807 src8: src-8 {
1810 dma-names = "rx", "tx";
1812 src9: src-9 {
1815 dma-names = "rx", "tx";
1820 ssi0: ssi-0 {
1823 dma-names = "rx", "tx";
1825 ssi1: ssi-1 {
1828 dma-names = "rx", "tx";
1830 ssi2: ssi-2 {
1833 dma-names = "rx", "tx";
1835 ssi3: ssi-3 {
1838 dma-names = "rx", "tx";
1840 ssi4: ssi-4 {
1843 dma-names = "rx", "tx";
1845 ssi5: ssi-5 {
1848 dma-names = "rx", "tx";
1850 ssi6: ssi-6 {
1853 dma-names = "rx", "tx";
1855 ssi7: ssi-7 {
1858 dma-names = "rx", "tx";
1860 ssi8: ssi-8 {
1863 dma-names = "rx", "tx";
1865 ssi9: ssi-9 {
1868 dma-names = "rx", "tx";
1872 rcar_sound,ssiu {
1873 ssiu00: ssiu-0 {
1875 dma-names = "rx", "tx";
1877 ssiu01: ssiu-1 {
1879 dma-names = "rx", "tx";
1881 ssiu02: ssiu-2 {
1883 dma-names = "rx", "tx";
1885 ssiu03: ssiu-3 {
1887 dma-names = "rx", "tx";
1889 ssiu04: ssiu-4 {
1891 dma-names = "rx", "tx";
1893 ssiu05: ssiu-5 {
1895 dma-names = "rx", "tx";
1897 ssiu06: ssiu-6 {
1899 dma-names = "rx", "tx";
1901 ssiu07: ssiu-7 {
1903 dma-names = "rx", "tx";
1905 ssiu10: ssiu-8 {
1907 dma-names = "rx", "tx";
1909 ssiu11: ssiu-9 {
1911 dma-names = "rx", "tx";
1913 ssiu12: ssiu-10 {
1915 dma-names = "rx", "tx";
1917 ssiu13: ssiu-11 {
1919 dma-names = "rx", "tx";
1921 ssiu14: ssiu-12 {
1923 dma-names = "rx", "tx";
1925 ssiu15: ssiu-13 {
1927 dma-names = "rx", "tx";
1929 ssiu16: ssiu-14 {
1931 dma-names = "rx", "tx";
1933 ssiu17: ssiu-15 {
1935 dma-names = "rx", "tx";
1937 ssiu20: ssiu-16 {
1939 dma-names = "rx", "tx";
1941 ssiu21: ssiu-17 {
1943 dma-names = "rx", "tx";
1945 ssiu22: ssiu-18 {
1947 dma-names = "rx", "tx";
1949 ssiu23: ssiu-19 {
1951 dma-names = "rx", "tx";
1953 ssiu24: ssiu-20 {
1955 dma-names = "rx", "tx";
1957 ssiu25: ssiu-21 {
1959 dma-names = "rx", "tx";
1961 ssiu26: ssiu-22 {
1963 dma-names = "rx", "tx";
1965 ssiu27: ssiu-23 {
1967 dma-names = "rx", "tx";
1969 ssiu30: ssiu-24 {
1971 dma-names = "rx", "tx";
1973 ssiu31: ssiu-25 {
1975 dma-names = "rx", "tx";
1977 ssiu32: ssiu-26 {
1979 dma-names = "rx", "tx";
1981 ssiu33: ssiu-27 {
1983 dma-names = "rx", "tx";
1985 ssiu34: ssiu-28 {
1987 dma-names = "rx", "tx";
1989 ssiu35: ssiu-29 {
1991 dma-names = "rx", "tx";
1993 ssiu36: ssiu-30 {
1995 dma-names = "rx", "tx";
1997 ssiu37: ssiu-31 {
1999 dma-names = "rx", "tx";
2001 ssiu40: ssiu-32 {
2003 dma-names = "rx", "tx";
2005 ssiu41: ssiu-33 {
2007 dma-names = "rx", "tx";
2009 ssiu42: ssiu-34 {
2011 dma-names = "rx", "tx";
2013 ssiu43: ssiu-35 {
2015 dma-names = "rx", "tx";
2017 ssiu44: ssiu-36 {
2019 dma-names = "rx", "tx";
2021 ssiu45: ssiu-37 {
2023 dma-names = "rx", "tx";
2025 ssiu46: ssiu-38 {
2027 dma-names = "rx", "tx";
2029 ssiu47: ssiu-39 {
2031 dma-names = "rx", "tx";
2033 ssiu50: ssiu-40 {
2035 dma-names = "rx", "tx";
2037 ssiu60: ssiu-41 {
2039 dma-names = "rx", "tx";
2041 ssiu70: ssiu-42 {
2043 dma-names = "rx", "tx";
2045 ssiu80: ssiu-43 {
2047 dma-names = "rx", "tx";
2049 ssiu90: ssiu-44 {
2051 dma-names = "rx", "tx";
2053 ssiu91: ssiu-45 {
2055 dma-names = "rx", "tx";
2057 ssiu92: ssiu-46 {
2059 dma-names = "rx", "tx";
2061 ssiu93: ssiu-47 {
2063 dma-names = "rx", "tx";
2065 ssiu94: ssiu-48 {
2067 dma-names = "rx", "tx";
2069 ssiu95: ssiu-49 {
2071 dma-names = "rx", "tx";
2073 ssiu96: ssiu-50 {
2075 dma-names = "rx", "tx";
2077 ssiu97: ssiu-51 {
2079 dma-names = "rx", "tx";
2084 audma0: dma-controller@ec700000 {
2085 compatible = "renesas,dmac-r8a774a1",
2086 "renesas,rcar-dmac";
2105 interrupt-names = "error",
2111 clock-names = "fck";
2112 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2114 #dma-cells = <1>;
2115 dma-channels = <16>;
2117 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2126 audma1: dma-controller@ec720000 {
2127 compatible = "renesas,dmac-r8a774a1",
2128 "renesas,rcar-dmac";
2147 interrupt-names = "error",
2153 clock-names = "fck";
2154 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2156 #dma-cells = <1>;
2157 dma-channels = <16>;
2169 compatible = "renesas,xhci-r8a774a1",
2170 "renesas,rcar-gen3-xhci";
2174 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2180 compatible = "renesas,r8a774a1-usb3-peri",
2181 "renesas,rcar-gen3-usb3-peri";
2185 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2191 compatible = "generic-ohci";
2196 phy-names = "usb";
2197 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2203 compatible = "generic-ohci";
2208 phy-names = "usb";
2209 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2215 compatible = "generic-ehci";
2219 phys = <&usb2_phy0 2>;
2220 phy-names = "usb";
2222 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2228 compatible = "generic-ehci";
2232 phys = <&usb2_phy1 2>;
2233 phy-names = "usb";
2235 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2240 usb2_phy0: usb-phy@ee080200 {
2241 compatible = "renesas,usb2-phy-r8a774a1",
2242 "renesas,rcar-gen3-usb2-phy";
2246 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2248 #phy-cells = <1>;
2252 usb2_phy1: usb-phy@ee0a0200 {
2253 compatible = "renesas,usb2-phy-r8a774a1",
2254 "renesas,rcar-gen3-usb2-phy";
2257 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2259 #phy-cells = <1>;
2264 compatible = "renesas,sdhi-r8a774a1",
2265 "renesas,rcar-gen3-sdhi";
2269 clock-names = "core", "clkh";
2270 max-frequency = <200000000>;
2271 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2277 compatible = "renesas,sdhi-r8a774a1",
2278 "renesas,rcar-gen3-sdhi";
2282 clock-names = "core", "clkh";
2283 max-frequency = <200000000>;
2284 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2290 compatible = "renesas,sdhi-r8a774a1",
2291 "renesas,rcar-gen3-sdhi";
2295 clock-names = "core", "clkh";
2296 max-frequency = <200000000>;
2297 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2303 compatible = "renesas,sdhi-r8a774a1",
2304 "renesas,rcar-gen3-sdhi";
2308 clock-names = "core", "clkh";
2309 max-frequency = <200000000>;
2310 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2316 compatible = "renesas,r8a774a1-rpc-if",
2317 "renesas,rcar-gen3-rpc-if";
2321 reg-names = "regs", "dirmap", "wbuf";
2324 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2326 #address-cells = <1>;
2327 #size-cells = <0>;
2331 gic: interrupt-controller@f1010000 {
2332 compatible = "arm,gic-400";
2333 #interrupt-cells = <3>;
2334 #address-cells = <0>;
2335 interrupt-controller;
2343 clock-names = "clk";
2344 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2349 compatible = "renesas,pcie-r8a774a1",
2350 "renesas,pcie-rcar-gen3";
2352 #address-cells = <3>;
2353 #size-cells = <2>;
2354 bus-range = <0x00 0xff>;
2361 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2365 #interrupt-cells = <1>;
2366 interrupt-map-mask = <0 0 0 0>;
2367 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2369 clock-names = "pcie", "pcie_bus";
2370 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2372 iommu-map = <0 &ipmmu_hc 0 1>;
2373 iommu-map-mask = <0>;
2378 compatible = "renesas,pcie-r8a774a1",
2379 "renesas,pcie-rcar-gen3";
2381 #address-cells = <3>;
2382 #size-cells = <2>;
2383 bus-range = <0x00 0xff>;
2390 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2394 #interrupt-cells = <1>;
2395 interrupt-map-mask = <0 0 0 0>;
2396 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2398 clock-names = "pcie", "pcie_bus";
2399 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2401 iommu-map = <0 &ipmmu_hc 1 1>;
2402 iommu-map-mask = <0>;
2406 pciec0_ep: pcie-ep@fe000000 {
2407 compatible = "renesas,r8a774a1-pcie-ep",
2408 "renesas,rcar-gen3-pcie-ep";
2414 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2419 clock-names = "pcie";
2421 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2425 pciec1_ep: pcie-ep@ee800000 {
2426 compatible = "renesas,r8a774a1-pcie-ep",
2427 "renesas,rcar-gen3-pcie-ep";
2433 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2438 clock-names = "pcie";
2440 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2449 power-domains = <&sysc R8A774A1_PD_A3VC>;
2458 power-domains = <&sysc R8A774A1_PD_A3VC>;
2466 power-domains = <&sysc R8A774A1_PD_A3VC>;
2474 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2483 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2492 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2501 power-domains = <&sysc R8A774A1_PD_A3VC>;
2511 power-domains = <&sysc R8A774A1_PD_A3VC>;
2522 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2533 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2544 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2555 power-domains = <&sysc R8A774A1_PD_A3VC>;
2562 compatible = "renesas,r8a774a1-csi2";
2566 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2571 #address-cells = <1>;
2572 #size-cells = <0>;
2579 #address-cells = <1>;
2580 #size-cells = <0>;
2586 remote-endpoint = <&vin0csi20>;
2590 remote-endpoint = <&vin1csi20>;
2592 csi20vin2: endpoint@2 {
2593 reg = <2>;
2594 remote-endpoint = <&vin2csi20>;
2598 remote-endpoint = <&vin3csi20>;
2602 remote-endpoint = <&vin4csi20>;
2606 remote-endpoint = <&vin5csi20>;
2610 remote-endpoint = <&vin6csi20>;
2614 remote-endpoint = <&vin7csi20>;
2621 compatible = "renesas,r8a774a1-csi2";
2625 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2630 #address-cells = <1>;
2631 #size-cells = <0>;
2638 #address-cells = <1>;
2639 #size-cells = <0>;
2645 remote-endpoint = <&vin0csi40>;
2649 remote-endpoint = <&vin1csi40>;
2651 csi40vin2: endpoint@2 {
2652 reg = <2>;
2653 remote-endpoint = <&vin2csi40>;
2657 remote-endpoint = <&vin3csi40>;
2661 remote-endpoint = <&vin4csi40>;
2665 remote-endpoint = <&vin5csi40>;
2669 remote-endpoint = <&vin6csi40>;
2673 remote-endpoint = <&vin7csi40>;
2681 compatible = "renesas,r8a774a1-hdmi",
2682 "renesas,rcar-gen3-hdmi";
2687 clock-names = "iahb", "isfr";
2688 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2693 #address-cells = <1>;
2694 #size-cells = <0>;
2698 remote-endpoint = <&du_out_hdmi0>;
2704 port@2 {
2706 reg = <2>;
2712 compatible = "renesas,du-r8a774a1";
2719 clock-names = "du.0", "du.1", "du.2";
2721 reset-names = "du.0", "du.2";
2727 #address-cells = <1>;
2728 #size-cells = <0>;
2736 remote-endpoint = <&dw_hdmi0_in>;
2739 port@2 {
2740 reg = <2>;
2742 remote-endpoint = <&lvds0_in>;
2749 compatible = "renesas,r8a774a1-lvds";
2752 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2757 #address-cells = <1>;
2758 #size-cells = <0>;
2763 remote-endpoint = <&du_out_lvds0>;
2778 thermal-zones {
2779 sensor1_thermal: sensor1-thermal {
2780 polling-delay-passive = <250>;
2781 polling-delay = <1000>;
2782 thermal-sensors = <&tsc 0>;
2783 sustainable-power = <3874>;
2786 sensor1_crit: sensor1-crit {
2794 sensor2_thermal: sensor2-thermal {
2795 polling-delay-passive = <250>;
2796 polling-delay = <1000>;
2797 thermal-sensors = <&tsc 1>;
2798 sustainable-power = <3874>;
2801 sensor2_crit: sensor2-crit {
2809 sensor3_thermal: sensor3-thermal {
2810 polling-delay-passive = <250>;
2811 polling-delay = <1000>;
2812 thermal-sensors = <&tsc 2>;
2813 sustainable-power = <3874>;
2815 cooling-maps {
2818 cooling-device = <&a57_0 0 2>;
2823 cooling-device = <&a53_0 0 2>;
2828 target: trip-point1 {
2834 sensor3_crit: sensor3-crit {
2844 compatible = "arm,armv8-timer";
2845 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2851 /* External USB clocks - can be overridden by the board */
2853 compatible = "fixed-clock";
2854 #clock-cells = <0>;
2855 clock-frequency = <0>;
2859 compatible = "fixed-clock";
2860 #clock-cells = <0>;
2861 clock-frequency = <0>;