Lines Matching +full:iso +full:- +full:8 +full:x8

1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/realtek,rtd1295.h>
15 	interrupt-parent = <&gic>;
16 	#address-cells = <1>;
17 	#size-cells = <1>;
19 	reserved-memory {
20 		#address-cells = <1>;
21 		#size-cells = <1>;
34 			no-map;
38 	arm_pmu: arm-pmu {
39 		compatible = "arm,cortex-a53-pmu";
44 		compatible = "fixed-clock";
45 		clock-frequency = <27000000>;
46 		#clock-cells = <0>;
47 		clock-output-names = "osc27M";
51 		compatible = "simple-bus";
52 		#address-cells = <1>;
53 		#size-cells = <1>;
58 			compatible = "simple-bus";
60 			#address-cells = <1>;
61 			#size-cells = <1>;
65 				compatible = "syscon", "simple-mfd";
67 				reg-io-width = <4>;
68 				#address-cells = <1>;
69 				#size-cells = <1>;
73 			iso: syscon@7000 {  label
74 				compatible = "syscon", "simple-mfd";
76 				reg-io-width = <4>;
77 				#address-cells = <1>;
78 				#size-cells = <1>;
83 				compatible = "syscon", "simple-mfd";
85 				reg-io-width = <4>;
86 				#address-cells = <1>;
87 				#size-cells = <1>;
92 				compatible = "syscon", "simple-mfd";
94 				reg-io-width = <4>;
95 				#address-cells = <1>;
96 				#size-cells = <1>;
101 				compatible = "syscon", "simple-mfd";
103 				reg-io-width = <4>;
104 				#address-cells = <1>;
105 				#size-cells = <1>;
110 		gic: interrupt-controller@ff011000 {
111 			compatible = "arm,gic-400";
117 			interrupt-controller;
118 			#interrupt-cells = <3>;
124 	reset1: reset-controller@0 {
125 		compatible = "snps,dw-low-reset";
127 		#reset-cells = <1>;
130 	reset2: reset-controller@4 {
131 		compatible = "snps,dw-low-reset";
133 		#reset-cells = <1>;
136 	reset3: reset-controller@8 {
137 		compatible = "snps,dw-low-reset";
138 		reg = <0x8 0x4>;
139 		#reset-cells = <1>;
142 	reset4: reset-controller@50 {
143 		compatible = "snps,dw-low-reset";
145 		#reset-cells = <1>;
149 &iso {
150 	iso_reset: reset-controller@88 {
151 		compatible = "snps,dw-low-reset";
153 		#reset-cells = <1>;
157 		compatible = "realtek,rtd1295-watchdog";
163 		compatible = "snps,dw-apb-uart";
165 		reg-shift = <2>;
166 		reg-io-width = <4>;
167 		clock-frequency = <27000000>;
175 		compatible = "snps,dw-apb-uart";
177 		reg-shift = <2>;
178 		reg-io-width = <4>;
179 		clock-frequency = <432000000>;
185 		compatible = "snps,dw-apb-uart";
187 		reg-shift = <2>;
188 		reg-io-width = <4>;
189 		clock-frequency = <432000000>;