Lines Matching +full:1 +full:a98000
143 qcom,freq-domain = <&cpufreq_hw 1>;
145 clocks = <&cpufreq_hw 1>;
162 qcom,freq-domain = <&cpufreq_hw 1>;
164 clocks = <&cpufreq_hw 1>;
181 qcom,freq-domain = <&cpufreq_hw 1>;
183 clocks = <&cpufreq_hw 1>;
260 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
280 CLUSTER_SLEEP_1: cluster-sleep-1 {
295 #reset-cells = <1>;
305 mc_virt: interconnect-1 {
545 qcom,client-id = <1>;
648 #qcom,smem-state-cells = <1>;
672 #qcom,smem-state-cells = <1>;
692 qcom,remote-pid = <1>;
696 #qcom,smem-state-cells = <1>;
707 #qcom,smem-state-cells = <1>;
731 #qcom,smem-state-cells = <1>;
751 #clock-cells = <1>;
752 #reset-cells = <1>;
753 #power-domain-cells = <1>;
760 <&ufs_mem_phy 1>,
816 #address-cells = <1>;
823 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
840 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
842 #address-cells = <1>;
855 #address-cells = <1>;
861 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
862 <&gpi_dma2 1 1 QCOM_GPI_I2C>;
878 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
879 <&gpi_dma2 1 1 QCOM_GPI_SPI>;
881 #address-cells = <1>;
894 #address-cells = <1>;
901 <&gpi_dma2 1 2 QCOM_GPI_I2C>;
918 <&gpi_dma2 1 2 QCOM_GPI_SPI>;
920 #address-cells = <1>;
933 #address-cells = <1>;
940 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
957 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
959 #address-cells = <1>;
972 #address-cells = <1>;
979 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
996 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
998 #address-cells = <1>;
1011 #address-cells = <1>;
1018 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
1046 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1048 #address-cells = <1>;
1061 #address-cells = <1>;
1068 <&gpi_dma2 1 6 QCOM_GPI_I2C>;
1085 <&gpi_dma2 1 6 QCOM_GPI_SPI>;
1087 #address-cells = <1>;
1137 #address-cells = <1>;
1144 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1164 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1166 #address-cells = <1>;
1179 #address-cells = <1>;
1185 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1186 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1203 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1204 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1206 #address-cells = <1>;
1219 #address-cells = <1>;
1226 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1244 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1246 #address-cells = <1>;
1260 #address-cells = <1>;
1267 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1285 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1287 #address-cells = <1>;
1300 #address-cells = <1>;
1307 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1327 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1329 #address-cells = <1>;
1342 #address-cells = <1>;
1349 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1367 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1369 #address-cells = <1>;
1383 #address-cells = <1>;
1390 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1408 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1410 #address-cells = <1>;
1471 #address-cells = <1>;
1478 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1496 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1498 #address-cells = <1>;
1511 #address-cells = <1>;
1517 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1518 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1535 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1536 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1538 #address-cells = <1>;
1551 #address-cells = <1>;
1558 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1576 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1578 #address-cells = <1>;
1591 #address-cells = <1>;
1598 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1616 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1618 #address-cells = <1>;
1631 #address-cells = <1>;
1638 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1656 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1658 #address-cells = <1>;
1676 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
1678 #address-cells = <1>;
1696 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
1698 #address-cells = <1>;
1703 i2c14: i2c@a98000 {
1716 <&gpi_dma1 1 6 QCOM_GPI_I2C>;
1718 #address-cells = <1>;
1723 spi14: spi@a98000 {
1736 <&gpi_dma1 1 6 QCOM_GPI_SPI>;
1738 #address-cells = <1>;
1749 pcie0: pcie@1c00000 {
1760 num-lanes = <1>;
1769 * MSIs for BDF (1:0.0) only works with Device ID 0x5980.
1777 #interrupt-cells = <1>;
1779 interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1829 pcie0_phy: phy@1c06000 {
1858 pcie1: pcie@1c08000 {
1867 linux,pci-domain = <1>;
1878 * MSIs for BDF (1:0.0) only works with Device ID 0x5a00.
1886 #interrupt-cells = <1>;
1888 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1936 pcie1_phy: phy@1c0e000 {
2013 tcsr_mutex: hwlock@1f40000 {
2016 #hwlock-cells = <1>;
2019 tcsr: syscon@1fc0000 {
2036 <&adreno_smmu 1 0x400>;
2171 #clock-cells = <1>;
2172 #reset-cells = <1>;
2173 #power-domain-cells = <1>;
2181 #global-interrupts = <1>;
2251 #clock-cells = <1>;
2252 #phy-cells = <1>;
2257 #address-cells = <1>;
2267 port@1 {
2268 reg = <1>;
2289 <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
2325 #address-cells = <1>;
2328 compute-cb@1 {
2330 reg = <1>;
2362 #sound-dai-cells = <1>;
2391 #sound-dai-cells = <1>;
2407 #sound-dai-cells = <1>;
2435 #sound-dai-cells = <1>;
2451 #sound-dai-cells = <1>;
2466 #sound-dai-cells = <1>;
2495 #sound-dai-cells = <1>;
2527 #sound-dai-cells = <1>;
2542 #sound-dai-cells = <1>;
2552 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
2589 #address-cells = <1>;
2592 q6apm: service@1 {
2606 #sound-dai-cells = <1>;
2627 #address-cells = <1>;
2657 <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
2693 #address-cells = <1>;
2696 compute-cb@1 {
2698 reg = <1>;
2763 <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>,
2793 qcom,remote-pid = <1>;
2804 #clock-cells = <1>;
2805 #reset-cells = <1>;
2806 #power-domain-cells = <1>;
2826 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
2830 #address-cells = <1>;
2836 #address-cells = <1>;
2840 cci0_i2c1: i2c-bus@1 {
2841 reg = <1>;
2843 #address-cells = <1>;
2865 pinctrl-1 = <&cci2_sleep &cci3_sleep>;
2869 #address-cells = <1>;
2875 #address-cells = <1>;
2879 cci1_i2c1: i2c-bus@1 {
2880 reg = <1>;
2882 #address-cells = <1>;
2896 #clock-cells = <1>;
2897 #reset-cells = <1>;
2898 #power-domain-cells = <1>;
2927 #interrupt-cells = <1>;
2966 #address-cells = <1>;
2976 port@1 {
2977 reg = <1>;
3057 #address-cells = <1>;
3115 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
3123 #address-cells = <1>;
3129 #address-cells = <1>;
3139 port@1 {
3140 reg = <1>;
3175 #clock-cells = <1>;
3207 assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
3215 #address-cells = <1>;
3221 #address-cells = <1>;
3231 port@1 {
3232 reg = <1>;
3248 #clock-cells = <1>;
3267 <&mdss_dsi0_phy 1>,
3269 <&mdss_dsi1_phy 1>,
3280 #clock-cells = <1>;
3281 #reset-cells = <1>;
3282 #power-domain-cells = <1>;
3290 <94 609 31>, <125 63 1>, <126 716 12>;
3304 #thermal-sensor-cells = <1>;
3315 #thermal-sensor-cells = <1>;
3346 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3891 slew-rate = <1>;
3899 slew-rate = <1>;
3909 slew-rate = <1>;
3917 slew-rate = <1>;
3957 slew-rate = <1>;
3965 slew-rate = <1>;
3975 slew-rate = <1>;
3983 slew-rate = <1>;
3994 #address-cells = <1>;
3995 #size-cells = <1>;
4007 #global-interrupts = <1>;
4111 #redistributor-regions = <1>;
4124 #msi-cells = <1>;
4130 #address-cells = <1>;
4131 #size-cells = <1>;
4145 frame-number = <1>;
4194 reg-names = "drv-0", "drv-1", "drv-2", "drv-3";
4210 #clock-cells = <1>;
4217 #power-domain-cells = <1>;
4293 interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
4294 #freq-domain-cells = <1>;
4295 #clock-cells = <1>;
4315 ufs_mem_hc: ufshc@1d84000 {
4323 #reset-cells = <1>;
4367 ufs_mem_phy: phy@1d87000 {
4379 #clock-cells = <1>;
4385 ice: crypto@1d88000 {
4392 cryptobam: dma-controller@1dc4000 {
4396 #dma-cells = <1>;
4406 crypto: crypto@1dfa000 {
4515 #address-cells = <1>;
4525 port@1 {
4526 reg = <1>;
4577 thermal-sensors = <&tsens0 1>;
4975 thermal-sensors = <&tsens1 1>;