Lines Matching +full:3 +full:d90000
1 // SPDX-License-Identifier: BSD-3-Clause
120 cache-level = <3>;
865 hwlocks = <&tcsr_mutex 3>;
926 qcom,remote-pid = <3>;
966 #interrupt-cells = <3>;
978 bits = <5 3>;
1005 #dma-cells = <3>;
1164 dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
1165 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
1185 dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
1186 <&gpi_dma2 1 3 QCOM_GPI_SPI>;
1345 #dma-cells = <3>;
1521 dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
1522 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1542 dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
1543 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1772 #dma-cells = <3>;
1931 dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
1932 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1952 dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
1953 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
2139 #address-cells = <3>;
2165 <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
2210 #address-cells = <3>;
2259 #address-cells = <3>;
2285 <0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
2335 #address-cells = <3>;
2384 #address-cells = <3>;
2410 <0 0 0 3 &intc 0 416 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
2460 #address-cells = <3>;
2919 gpu: gpu@3d00000 {
2991 gmu: gmu@3d6a000 {
3031 gpucc: clock-controller@3d90000 {
3045 adreno_smmu: iommu@3da0000 {
3078 <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>;
3106 qcom,remote-pid = <3>;
3128 compute-cb@3 {
3130 reg = <3>;
3484 port@3 {
3485 reg = <3>;
3713 port@3 {
3714 reg = <3>;
3782 <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;
3830 compute-cb@3 {
3832 reg = <3>;
4020 interconnects = <&mc_virt MASTER_LLCC 3 &mc_virt SLAVE_EBI_CH0 3>;
4082 interconnects = <&gem_noc MASTER_AMPSS_M0 3 &gem_noc SLAVE_LLCC 3>;
4627 port@3 {
4628 reg = <3>;
5966 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
6003 service@3 {
6058 compute-cb@3 {
6060 reg = <3>;
6081 #interrupt-cells = <3>;
6126 frame-number = <3>;
6161 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
6166 qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
6167 <WAKE_TCS 3>, <CONTROL_TCS 1>;
6366 thermal-sensors = <&tsens0 3>;
6923 thermal-sensors = <&tsens1 3>;