Lines Matching +full:1 +full:f200000
176 clocks = <&cpufreq_hw 1>;
179 qcom,freq-domain = <&cpufreq_hw 1>;
197 clocks = <&cpufreq_hw 1>;
200 qcom,freq-domain = <&cpufreq_hw 1>;
263 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
273 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
283 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
310 #reset-cells = <1>;
624 qcom,client-id = <1>;
663 #clock-cells = <1>;
668 #power-domain-cells = <1>;
729 #qcom,smem-state-cells = <1>;
753 #qcom,smem-state-cells = <1>;
773 qcom,remote-pid = <1>;
777 #qcom,smem-state-cells = <1>;
788 #qcom,smem-state-cells = <1>;
823 #hwlock-cells = <1>;
957 #power-domain-cells = <1>;
958 #clock-cells = <1>;
959 #reset-cells = <1>;
974 spmi_bus: spmi@1c40000 {
999 #thermal-sensor-cells = <1>;
1010 #thermal-sensor-cells = <1>;
1017 #address-cells = <1>;
1018 #size-cells = <1>;
1021 apss_mpm: sram@1b8 {
1047 pinctrl-1 = <&sdc2_off_state>;
1114 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1116 #address-cells = <1>;
1132 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1134 #address-cells = <1>;
1147 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1148 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1150 #address-cells = <1>;
1163 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1164 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1166 #address-cells = <1>;
1193 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1195 #address-cells = <1>;
1209 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1211 #address-cells = <1>;
1264 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1266 #address-cells = <1>;
1280 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1282 #address-cells = <1>;
1293 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1294 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1296 #address-cells = <1>;
1309 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1310 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1312 #address-cells = <1>;
1326 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1328 #address-cells = <1>;
1342 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1344 #address-cells = <1>;
1356 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1358 #address-cells = <1>;
1372 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1374 #address-cells = <1>;
1388 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1390 #address-cells = <1>;
1404 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1406 #address-cells = <1>;
1484 #iommu-cells = <1>;
1512 #clock-cells = <1>;
1513 #reset-cells = <1>;
1514 #power-domain-cells = <1>;
1523 <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>,
1554 qcom,remote-pid = <1>;
1564 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
1602 <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
1637 #address-cells = <1>;
1638 #size-cells = <1>;
1718 #global-interrupts = <1>;
1744 intc: interrupt-controller@f200000 {
1749 #redistributor-regions = <1>;
1759 #address-cells = <1>;
1760 #size-cells = <1>;
1772 frame-number = <1>;
1818 #interconnect-cells = <1>;
1830 interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1";
1831 #freq-domain-cells = <1>;
1832 #clock-cells = <1>;
1868 thermal-sensors = <&tsens0 1>;
2273 thermal-sensors = <&tsens1 1>;
2542 interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,