Lines Matching +full:1 +full:f200000
61 CPU1: cpu@1 {
107 clocks = <&cpufreq_hw 1>;
112 qcom,freq-domain = <&cpufreq_hw 1>;
126 clocks = <&cpufreq_hw 1>;
131 qcom,freq-domain = <&cpufreq_hw 1>;
140 clocks = <&cpufreq_hw 1>;
145 qcom,freq-domain = <&cpufreq_hw 1>;
154 clocks = <&cpufreq_hw 1>;
159 qcom,freq-domain = <&cpufreq_hw 1>;
215 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
236 CLUSTER_0_SLEEP_1: cluster-sleep-0-1 {
245 CLUSTER_1_SLEEP_0: cluster-sleep-1-0 {
254 CLUSTER_1_SLEEP_1: cluster-sleep-1-1 {
268 #reset-cells = <1>;
385 #clock-cells = <1>;
390 #power-domain-cells = <1>;
527 qcom,client-id = <1>;
545 #qcom,smem-state-cells = <1>;
569 #qcom,smem-state-cells = <1>;
589 qcom,remote-pid = <1>;
593 #qcom,smem-state-cells = <1>;
614 #hwlock-cells = <1>;
810 #clock-cells = <1>;
811 #reset-cells = <1>;
812 #power-domain-cells = <1>;
829 cryptobam: dma-controller@1b04000 {
835 #dma-cells = <1>;
845 crypto: crypto@1b3a000 {
922 qfprom@1b40000 {
925 #address-cells = <1>;
926 #size-cells = <1>;
930 bits = <1 4>;
939 rng: rng@1b53000 {
946 pmu@1b8e300 {
962 opp-1 {
1000 spmi_bus: spmi@1c40000 {
1026 #thermal-sensor-cells = <1>;
1156 lanes-per-direction = <1>;
1157 #reset-cells = <1>;
1249 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1260 #address-cells = <1>;
1274 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1285 #address-cells = <1>;
1298 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1299 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1310 #address-cells = <1>;
1323 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1324 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1335 #address-cells = <1>;
1349 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1360 #address-cells = <1>;
1374 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1385 #address-cells = <1>;
1399 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1410 #address-cells = <1>;
1424 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1435 #address-cells = <1>;
1466 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1477 #address-cells = <1>;
1491 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1502 #address-cells = <1>;
1531 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1542 #address-cells = <1>;
1556 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1567 #address-cells = <1>;
1645 iommus = <&adreno_smmu 0 1>;
1728 #clock-cells = <1>;
1729 #reset-cells = <1>;
1730 #power-domain-cells = <1>;
1755 #global-interrupts = <1>;
1772 #interrupt-cells = <1>;
1816 #address-cells = <1>;
1880 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
1886 #address-cells = <1>;
1892 #address-cells = <1>;
1902 port@1 {
1903 reg = <1>;
1938 #clock-cells = <1>;
1955 <&mdss_dsi0_phy 1>,
1957 #clock-cells = <1>;
1958 #reset-cells = <1>;
1959 #power-domain-cells = <1>;
1968 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1990 qcom,remote-pid = <1>;
2315 #address-cells = <1>;
2325 port@1 {
2326 reg = <1>;
2520 #address-cells = <1>;
2530 port@1 {
2531 reg = <1>;
2613 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2643 #address-cells = <1>;
2685 <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2714 #address-cells = <1>;
2717 compute-cb@1 {
2719 reg = <1>;
2762 #global-interrupts = <1>;
2865 #mbox-cells = <1>;
2872 #size-cells = <1>;
2885 frame-number = <1>;
2926 intc: interrupt-controller@f200000 {
2933 #redistributor-regions = <1>;
2947 #freq-domain-cells = <1>;
2948 #clock-cells = <1>;
2976 thermal-sensors = <&tsens0 1>;
3318 interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,