Lines Matching +full:1 +full:d10000
199 clocks = <&cpufreq_hw 1>;
203 qcom,freq-domain = <&cpufreq_hw 1>;
223 clocks = <&cpufreq_hw 1>;
227 qcom,freq-domain = <&cpufreq_hw 1>;
247 clocks = <&cpufreq_hw 1>;
251 qcom,freq-domain = <&cpufreq_hw 1>;
271 clocks = <&cpufreq_hw 1>;
275 qcom,freq-domain = <&cpufreq_hw 1>;
340 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
817 qcom,client-id = <1>;
906 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
934 #address-cells = <1>;
950 #address-cells = <1>;
952 #sound-dai-cells = <1>;
962 #address-cells = <1>;
964 #sound-dai-cells = <1>;
985 #address-cells = <1>;
1008 <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1036 #address-cells = <1>;
1039 compute-cb@1 {
1041 reg = <1>;
1103 #qcom,smem-state-cells = <1>;
1127 #qcom,smem-state-cells = <1>;
1144 qcom,remote-pid = <1>;
1148 #qcom,smem-state-cells = <1>;
1159 #qcom,smem-state-cells = <1>;
1179 #qcom,smem-state-cells = <1>;
1209 #clock-cells = <1>;
1210 #reset-cells = <1>;
1211 #power-domain-cells = <1>;
1218 #address-cells = <1>;
1219 #size-cells = <1>;
1221 qusb2p_hstx_trim: hstx-trim-primary@1eb {
1223 bits = <1 4>;
1226 qusb2s_hstx_trim: hstx-trim-secondary@1eb {
1284 #address-cells = <1>;
1293 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1306 #address-cells = <1>;
1312 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1341 #address-cells = <1>;
1349 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1350 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1363 #address-cells = <1>;
1368 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1369 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1398 #address-cells = <1>;
1407 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1420 #address-cells = <1>;
1426 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1455 #address-cells = <1>;
1464 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1477 #address-cells = <1>;
1483 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1512 #address-cells = <1>;
1521 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1534 #address-cells = <1>;
1540 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1569 #address-cells = <1>;
1578 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1591 #address-cells = <1>;
1597 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1626 #address-cells = <1>;
1635 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1648 #address-cells = <1>;
1654 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1683 #address-cells = <1>;
1698 #address-cells = <1>;
1704 <&gpi_dma0 1 7 QCOM_GPI_SPI>;
1771 #address-cells = <1>;
1780 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1793 #address-cells = <1>;
1799 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1828 #address-cells = <1>;
1836 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1837 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1850 #address-cells = <1>;
1855 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1856 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1885 #address-cells = <1>;
1894 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1907 #address-cells = <1>;
1913 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1942 #address-cells = <1>;
1951 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1964 #address-cells = <1>;
1970 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1999 #address-cells = <1>;
2008 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
2021 #address-cells = <1>;
2027 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
2056 #address-cells = <1>;
2065 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
2078 #address-cells = <1>;
2084 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
2113 #address-cells = <1>;
2122 <&gpi_dma1 1 6 QCOM_GPI_I2C>;
2135 #address-cells = <1>;
2141 <&gpi_dma1 1 6 QCOM_GPI_SPI>;
2170 #address-cells = <1>;
2180 <&gpi_dma1 1 7 QCOM_GPI_I2C>;
2192 #address-cells = <1>;
2198 <&gpi_dma1 1 7 QCOM_GPI_SPI>;
2258 opp-1 {
2295 opp-1 {
2310 pcie0: pcie@1c00000 {
2321 num-lanes = <1>;
2331 #interrupt-cells = <1>;
2333 interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2391 pcie0_phy: phy@1c06000 {
2419 pcie1: pcie@1c08000 {
2428 linux,pci-domain = <1>;
2430 num-lanes = <1>;
2440 #interrupt-cells = <1>;
2442 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2505 pcie1_phy: phy@1c0a000 {
2582 ufs_mem_hc: ufshc@1d84000 {
2593 #reset-cells = <1>;
2659 ufs_mem_phy: phy@1d87000 {
2679 cryptobam: dma-controller@1dc4000 {
2685 #dma-cells = <1>;
2694 crypto: crypto@1dfa000 {
2709 ipa: ipa@1e40000 {
2724 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
2741 <&ipa_smp2p_out 1>;
2748 tcsr_mutex: hwlock@1f40000 {
2751 #hwlock-cells = <1>;
2754 tcsr_regs_1: syscon@1f60000 {
3306 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3358 qcom,remote-pid = <1>;
3366 #clock-cells = <1>;
3367 #reset-cells = <1>;
3368 #power-domain-cells = <1>;
3383 <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3419 #address-cells = <1>;
3466 #address-cells = <1>;
3495 #address-cells = <1>;
3524 #address-cells = <1>;
3791 #address-cells = <1>;
3802 port@1 {
3803 reg = <1>;
3933 #address-cells = <1>;
3953 #address-cells = <1>;
3967 #interrupt-cells = <1>;
3979 #interrupt-cells = <1>;
4032 #clock-cells = <1>;
4033 #phy-cells = <1>;
4037 #address-cells = <1>;
4047 port@1 {
4048 reg = <1>;
4146 #address-cells = <1>;
4156 port@1 {
4157 reg = <1>;
4300 #clock-cells = <1>;
4301 #power-domain-cells = <1>;
4302 #reset-cells = <1>;
4435 #address-cells = <1>;
4442 port@1 {
4443 reg = <1>;
4458 #address-cells = <1>;
4484 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
4491 #address-cells = <1>;
4495 cci_i2c1: i2c-bus@1 {
4496 reg = <1>;
4498 #address-cells = <1>;
4506 #clock-cells = <1>;
4507 #reset-cells = <1>;
4508 #power-domain-cells = <1>;
4526 #interrupt-cells = <1>;
4563 #address-cells = <1>;
4573 port@1 {
4574 reg = <1>;
4644 #address-cells = <1>;
4653 port@1 {
4654 reg = <1>;
4708 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
4717 #address-cells = <1>;
4721 #address-cells = <1>;
4731 port@1 {
4732 reg = <1>;
4748 #clock-cells = <1>;
4780 assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
4789 #address-cells = <1>;
4793 #address-cells = <1>;
4803 port@1 {
4804 reg = <1>;
4820 #clock-cells = <1>;
4906 #iommu-cells = <1>;
4975 <&mdss_dsi0_phy 1>,
4977 <&mdss_dsi1_phy 1>,
4989 #clock-cells = <1>;
4990 #reset-cells = <1>;
4991 #power-domain-cells = <1>;
5006 #reset-cells = <1>;
5017 #thermal-sensor-cells = <1>;
5028 #thermal-sensor-cells = <1>;
5034 #reset-cells = <1>;
5081 #address-cells = <1>;
5082 #size-cells = <1>;
5096 #global-interrupts = <1>;
5240 #clock-cells = <1>;
5261 #mbox-cells = <1>;
5270 reg-names = "drv-0", "drv-1", "drv-2";
5279 <CONTROL_TCS 1>;
5288 #clock-cells = <1>;
5295 #power-domain-cells = <1>;
5358 #msi-cells = <1>;
5370 #dma-cells = <1>;
5371 qcom,ee = <1>;
5377 #address-cells = <1>;
5378 #size-cells = <1>;
5392 frame-number = <1>;
5426 frame@17d10000 {
5441 #interconnect-cells = <1>;
5454 #freq-domain-cells = <1>;
5455 #clock-cells = <1>;
5490 thermal-sensors = <&tsens0 1>;
5830 thermal-sensors = <&tsens1 1>;
5928 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,