Lines Matching +full:1 +full:a98000
198 clocks = <&cpufreq_hw 1>;
202 qcom,freq-domain = <&cpufreq_hw 1>;
222 clocks = <&cpufreq_hw 1>;
226 qcom,freq-domain = <&cpufreq_hw 1>;
246 clocks = <&cpufreq_hw 1>;
250 qcom,freq-domain = <&cpufreq_hw 1>;
270 clocks = <&cpufreq_hw 1>;
274 qcom,freq-domain = <&cpufreq_hw 1>;
339 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
816 qcom,client-id = <1>;
905 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
933 #address-cells = <1>;
949 #address-cells = <1>;
951 #sound-dai-cells = <1>;
961 #address-cells = <1>;
963 #sound-dai-cells = <1>;
984 #address-cells = <1>;
1007 <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1035 #address-cells = <1>;
1038 compute-cb@1 {
1040 reg = <1>;
1102 #qcom,smem-state-cells = <1>;
1126 #qcom,smem-state-cells = <1>;
1143 qcom,remote-pid = <1>;
1147 #qcom,smem-state-cells = <1>;
1158 #qcom,smem-state-cells = <1>;
1178 #qcom,smem-state-cells = <1>;
1208 #clock-cells = <1>;
1209 #reset-cells = <1>;
1210 #power-domain-cells = <1>;
1217 #address-cells = <1>;
1218 #size-cells = <1>;
1220 qusb2p_hstx_trim: hstx-trim-primary@1eb {
1222 bits = <1 4>;
1225 qusb2s_hstx_trim: hstx-trim-secondary@1eb {
1283 #address-cells = <1>;
1292 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1305 #address-cells = <1>;
1311 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1340 #address-cells = <1>;
1348 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1349 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1362 #address-cells = <1>;
1367 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1368 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1397 #address-cells = <1>;
1406 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1419 #address-cells = <1>;
1425 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1454 #address-cells = <1>;
1463 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1476 #address-cells = <1>;
1482 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1511 #address-cells = <1>;
1520 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1533 #address-cells = <1>;
1539 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1568 #address-cells = <1>;
1577 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1590 #address-cells = <1>;
1596 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1625 #address-cells = <1>;
1634 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1647 #address-cells = <1>;
1653 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1682 #address-cells = <1>;
1697 #address-cells = <1>;
1703 <&gpi_dma0 1 7 QCOM_GPI_SPI>;
1770 #address-cells = <1>;
1779 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1792 #address-cells = <1>;
1798 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1827 #address-cells = <1>;
1835 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1836 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1849 #address-cells = <1>;
1854 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1855 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1884 #address-cells = <1>;
1893 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1906 #address-cells = <1>;
1912 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1941 #address-cells = <1>;
1950 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1963 #address-cells = <1>;
1969 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1998 #address-cells = <1>;
2007 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
2020 #address-cells = <1>;
2026 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
2055 #address-cells = <1>;
2064 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
2077 #address-cells = <1>;
2083 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
2104 i2c14: i2c@a98000 {
2112 #address-cells = <1>;
2121 <&gpi_dma1 1 6 QCOM_GPI_I2C>;
2126 spi14: spi@a98000 {
2134 #address-cells = <1>;
2140 <&gpi_dma1 1 6 QCOM_GPI_SPI>;
2145 uart14: serial@a98000 {
2169 #address-cells = <1>;
2179 <&gpi_dma1 1 7 QCOM_GPI_I2C>;
2191 #address-cells = <1>;
2197 <&gpi_dma1 1 7 QCOM_GPI_SPI>;
2257 opp-1 {
2294 opp-1 {
2309 pcie0: pcie@1c00000 {
2320 num-lanes = <1>;
2330 #interrupt-cells = <1>;
2332 interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2380 pcie0_phy: phy@1c06000 {
2408 pcie1: pcie@1c08000 {
2417 linux,pci-domain = <1>;
2419 num-lanes = <1>;
2429 #interrupt-cells = <1>;
2431 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2484 pcie1_phy: phy@1c0a000 {
2561 ufs_mem_hc: ufshc@1d84000 {
2572 #reset-cells = <1>;
2638 ufs_mem_phy: phy@1d87000 {
2654 cryptobam: dma-controller@1dc4000 {
2660 #dma-cells = <1>;
2669 crypto: crypto@1dfa000 {
2684 ipa: ipa@1e40000 {
2699 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
2716 <&ipa_smp2p_out 1>;
2723 tcsr_mutex: hwlock@1f40000 {
2726 #hwlock-cells = <1>;
2729 tcsr_regs_1: syscon@1f60000 {
3281 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3333 qcom,remote-pid = <1>;
3341 #clock-cells = <1>;
3342 #reset-cells = <1>;
3343 #power-domain-cells = <1>;
3358 <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3394 #address-cells = <1>;
3441 #address-cells = <1>;
3470 #address-cells = <1>;
3499 #address-cells = <1>;
3766 #address-cells = <1>;
3777 port@1 {
3778 reg = <1>;
3908 #address-cells = <1>;
3928 #address-cells = <1>;
3942 #interrupt-cells = <1>;
3954 #interrupt-cells = <1>;
4007 #clock-cells = <1>;
4008 #phy-cells = <1>;
4216 #clock-cells = <1>;
4217 #power-domain-cells = <1>;
4218 #reset-cells = <1>;
4351 #address-cells = <1>;
4358 port@1 {
4359 reg = <1>;
4374 #address-cells = <1>;
4400 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
4407 #address-cells = <1>;
4411 cci_i2c1: i2c-bus@1 {
4412 reg = <1>;
4414 #address-cells = <1>;
4422 #clock-cells = <1>;
4423 #reset-cells = <1>;
4424 #power-domain-cells = <1>;
4442 #interrupt-cells = <1>;
4479 #address-cells = <1>;
4489 port@1 {
4490 reg = <1>;
4560 #address-cells = <1>;
4569 port@1 {
4570 reg = <1>;
4622 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
4631 #address-cells = <1>;
4635 #address-cells = <1>;
4645 port@1 {
4646 reg = <1>;
4662 #clock-cells = <1>;
4694 assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
4703 #address-cells = <1>;
4707 #address-cells = <1>;
4717 port@1 {
4718 reg = <1>;
4734 #clock-cells = <1>;
4819 #iommu-cells = <1>;
4888 <&mdss_dsi0_phy 1>,
4890 <&mdss_dsi1_phy 1>,
4902 #clock-cells = <1>;
4903 #reset-cells = <1>;
4904 #power-domain-cells = <1>;
4919 #reset-cells = <1>;
4930 #thermal-sensor-cells = <1>;
4941 #thermal-sensor-cells = <1>;
4947 #reset-cells = <1>;
4994 #address-cells = <1>;
4995 #size-cells = <1>;
5009 #global-interrupts = <1>;
5081 #clock-cells = <1>;
5102 #mbox-cells = <1>;
5111 reg-names = "drv-0", "drv-1", "drv-2";
5120 <CONTROL_TCS 1>;
5129 #clock-cells = <1>;
5136 #power-domain-cells = <1>;
5199 #msi-cells = <1>;
5211 #dma-cells = <1>;
5212 qcom,ee = <1>;
5218 #address-cells = <1>;
5219 #size-cells = <1>;
5233 frame-number = <1>;
5282 #interconnect-cells = <1>;
5295 #freq-domain-cells = <1>;
5296 #clock-cells = <1>;
5332 thermal-sensors = <&tsens0 1>;
5648 thermal-sensors = <&tsens1 1>;
5752 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,