Lines Matching +full:pll +full:- +full:mode
1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
39 regulator-name = "vreg_l3a";
40 regulator-min-microvolt = <1200000>;
41 regulator-max-microvolt = <1208000>;
42 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
46 regulator-name = "vreg_l5a";
47 regulator-min-microvolt = <912000>;
48 regulator-max-microvolt = <912000>;
49 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
53 regulator-name = "vreg_l7a";
54 regulator-min-microvolt = <1800000>;
55 regulator-max-microvolt = <1800000>;
56 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
60 regulator-name = "vreg_l11a";
61 regulator-min-microvolt = <880000>;
62 regulator-max-microvolt = <880000>;
63 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
67 regulator-name = "vreg_l13a";
68 regulator-min-microvolt = <3072000>;
69 regulator-max-microvolt = <3072000>;
70 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
74 regulators-1 {
75 compatible = "qcom,pm8150-rpmh-regulators";
76 qcom,pmic-id = "c";
79 regulator-name = "vreg_l1c";
80 regulator-min-microvolt = <912000>;
81 regulator-max-microvolt = <912000>;
82 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
86 regulator-name = "vreg_l2c";
87 regulator-min-microvolt = <3072000>;
88 regulator-max-microvolt = <3072000>;
89 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
93 regulator-name = "vreg_l4c";
94 regulator-min-microvolt = <1200000>;
95 regulator-max-microvolt = <1208000>;
96 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
100 regulator-name = "vreg_l6c";
101 regulator-min-microvolt = <1200000>;
102 regulator-max-microvolt = <1200000>;
103 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
104 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
106 regulator-allow-set-load;
110 regulator-name = "vreg_l7c";
111 regulator-min-microvolt = <1800000>;
112 regulator-max-microvolt = <1800000>;
113 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
117 regulator-name = "vreg_l17c";
118 regulator-min-microvolt = <2504000>;
119 regulator-max-microvolt = <2504000>;
120 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
121 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
123 regulator-allow-set-load;
127 regulators-2 {
128 compatible = "qcom,pm8150-rpmh-regulators";
129 qcom,pmic-id = "g";
132 regulator-name = "vreg_l3g";
133 regulator-min-microvolt = <1200000>;
134 regulator-max-microvolt = <1200000>;
135 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
139 regulator-name = "vreg_l7g";
140 regulator-min-microvolt = <1800000>;
141 regulator-max-microvolt = <1800000>;
142 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
146 regulator-name = "vreg_l8g";
147 regulator-min-microvolt = <880000>;
148 regulator-max-microvolt = <880000>;
149 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
155 snps,mtl-rx-config = <ðernet0_mtl_rx_setup>;
156 snps,mtl-tx-config = <ðernet0_mtl_tx_setup>;
158 max-speed = <1000>;
159 phy-handle = <&rgmii_phy>;
160 phy-mode = "rgmii-txid";
162 pinctrl-names = "default";
163 pinctrl-0 = <ðernet0_default>;
168 compatible = "snps,dwmac-mdio";
169 #address-cells = <1>;
170 #size-cells = <0>;
174 compatible = "ethernet-phy-id0141.0dd4";
177 interrupts-extended = <&tlmm 127 IRQ_TYPE_EDGE_FALLING>;
179 reset-gpios = <&pmm8540c_gpios 1 GPIO_ACTIVE_LOW>;
180 reset-assert-us = <11000>;
181 reset-deassert-us = <70000>;
183 device_type = "ethernet-phy";
185 /* Set to RGMII_SGMII mode and soft reset. Turn off auto-negotiation
188 marvell,reg-init =
189 /* Set MODE[2:0] to RGMII_SGMII */
191 /* Soft reset required after changing MODE[2:0] */
196 ethernet0_mtl_rx_setup: rx-queues-config {
197 snps,rx-queues-to-use = <1>;
198 snps,rx-sched-sp;
201 snps,dcb-algorithm;
202 snps,map-to-dma-channel = <0x0>;
203 snps,route-up;
208 snps,dcb-algorithm;
209 snps,map-to-dma-channel = <0x1>;
210 snps,route-ptp;
214 snps,avb-algorithm;
215 snps,map-to-dma-channel = <0x2>;
216 snps,route-avcp;
220 snps,avb-algorithm;
221 snps,map-to-dma-channel = <0x3>;
226 ethernet0_mtl_tx_setup: tx-queues-config {
227 snps,tx-queues-to-use = <1>;
228 snps,tx-sched-sp;
231 snps,dcb-algorithm;
235 snps,dcb-algorithm;
239 snps,avb-algorithm;
247 snps,avb-algorithm;
257 snps,mtl-rx-config = <ðernet1_mtl_rx_setup>;
258 snps,mtl-tx-config = <ðernet1_mtl_tx_setup>;
260 max-speed = <1000>;
261 phy-mode = "rgmii-txid";
263 pinctrl-names = "default";
264 pinctrl-0 = <ðernet1_default>;
268 fixed-link {
270 full-duplex;
273 ethernet1_mtl_rx_setup: rx-queues-config {
274 snps,rx-queues-to-use = <1>;
275 snps,rx-sched-sp;
278 snps,dcb-algorithm;
279 snps,map-to-dma-channel = <0x0>;
280 snps,route-up;
285 snps,dcb-algorithm;
286 snps,map-to-dma-channel = <0x1>;
287 snps,route-ptp;
291 snps,avb-algorithm;
292 snps,map-to-dma-channel = <0x2>;
293 snps,route-avcp;
297 snps,avb-algorithm;
298 snps,map-to-dma-channel = <0x3>;
303 ethernet1_mtl_tx_setup: tx-queues-config {
304 snps,tx-queues-to-use = <1>;
305 snps,tx-sched-sp;
308 snps,dcb-algorithm;
312 snps,dcb-algorithm;
316 snps,avb-algorithm;
324 snps,avb-algorithm;
334 pinctrl-names = "default";
335 pinctrl-0 = <&i2c0_default>;
341 pinctrl-names = "default";
342 pinctrl-0 = <&i2c1_default>;
348 pinctrl-names = "default";
349 pinctrl-0 = <&i2c12_default>;
355 pinctrl-names = "default";
356 pinctrl-0 = <&i2c15_default>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&i2c18_default>;
373 perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
374 wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>;
376 pinctrl-names = "default";
377 pinctrl-0 = <&pcie2a_default>;
383 vdda-phy-supply = <&vreg_l11a>;
384 vdda-pll-supply = <&vreg_l3a>;
394 perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
395 wake-gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
397 pinctrl-names = "default";
398 pinctrl-0 = <&pcie3a_default>;
404 vdda-phy-supply = <&vreg_l11a>;
405 vdda-pll-supply = <&vreg_l3a>;
411 nvmem-cells = <&rtc_offset>;
412 nvmem-cell-names = "offset";
420 rtc_offset: rtc-offset@a0 {
438 firmware-name = "qcom/sa8540p/cdsp0.mbn";
443 firmware-name = "qcom/sa8540p/cdsp1.mbn";
448 compatible = "qcom,geni-debug-uart";
453 reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
455 vcc-supply = <&vreg_l17c>;
456 vccq-supply = <&vreg_l6c>;
462 vdda-phy-supply = <&vreg_l8g>;
463 vdda-pll-supply = <&vreg_l3g>;
477 vdda-pll-supply = <&vreg_l5a>;
478 vdda18-supply = <&vreg_l7a>;
479 vdda33-supply = <&vreg_l13a>;
485 vdda-phy-supply = <&vreg_l3a>;
486 vdda-pll-supply = <&vreg_l5a>;
492 vdda-pll-supply = <&vreg_l5a>;
493 vdda18-supply = <&vreg_l7g>;
494 vdda33-supply = <&vreg_l13a>;
500 vdda-phy-supply = <&vreg_l3a>;
501 vdda-pll-supply = <&vreg_l5a>;
507 clock-frequency = <38400000>;
513 ethernet0_default: ethernet0-default-state {
514 mdc-pins {
517 drive-strength = <16>;
518 bias-pull-up;
521 mdio-pins {
524 drive-strength = <16>;
525 bias-pull-up;
528 rgmii-tx-pins {
531 drive-strength = <16>;
532 bias-pull-up;
535 rgmii-rx-pins {
538 drive-strength = <16>;
539 bias-disable;
543 ethernet1_default: ethernet1-default-state {
544 mdc-pins {
547 drive-strength = <16>;
548 bias-pull-up;
551 mdio-pins {
554 drive-strength = <16>;
555 bias-pull-up;
558 rgmii-tx-pins {
561 drive-strength = <16>;
562 bias-pull-up;
565 rgmii-rx-pins {
568 drive-strength = <16>;
569 bias-disable;
573 i2c0_default: i2c0-default-state {
574 /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */
577 drive-strength = <2>;
578 bias-pull-up;
581 i2c1_default: i2c1-default-state {
582 /* To PM40028B-F3EI PCIe switch */
585 drive-strength = <2>;
586 bias-pull-up;
589 i2c12_default: i2c12-default-state {
593 drive-strength = <2>;
594 bias-pull-up;
597 i2c15_default: i2c15-default-state {
601 drive-strength = <2>;
602 bias-pull-up;
605 i2c18_default: i2c18-default-state {
609 drive-strength = <2>;
610 bias-pull-up;
613 pcie2a_default: pcie2a-default-state {
614 perst-pins {
617 drive-strength = <2>;
618 bias-pull-down;
621 clkreq-pins {
624 drive-strength = <2>;
625 bias-pull-up;
628 wake-pins {
631 drive-strength = <2>;
632 bias-pull-up;
636 pcie3a_default: pcie3a-default-state {
637 perst-pins {
640 drive-strength = <2>;
641 bias-pull-down;
644 clkreq-pins {
647 drive-strength = <2>;
648 bias-pull-up;
651 wake-pins {
654 drive-strength = <2>;
655 bias-pull-up;