Lines Matching +full:kpss +full:- +full:timer
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interconnect/qcom,qcm2290.h>
16 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
17 #include <dt-bindings/power/qcom-rpmpd.h>
20 interrupt-parent = <&intc>;
22 #address-cells = <2>;
23 #size-cells = <2>;
28 xo_board: xo-board {
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
33 sleep_clk: sleep-clk {
34 compatible = "fixed-clock";
35 clock-frequency = <32764>;
36 #clock-cells = <0>;
41 #address-cells = <2>;
42 #size-cells = <0>;
46 compatible = "arm,cortex-a53";
49 capacity-dmips-mhz = <1024>;
50 dynamic-power-coefficient = <100>;
51 enable-method = "psci";
52 next-level-cache = <&L2_0>;
53 qcom,freq-domain = <&cpufreq_hw 0>;
54 power-domains = <&CPU_PD0>;
55 power-domain-names = "psci";
56 L2_0: l2-cache {
58 cache-level = <2>;
59 cache-unified;
65 compatible = "arm,cortex-a53";
68 capacity-dmips-mhz = <1024>;
69 dynamic-power-coefficient = <100>;
70 enable-method = "psci";
71 next-level-cache = <&L2_0>;
72 qcom,freq-domain = <&cpufreq_hw 0>;
73 power-domains = <&CPU_PD1>;
74 power-domain-names = "psci";
79 compatible = "arm,cortex-a53";
82 capacity-dmips-mhz = <1024>;
83 dynamic-power-coefficient = <100>;
84 enable-method = "psci";
85 next-level-cache = <&L2_0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
87 power-domains = <&CPU_PD2>;
88 power-domain-names = "psci";
93 compatible = "arm,cortex-a53";
96 capacity-dmips-mhz = <1024>;
97 dynamic-power-coefficient = <100>;
98 enable-method = "psci";
99 next-level-cache = <&L2_0>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
101 power-domains = <&CPU_PD3>;
102 power-domain-names = "psci";
105 cpu-map {
125 domain-idle-states {
126 CLUSTER_SLEEP: cluster-sleep-0 {
127 compatible = "domain-idle-state";
128 arm,psci-suspend-param = <0x41000043>;
129 entry-latency-us = <800>;
130 exit-latency-us = <2118>;
131 min-residency-us = <7376>;
135 idle-states {
136 entry-method = "psci";
138 CPU_SLEEP: cpu-sleep-0 {
139 compatible = "arm,idle-state";
140 idle-state-name = "power-collapse";
141 arm,psci-suspend-param = <0x40000003>;
142 entry-latency-us = <290>;
143 exit-latency-us = <376>;
144 min-residency-us = <1182>;
145 local-timer-stop;
152 compatible = "qcom,scm-qcm2290", "qcom,scm";
154 clock-names = "core";
155 #reset-cells = <1>;
168 compatible = "arm,armv8-pmuv3";
173 compatible = "arm,psci-1.0";
176 CPU_PD0: power-domain-cpu0 {
177 #power-domain-cells = <0>;
178 power-domains = <&CLUSTER_PD>;
179 domain-idle-states = <&CPU_SLEEP>;
182 CPU_PD1: power-domain-cpu1 {
183 #power-domain-cells = <0>;
184 power-domains = <&CLUSTER_PD>;
185 domain-idle-states = <&CPU_SLEEP>;
188 CPU_PD2: power-domain-cpu2 {
189 #power-domain-cells = <0>;
190 power-domains = <&CLUSTER_PD>;
191 domain-idle-states = <&CPU_SLEEP>;
194 CPU_PD3: power-domain-cpu3 {
195 #power-domain-cells = <0>;
196 power-domains = <&CLUSTER_PD>;
197 domain-idle-states = <&CPU_SLEEP>;
200 CLUSTER_PD: power-domain-cpu-cluster {
201 #power-domain-cells = <0>;
202 power-domains = <&mpm>;
203 domain-idle-states = <&CLUSTER_SLEEP>;
208 compatible = "qcom,qcm2290-rpm-proc", "qcom,rpm-proc";
210 glink-edge {
211 compatible = "qcom,glink-rpm";
213 qcom,rpm-msg-ram = <&rpm_msg_ram>;
216 rpm_requests: rpm-requests {
217 compatible = "qcom,rpm-qcm2290";
218 qcom,glink-channels = "rpm_requests";
220 rpmcc: clock-controller {
221 compatible = "qcom,rpmcc-qcm2290", "qcom,rpmcc";
223 clock-names = "xo";
224 #clock-cells = <1>;
227 rpmpd: power-controller {
228 compatible = "qcom,qcm2290-rpmpd";
229 #power-domain-cells = <1>;
230 operating-points-v2 = <&rpmpd_opp_table>;
232 rpmpd_opp_table: opp-table {
233 compatible = "operating-points-v2";
236 opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
240 opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
244 opp-level = <RPM_SMD_LEVEL_SVS>;
248 opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
252 opp-level = <RPM_SMD_LEVEL_NOM>;
256 opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
260 opp-level = <RPM_SMD_LEVEL_TURBO>;
264 opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;
271 mpm: interrupt-controller {
273 qcom,rpm-msg-ram = <&apss_mpm>;
276 interrupt-controller;
277 #interrupt-cells = <2>;
278 #power-domain-cells = <0>;
279 interrupt-parent = <&intc>;
280 qcom,mpm-pin-count = <96>;
281 qcom,mpm-pin-map = <2 275>, /* TSENS0 uplow */
290 reserved_memory: reserved-memory {
291 #address-cells = <2>;
292 #size-cells = <2>;
297 no-map;
300 xbl_aop_mem: xbl-aop@45e00000 {
302 no-map;
305 sec_apps_mem: sec-apps@45fff000 {
307 no-map;
313 no-map;
316 qcom,rpm-msg-ram = <&rpm_msg_ram>;
321 no-map;
326 no-map;
329 wlan_msa_mem: wlan-msa@51900000 {
331 no-map;
336 no-map;
339 pil_ipa_fw_mem: ipa-fw@53600000 {
341 no-map;
344 pil_ipa_gsi_mem: ipa-gsi@53610000 {
346 no-map;
350 compatible = "shared-dma-pool";
352 no-map;
357 no-map;
360 dfps_data_memory: dpfs-data@5cf00000 {
362 no-map;
367 no-map;
371 compatible = "qcom,rmtfs-mem";
373 no-map;
375 qcom,client-id = <1>;
380 smp2p-adsp {
388 qcom,local-pid = <0>;
389 qcom,remote-pid = <2>;
391 adsp_smp2p_out: master-kernel {
392 qcom,entry-name = "master-kernel";
393 #qcom,smem-state-cells = <1>;
396 adsp_smp2p_in: slave-kernel {
397 qcom,entry-name = "slave-kernel";
398 interrupt-controller;
399 #interrupt-cells = <2>;
403 smp2p-mpss {
411 qcom,local-pid = <0>;
412 qcom,remote-pid = <1>;
414 modem_smp2p_out: master-kernel {
415 qcom,entry-name = "master-kernel";
416 #qcom,smem-state-cells = <1>;
419 modem_smp2p_in: slave-kernel {
420 qcom,entry-name = "slave-kernel";
421 interrupt-controller;
422 #interrupt-cells = <2>;
425 wlan_smp2p_in: wlan-wpss-to-ap {
426 qcom,entry-name = "wlan";
427 interrupt-controller;
428 #interrupt-cells = <2>;
433 compatible = "simple-bus";
434 #address-cells = <2>;
435 #size-cells = <2>;
437 dma-ranges = <0 0 0 0 0x10 0>;
440 compatible = "qcom,tcsr-mutex";
442 #hwlock-cells = <1>;
446 compatible = "qcom,qcm2290-tlmm";
449 gpio-controller;
450 gpio-ranges = <&tlmm 0 0 127>;
451 wakeup-parent = <&mpm>;
452 #gpio-cells = <2>;
453 interrupt-controller;
454 #interrupt-cells = <2>;
456 qup_i2c0_default: qup-i2c0-default-state {
459 drive-strength = <2>;
460 bias-pull-up;
463 qup_i2c1_default: qup-i2c1-default-state {
466 drive-strength = <2>;
467 bias-pull-up;
470 qup_i2c2_default: qup-i2c2-default-state {
473 drive-strength = <2>;
474 bias-pull-up;
477 qup_i2c3_default: qup-i2c3-default-state {
480 drive-strength = <2>;
481 bias-pull-up;
484 qup_i2c4_default: qup-i2c4-default-state {
487 drive-strength = <2>;
488 bias-pull-up;
491 qup_i2c5_default: qup-i2c5-default-state {
494 drive-strength = <2>;
495 bias-pull-up;
498 qup_spi0_default: qup-spi0-default-state {
501 drive-strength = <2>;
502 bias-pull-up;
505 qup_spi1_default: qup-spi1-default-state {
508 drive-strength = <2>;
509 bias-pull-up;
512 qup_spi2_default: qup-spi2-default-state {
515 drive-strength = <2>;
516 bias-pull-up;
519 qup_spi3_default: qup-spi3-default-state {
522 drive-strength = <2>;
523 bias-pull-up;
526 qup_spi4_default: qup-spi4-default-state {
529 drive-strength = <2>;
530 bias-pull-up;
533 qup_spi5_default: qup-spi5-default-state {
536 drive-strength = <2>;
537 bias-pull-up;
540 qup_uart0_default: qup-uart0-default-state {
543 drive-strength = <2>;
544 bias-disable;
547 qup_uart4_default: qup-uart4-default-state {
550 drive-strength = <2>;
551 bias-disable;
554 sdc1_state_on: sdc1-on-state {
555 clk-pins {
557 drive-strength = <16>;
558 bias-disable;
561 cmd-pins {
563 drive-strength = <10>;
564 bias-pull-up;
567 data-pins {
569 drive-strength = <10>;
570 bias-pull-up;
573 rclk-pins {
575 bias-pull-down;
579 sdc1_state_off: sdc1-off-state {
580 clk-pins {
582 drive-strength = <2>;
583 bias-disable;
586 cmd-pins {
588 drive-strength = <2>;
589 bias-pull-up;
592 data-pins {
594 drive-strength = <2>;
595 bias-pull-up;
598 rclk-pins {
600 bias-pull-down;
604 sdc2_state_on: sdc2-on-state {
605 clk-pins {
607 drive-strength = <16>;
608 bias-disable;
611 cmd-pins {
613 drive-strength = <10>;
614 bias-pull-up;
617 data-pins {
619 drive-strength = <10>;
620 bias-pull-up;
624 sdc2_state_off: sdc2-off-state {
625 clk-pins {
627 drive-strength = <2>;
628 bias-disable;
631 cmd-pins {
633 drive-strength = <2>;
634 bias-pull-up;
637 data-pins {
639 drive-strength = <2>;
640 bias-pull-up;
645 gcc: clock-controller@1400000 {
646 compatible = "qcom,gcc-qcm2290";
649 clock-names = "bi_tcxo", "sleep_clk";
650 #clock-cells = <1>;
651 #reset-cells = <1>;
652 #power-domain-cells = <1>;
656 compatible = "qcom,qcm2290-qusb2-phy";
661 clock-names = "cfg_ahb", "ref";
664 nvmem-cells = <&qusb2_hstx_trim>;
665 #phy-cells = <0>;
671 compatible = "qcom,qcm2290-qmp-usb3-phy";
678 clock-names = "cfg_ahb",
685 reset-names = "phy",
688 #clock-cells = <0>;
689 clock-output-names = "usb3_phy_pipe_clk_src";
691 #phy-cells = <0>;
697 compatible = "qcom,qcm2290-snoc";
699 #interconnect-cells = <2>;
701 qup_virt: interconnect-qup {
702 compatible = "qcom,qcm2290-qup-virt";
703 #interconnect-cells = <2>;
706 mmnrt_virt: interconnect-mmnrt {
707 compatible = "qcom,qcm2290-mmnrt-virt";
708 #interconnect-cells = <2>;
711 mmrt_virt: interconnect-mmrt {
712 compatible = "qcom,qcm2290-mmrt-virt";
713 #interconnect-cells = <2>;
718 compatible = "qcom,qcm2290-cnoc";
720 #interconnect-cells = <2>;
724 compatible = "qcom,qcm2290-qfprom", "qcom,qfprom";
726 #address-cells = <1>;
727 #size-cells = <1>;
729 qusb2_hstx_trim: hstx-trim@25b {
736 compatible = "qcom,qcm2290-cpu-bwmon", "qcom,sdm845-bwmon";
740 operating-points-v2 = <&cpu_bwmon_opp_table>;
744 cpu_bwmon_opp_table: opp-table {
745 compatible = "operating-points-v2";
747 opp-0 {
748 opp-peak-kBps = <(200 * 4 * 1000)>;
751 opp-1 {
752 opp-peak-kBps = <(300 * 4 * 1000)>;
755 opp-2 {
756 opp-peak-kBps = <(451 * 4 * 1000)>;
759 opp-3 {
760 opp-peak-kBps = <(547 * 4 * 1000)>;
763 opp-4 {
764 opp-peak-kBps = <(681 * 4 * 1000)>;
767 opp-5 {
768 opp-peak-kBps = <(768 * 4 * 1000)>;
771 opp-6 {
772 opp-peak-kBps = <(1017 * 4 * 1000)>;
775 opp-7 {
776 opp-peak-kBps = <(1353 * 4 * 1000)>;
779 opp-8 {
780 opp-peak-kBps = <(1555 * 4 * 1000)>;
783 opp-9 {
784 opp-peak-kBps = <(1804 * 4 * 1000)>;
790 compatible = "qcom,spmi-pmic-arb";
796 reg-names = "core",
801 interrupts-extended = <&mpm 86 IRQ_TYPE_LEVEL_HIGH>;
802 interrupt-names = "periph_irq";
805 #address-cells = <2>;
806 #size-cells = <0>;
807 interrupt-controller;
808 #interrupt-cells = <4>;
811 tsens0: thermal-sensor@4411000 {
812 compatible = "qcom,qcm2290-tsens", "qcom,tsens-v2";
816 interrupts-extended = <&mpm 2 IRQ_TYPE_LEVEL_HIGH>,
818 interrupt-names = "uplow", "critical";
819 #thermal-sensor-cells = <1>;
823 compatible = "qcom,prng-ee";
826 clock-names = "core";
830 compatible = "qcom,qcm2290-bimc";
832 #interconnect-cells = <2>;
836 compatible = "qcom,rpm-msg-ram", "mmio-sram";
838 #address-cells = <1>;
839 #size-cells = <1>;
848 compatible = "qcom,rpm-stats";
853 compatible = "qcom,qcm2290-sdhci", "qcom,sdhci-msm-v5";
857 reg-names = "hc",
863 interrupt-names = "hc_irq", "pwr_irq";
869 clock-names = "iface",
876 power-domains = <&rpmpd QCM2290_VDDCX>;
877 operating-points-v2 = <&sdhc1_opp_table>;
883 interconnect-names = "sdhc-ddr",
884 "cpu-sdhc";
886 qcom,dll-config = <0x000f642c>;
887 qcom,ddr-config = <0x80040868>;
888 bus-width = <8>;
892 sdhc1_opp_table: opp-table {
893 compatible = "operating-points-v2";
895 opp-100000000 {
896 opp-hz = /bits/ 64 <100000000>;
897 required-opps = <&rpmpd_opp_low_svs>;
898 opp-peak-kBps = <250000 133320>;
899 opp-avg-kBps = <102400 65000>;
902 opp-192000000 {
903 opp-hz = /bits/ 64 <192000000>;
904 required-opps = <&rpmpd_opp_low_svs>;
905 opp-peak-kBps = <800000 300000>;
906 opp-avg-kBps = <204800 200000>;
909 opp-384000000 {
910 opp-hz = /bits/ 64 <384000000>;
911 required-opps = <&rpmpd_opp_svs_plus>;
912 opp-peak-kBps = <800000 300000>;
913 opp-avg-kBps = <204800 200000>;
919 compatible = "qcom,qcm2290-sdhci", "qcom,sdhci-msm-v5";
921 reg-names = "hc";
925 interrupt-names = "hc_irq", "pwr_irq";
930 clock-names = "iface",
936 power-domains = <&rpmpd QCM2290_VDDCX>;
937 operating-points-v2 = <&sdhc2_opp_table>;
943 interconnect-names = "sdhc-ddr",
944 "cpu-sdhc";
946 qcom,dll-config = <0x0007642c>;
947 qcom,ddr-config = <0x80040868>;
948 bus-width = <4>;
952 sdhc2_opp_table: opp-table {
953 compatible = "operating-points-v2";
955 opp-100000000 {
956 opp-hz = /bits/ 64 <100000000>;
957 required-opps = <&rpmpd_opp_low_svs>;
958 opp-peak-kBps = <250000 133320>;
959 opp-avg-kBps = <261438 150000>;
962 opp-202000000 {
963 opp-hz = /bits/ 64 <202000000>;
964 required-opps = <&rpmpd_opp_svs_plus>;
965 opp-peak-kBps = <800000 300000>;
966 opp-avg-kBps = <261438 300000>;
971 gpi_dma0: dma-controller@4a00000 {
972 compatible = "qcom,qcm2290-gpi-dma", "qcom,sm6350-gpi-dma";
984 dma-channels = <10>;
985 dma-channel-mask = <0x1f>;
987 #dma-cells = <3>;
992 compatible = "qcom,geni-se-qup";
996 clock-names = "m-ahb", "s-ahb";
998 #address-cells = <2>;
999 #size-cells = <2>;
1004 compatible = "qcom,geni-i2c";
1008 clock-names = "se";
1009 pinctrl-0 = <&qup_i2c0_default>;
1010 pinctrl-names = "default";
1013 dma-names = "tx", "rx";
1020 interconnect-names = "qup-core",
1021 "qup-config",
1022 "qup-memory";
1023 #address-cells = <1>;
1024 #size-cells = <0>;
1029 compatible = "qcom,geni-spi";
1033 clock-names = "se";
1034 pinctrl-0 = <&qup_spi0_default>;
1035 pinctrl-names = "default";
1038 dma-names = "tx", "rx";
1043 interconnect-names = "qup-core",
1044 "qup-config";
1045 #address-cells = <1>;
1046 #size-cells = <0>;
1051 compatible = "qcom,geni-uart";
1055 clock-names = "se";
1056 pinctrl-0 = <&qup_uart0_default>;
1057 pinctrl-names = "default";
1062 interconnect-names = "qup-core",
1063 "qup-config";
1068 compatible = "qcom,geni-i2c";
1072 clock-names = "se";
1073 pinctrl-0 = <&qup_i2c1_default>;
1074 pinctrl-names = "default";
1077 dma-names = "tx", "rx";
1084 interconnect-names = "qup-core",
1085 "qup-config",
1086 "qup-memory";
1087 #address-cells = <1>;
1088 #size-cells = <0>;
1093 compatible = "qcom,geni-spi";
1097 clock-names = "se";
1098 pinctrl-0 = <&qup_spi1_default>;
1099 pinctrl-names = "default";
1102 dma-names = "tx", "rx";
1107 interconnect-names = "qup-core",
1108 "qup-config";
1109 #address-cells = <1>;
1110 #size-cells = <0>;
1115 compatible = "qcom,geni-i2c";
1119 clock-names = "se";
1120 pinctrl-0 = <&qup_i2c2_default>;
1121 pinctrl-names = "default";
1124 dma-names = "tx", "rx";
1131 interconnect-names = "qup-core",
1132 "qup-config",
1133 "qup-memory";
1134 #address-cells = <1>;
1135 #size-cells = <0>;
1140 compatible = "qcom,geni-spi";
1144 clock-names = "se";
1145 pinctrl-0 = <&qup_spi2_default>;
1146 pinctrl-names = "default";
1149 dma-names = "tx", "rx";
1154 interconnect-names = "qup-core",
1155 "qup-config";
1156 #address-cells = <1>;
1157 #size-cells = <0>;
1162 compatible = "qcom,geni-i2c";
1166 clock-names = "se";
1167 pinctrl-0 = <&qup_i2c3_default>;
1168 pinctrl-names = "default";
1171 dma-names = "tx", "rx";
1178 interconnect-names = "qup-core",
1179 "qup-config",
1180 "qup-memory";
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1187 compatible = "qcom,geni-spi";
1191 clock-names = "se";
1192 pinctrl-0 = <&qup_spi3_default>;
1193 pinctrl-names = "default";
1196 dma-names = "tx", "rx";
1201 interconnect-names = "qup-core",
1202 "qup-config";
1203 #address-cells = <1>;
1204 #size-cells = <0>;
1209 compatible = "qcom,geni-i2c";
1213 clock-names = "se";
1214 pinctrl-0 = <&qup_i2c4_default>;
1215 pinctrl-names = "default";
1218 dma-names = "tx", "rx";
1225 interconnect-names = "qup-core",
1226 "qup-config",
1227 "qup-memory";
1228 #address-cells = <1>;
1229 #size-cells = <0>;
1234 compatible = "qcom,geni-spi";
1237 clock-names = "se";
1239 pinctrl-names = "default";
1240 pinctrl-0 = <&qup_spi4_default>;
1243 dma-names = "tx", "rx";
1248 interconnect-names = "qup-core",
1249 "qup-config";
1250 #address-cells = <1>;
1251 #size-cells = <0>;
1256 compatible = "qcom,geni-uart";
1260 clock-names = "se";
1261 pinctrl-0 = <&qup_uart4_default>;
1262 pinctrl-names = "default";
1267 interconnect-names = "qup-core",
1268 "qup-config";
1273 compatible = "qcom,geni-i2c";
1277 clock-names = "se";
1278 pinctrl-0 = <&qup_i2c5_default>;
1279 pinctrl-names = "default";
1282 dma-names = "tx", "rx";
1289 interconnect-names = "qup-core",
1290 "qup-config",
1291 "qup-memory";
1292 #address-cells = <1>;
1293 #size-cells = <0>;
1298 compatible = "qcom,geni-spi";
1302 clock-names = "se";
1303 pinctrl-0 = <&qup_spi5_default>;
1304 pinctrl-names = "default";
1307 dma-names = "tx", "rx";
1312 interconnect-names = "qup-core",
1313 "qup-config";
1314 #address-cells = <1>;
1315 #size-cells = <0>;
1321 compatible = "qcom,qcm2290-dwc3", "qcom,dwc3";
1323 interrupts-extended = <&intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1325 interrupt-names = "hs_phy_irq",
1334 clock-names = "cfg_noc",
1341 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
1343 assigned-clock-rates = <19200000>, <133333333>;
1346 power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
1347 /* TODO: USB<->IPA path */
1352 interconnect-names = "usb-ddr",
1353 "apps-usb";
1354 wakeup-source;
1356 #address-cells = <2>;
1357 #size-cells = <2>;
1367 phy-names = "usb2-phy", "usb3-phy";
1371 snps,has-lpm-erratum;
1372 snps,hird-threshold = /bits/ 8 <0x10>;
1374 maximum-speed = "super-speed";
1379 mdss: display-subsystem@5e00000 {
1380 compatible = "qcom,qcm2290-mdss";
1382 reg-names = "mdss";
1384 interrupt-controller;
1385 #interrupt-cells = <1>;
1390 clock-names = "iface",
1396 power-domains = <&dispcc MDSS_GDSC>;
1404 interconnect-names = "mdp0-mem",
1405 "cpu-cfg";
1407 #address-cells = <2>;
1408 #size-cells = <2>;
1413 mdp: display-controller@5e01000 {
1414 compatible = "qcom,qcm2290-dpu";
1417 reg-names = "mdp",
1420 interrupt-parent = <&mdss>;
1428 clock-names = "bus",
1434 operating-points-v2 = <&mdp_opp_table>;
1435 power-domains = <&rpmpd QCM2290_VDDCX>;
1438 #address-cells = <1>;
1439 #size-cells = <0>;
1444 remote-endpoint = <&mdss_dsi0_in>;
1449 mdp_opp_table: opp-table {
1450 compatible = "operating-points-v2";
1452 opp-19200000 {
1453 opp-hz = /bits/ 64 <19200000>;
1454 required-opps = <&rpmpd_opp_min_svs>;
1457 opp-192000000 {
1458 opp-hz = /bits/ 64 <192000000>;
1459 required-opps = <&rpmpd_opp_low_svs>;
1462 opp-256000000 {
1463 opp-hz = /bits/ 64 <256000000>;
1464 required-opps = <&rpmpd_opp_svs>;
1467 opp-307200000 {
1468 opp-hz = /bits/ 64 <307200000>;
1469 required-opps = <&rpmpd_opp_svs_plus>;
1472 opp-384000000 {
1473 opp-hz = /bits/ 64 <384000000>;
1474 required-opps = <&rpmpd_opp_nom>;
1480 compatible = "qcom,qcm2290-dsi-ctrl", "qcom,mdss-dsi-ctrl";
1482 reg-names = "dsi_ctrl";
1484 interrupt-parent = <&mdss>;
1493 clock-names = "byte",
1500 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
1502 assigned-clock-parents = <&mdss_dsi0_phy 0>,
1505 operating-points-v2 = <&dsi_opp_table>;
1506 power-domains = <&rpmpd QCM2290_VDDCX>;
1509 #address-cells = <1>;
1510 #size-cells = <0>;
1514 dsi_opp_table: opp-table {
1515 compatible = "operating-points-v2";
1517 opp-19200000 {
1518 opp-hz = /bits/ 64 <19200000>;
1519 required-opps = <&rpmpd_opp_min_svs>;
1522 opp-164000000 {
1523 opp-hz = /bits/ 64 <164000000>;
1524 required-opps = <&rpmpd_opp_low_svs>;
1527 opp-187500000 {
1528 opp-hz = /bits/ 64 <187500000>;
1529 required-opps = <&rpmpd_opp_svs>;
1534 #address-cells = <1>;
1535 #size-cells = <0>;
1541 remote-endpoint = <&dpu_intf1_out>;
1555 compatible = "qcom,dsi-phy-14nm-2290";
1559 reg-names = "dsi_phy",
1565 clock-names = "iface",
1568 power-domains = <&rpmpd QCM2290_VDDMX>;
1569 required-opps = <&rpmpd_opp_nom>;
1571 #clock-cells = <1>;
1572 #phy-cells = <0>;
1578 dispcc: clock-controller@5f00000 {
1579 compatible = "qcom,qcm2290-dispcc";
1587 clock-names = "bi_tcxo",
1593 #power-domain-cells = <1>;
1594 #clock-cells = <1>;
1595 #reset-cells = <1>;
1599 compatible = "qcom,qcm2290-mpss-pas", "qcom,sm6115-mpss-pas";
1602 interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING>,
1608 interrupt-names = "wdog",
1612 "stop-ack",
1613 "shutdown-ack";
1616 clock-names = "xo";
1618 power-domains = <&rpmpd QCM2290_VDDCX>;
1620 memory-region = <&pil_modem_mem>;
1622 qcom,smem-states = <&modem_smp2p_out 0>;
1623 qcom,smem-state-names = "stop";
1627 glink-edge {
1630 qcom,remote-pid = <1>;
1636 compatible = "qcom,qcm2290-adsp-pas", "qcom,sm6115-adsp-pas";
1639 interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
1644 interrupt-names = "wdog",
1648 "stop-ack";
1651 clock-names = "xo";
1653 power-domains = <&rpmpd QCM2290_VDD_LPI_CX>,
1656 memory-region = <&pil_adsp_mem>;
1658 qcom,smem-states = <&adsp_smp2p_out 0>;
1659 qcom,smem-state-names = "stop";
1663 glink-edge {
1666 qcom,remote-pid = <2>;
1672 compatible = "qcom,qcm2290-smmu-500", "qcom,smmu-500", "arm,mmu-500";
1674 #iommu-cells = <2>;
1675 #global-interrupts = <1>;
1745 compatible = "qcom,wcn3990-wifi";
1747 reg-names = "membase";
1748 memory-region = <&wlan_msa_mem>;
1762 qcom,msa-fixed-perm;
1767 compatible = "qcom,apss-wdt-qcm2290", "qcom,kpss-wdt";
1775 compatible = "qcom,qcm2290-apcs-hmss-global";
1777 #mbox-cells = <1>;
1780 timer@f120000 {
1781 compatible = "arm,armv7-timer-mem";
1783 #address-cells = <1>;
1784 #size-cells = <1>;
1792 frame-number = <0>;
1798 frame-number = <1>;
1805 frame-number = <2>;
1812 frame-number = <3>;
1819 frame-number = <4>;
1826 frame-number = <5>;
1833 frame-number = <6>;
1838 intc: interrupt-controller@f200000 {
1839 compatible = "arm,gic-v3";
1843 #interrupt-cells = <3>;
1844 interrupt-controller;
1845 interrupt-parent = <&intc>;
1846 #redistributor-regions = <1>;
1847 redistributor-stride = <0x0 0x20000>;
1851 compatible = "qcom,qcm2290-cpufreq-hw", "qcom,cpufreq-hw";
1853 reg-names = "freq-domain0";
1855 interrupt-names = "dcvsh-irq-0";
1857 clock-names = "xo", "alternate";
1859 #freq-domain-cells = <1>;
1860 #clock-cells = <1>;
1864 thermal-zones {
1865 mapss-thermal {
1866 polling-delay-passive = <0>;
1867 polling-delay = <0>;
1869 thermal-sensors = <&tsens0 0>;
1872 mapss_alert0: trip-point0 {
1878 mapss_alert1: trip-point1 {
1884 mapss_crit: mapss-crit {
1892 video-thermal {
1893 polling-delay-passive = <0>;
1894 polling-delay = <0>;
1896 thermal-sensors = <&tsens0 1>;
1899 video_alert0: trip-point0 {
1905 video_alert1: trip-point1 {
1911 video_crit: video-crit {
1919 wlan-thermal {
1920 polling-delay-passive = <0>;
1921 polling-delay = <0>;
1923 thermal-sensors = <&tsens0 2>;
1926 wlan_alert0: trip-point0 {
1932 wlan_alert1: trip-point1 {
1938 wlan_crit: wlan-crit {
1946 cpuss0-thermal {
1947 polling-delay-passive = <0>;
1948 polling-delay = <0>;
1950 thermal-sensors = <&tsens0 3>;
1953 cpuss0_alert0: trip-point0 {
1959 cpuss0_alert1: trip-point1 {
1965 cpuss0_crit: cpuss0-crit {
1973 cpuss1-thermal {
1974 polling-delay-passive = <0>;
1975 polling-delay = <0>;
1977 thermal-sensors = <&tsens0 4>;
1980 cpuss1_alert0: trip-point0 {
1986 cpuss1_alert1: trip-point1 {
1992 cpuss1_crit: cpuss1-crit {
2000 mdm0-thermal {
2001 polling-delay-passive = <0>;
2002 polling-delay = <0>;
2004 thermal-sensors = <&tsens0 5>;
2007 mdm0_alert0: trip-point0 {
2013 mdm0_alert1: trip-point1 {
2019 mdm0_crit: mdm0-crit {
2027 mdm1-thermal {
2028 polling-delay-passive = <0>;
2029 polling-delay = <0>;
2031 thermal-sensors = <&tsens0 6>;
2034 mdm1_alert0: trip-point0 {
2040 mdm1_alert1: trip-point1 {
2046 mdm1_crit: mdm1-crit {
2054 gpu-thermal {
2055 polling-delay-passive = <0>;
2056 polling-delay = <0>;
2058 thermal-sensors = <&tsens0 7>;
2061 gpu_alert0: trip-point0 {
2067 gpu_alert1: trip-point1 {
2073 gpu_crit: gpu-crit {
2081 hm-center-thermal {
2082 polling-delay-passive = <0>;
2083 polling-delay = <0>;
2085 thermal-sensors = <&tsens0 8>;
2088 hm_center_alert0: trip-point0 {
2094 hm_center_alert1: trip-point1 {
2100 hm_center_crit: hm-center-crit {
2108 camera-thermal {
2109 polling-delay-passive = <0>;
2110 polling-delay = <0>;
2112 thermal-sensors = <&tsens0 9>;
2115 camera_alert0: trip-point0 {
2121 camera_alert1: trip-point1 {
2127 camera_crit: camera-crit {
2136 timer {
2137 compatible = "arm,armv8-timer";