Lines Matching +full:1 +full:a98000

21 	 * A number of our drivers want address/size cells = 1
42 #address-cells = <1>;
120 CPU5: cpu@1 {
202 /* Boot CPU is cluster 1 core 0 */
229 #reset-cells = <1>;
260 #clock-cells = <1>;
267 #power-domain-cells = <1>;
274 opp-level = <1>;
341 qcom,client-id = <1>;
399 qcom,remote-pid = <1>;
404 #qcom,smem-state-cells = <1>;
436 #qcom,smem-state-cells = <1>;
443 #address-cells = <1>;
446 qcom,ipc-1 = <&apcs1_mbox 8 13>;
452 #qcom,smem-state-cells = <1>;
455 hexagon_smsm: hexagon@1 {
456 reg = <1>;
474 #address-cells = <1>;
475 #size-cells = <1>;
488 #address-cells = <1>;
489 #size-cells = <1>;
553 bits = <1 6>;
573 bits = <1 6>;
593 bits = <1 6>;
605 #interconnect-cells = <1>;
637 #thermal-sensor-cells = <1>;
648 #interconnect-cells = <1>;
654 #interconnect-cells = <1>;
658 #interconnect-cells = <1>;
1176 <&mdss_dsi0_phy 1>,
1188 #clock-cells = <1>;
1189 #reset-cells = <1>;
1190 #power-domain-cells = <1>;
1196 #hwlock-cells = <1>;
1204 mdss: display-subsystem@1a00000 {
1222 #address-cells = <1>;
1223 #size-cells = <1>;
1224 #interrupt-cells = <1>;
1229 mdss_mdp: display-controller@1a01000 {
1253 #address-cells = <1>;
1263 port@1 {
1264 reg = <1>;
1272 mdss_dsi0: dsi@1a98000 {
1296 <&mdss_dsi0_phy 1>;
1301 #address-cells = <1>;
1305 #address-cells = <1>;
1315 port@1 {
1316 reg = <1>;
1323 mdss_dsi0_phy: phy@1a98300 {
1336 #clock-cells = <1>;
1341 mdss_dsi1: dsi@1aa0000 {
1365 <&mdss_dsi0_phy 1>;
1370 #address-cells = <1>;
1380 port@1 {
1381 reg = <1>;
1388 mdss_dsi1_phy: phy@1aa0300 {
1401 #clock-cells = <1>;
1407 gpu: gpu@1c00000 {
1429 iommus = <&gpu_iommu 1>, <&gpu_iommu 2>;
1457 apps_iommu: iommu@1ef0000 {
1464 #address-cells = <1>;
1465 #size-cells = <1>;
1466 #iommu-cells = <1>;
1484 gpu_iommu: iommu@1f08000 {
1491 #address-cells = <1>;
1492 #size-cells = <1>;
1493 #iommu-cells = <1>;
1533 #dma-cells = <1>;
1537 qcom,num-ees = <1>;
1549 <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1579 interrupts = <1 IRQ_TYPE_EDGE_BOTH>, <11 IRQ_TYPE_EDGE_BOTH>;
1582 qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
1604 qcom,remote-pid = <1>;
1612 #address-cells = <1>;
1627 #address-cells = <1>;
1629 #sound-dai-cells = <1>;
1639 #address-cells = <1>;
1641 #sound-dai-cells = <1>;
1686 #sound-dai-cells = <1>;
1687 #address-cells = <1>;
1698 #sound-dai-cells = <1>;
1716 pinctrl-1 = <&sdc1_sleep>;
1718 mmc-ddr-1_8v;
1738 pinctrl-1 = <&sdc2_sleep>;
1750 #dma-cells = <1>;
1761 dmas = <&blsp_dma 0>, <&blsp_dma 1>;
1764 pinctrl-1 = <&blsp_uart1_sleep>;
1778 pinctrl-1 = <&blsp_uart2_sleep>;
1793 pinctrl-1 = <&blsp_i2c1_sleep>;
1795 #address-cells = <1>;
1810 pinctrl-1 = <&blsp_spi1_sleep>;
1812 #address-cells = <1>;
1827 pinctrl-1 = <&blsp_i2c2_sleep>;
1829 #address-cells = <1>;
1844 pinctrl-1 = <&blsp_spi2_sleep>;
1846 #address-cells = <1>;
1861 pinctrl-1 = <&blsp_i2c3_sleep>;
1863 #address-cells = <1>;
1878 pinctrl-1 = <&blsp_spi3_sleep>;
1880 #address-cells = <1>;
1895 pinctrl-1 = <&blsp_i2c4_sleep>;
1897 #address-cells = <1>;
1912 pinctrl-1 = <&blsp_spi4_sleep>;
1914 #address-cells = <1>;
1929 pinctrl-1 = <&blsp_i2c5_sleep>;
1931 #address-cells = <1>;
1946 pinctrl-1 = <&blsp_spi5_sleep>;
1948 #address-cells = <1>;
1963 pinctrl-1 = <&blsp_i2c6_sleep>;
1965 #address-cells = <1>;
1980 pinctrl-1 = <&blsp_spi6_sleep>;
1982 #address-cells = <1>;
2000 #reset-cells = <1>;
2033 <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2117 #mbox-cells = <1>;
2172 #mbox-cells = <1>;
2184 #address-cells = <1>;
2185 #size-cells = <1>;
2201 frame-number = <1>;
2293 #mbox-cells = <1>;
2508 thermal-sensors = <&tsens 1>;
2525 <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;