Lines Matching +full:disable +full:- +full:state
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
13 #include <dt-bindings/soc/qcom,apr.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&intc>;
19 #address-cells = <2>;
20 #size-cells = <2>;
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 tz-apps@86000000 {
37 no-map;
43 no-map;
46 qcom,rpm-msg-ram = <&rpm_msg_ram>;
51 no-map;
56 no-map;
61 no-map;
65 compatible = "qcom,rmtfs-mem";
67 no-map;
69 qcom,client-id = <1>;
74 no-map;
83 * define reliable alloc-ranges.
86 * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
88 reg = <0x0 0x86800000 0x0 0>; /* size is device-specific */
89 no-map;
96 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
97 no-map;
104 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
105 no-map;
112 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
113 no-map;
119 xo_board: xo-board {
120 compatible = "fixed-clock";
121 #clock-cells = <0>;
122 clock-frequency = <19200000>;
125 sleep_clk: sleep-clk {
126 compatible = "fixed-clock";
127 #clock-cells = <0>;
128 clock-frequency = <32768>;
133 #address-cells = <1>;
134 #size-cells = <0>;
138 compatible = "arm,cortex-a53";
140 next-level-cache = <&L2_0>;
141 enable-method = "psci";
143 operating-points-v2 = <&cpu_opp_table>;
144 #cooling-cells = <2>;
145 power-domains = <&CPU_PD0>;
146 power-domain-names = "psci";
153 compatible = "arm,cortex-a53";
155 next-level-cache = <&L2_0>;
156 enable-method = "psci";
158 operating-points-v2 = <&cpu_opp_table>;
159 #cooling-cells = <2>;
160 power-domains = <&CPU_PD1>;
161 power-domain-names = "psci";
168 compatible = "arm,cortex-a53";
170 next-level-cache = <&L2_0>;
171 enable-method = "psci";
173 operating-points-v2 = <&cpu_opp_table>;
174 #cooling-cells = <2>;
175 power-domains = <&CPU_PD2>;
176 power-domain-names = "psci";
183 compatible = "arm,cortex-a53";
185 next-level-cache = <&L2_0>;
186 enable-method = "psci";
188 operating-points-v2 = <&cpu_opp_table>;
189 #cooling-cells = <2>;
190 power-domains = <&CPU_PD3>;
191 power-domain-names = "psci";
196 L2_0: l2-cache {
198 cache-level = <2>;
199 cache-unified;
202 idle-states {
203 entry-method = "psci";
205 CPU_SLEEP_0: cpu-sleep-0 {
206 compatible = "arm,idle-state";
207 idle-state-name = "standalone-power-collapse";
208 arm,psci-suspend-param = <0x40000002>;
209 entry-latency-us = <130>;
210 exit-latency-us = <150>;
211 min-residency-us = <2000>;
212 local-timer-stop;
216 domain-idle-states {
218 CLUSTER_RET: cluster-retention {
219 compatible = "domain-idle-state";
220 arm,psci-suspend-param = <0x41000012>;
221 entry-latency-us = <500>;
222 exit-latency-us = <500>;
223 min-residency-us = <2000>;
226 CLUSTER_PWRDN: cluster-gdhs {
227 compatible = "domain-idle-state";
228 arm,psci-suspend-param = <0x41000032>;
229 entry-latency-us = <2000>;
230 exit-latency-us = <2000>;
231 min-residency-us = <6000>;
236 cpu_opp_table: opp-table-cpu {
237 compatible = "operating-points-v2";
238 opp-shared;
240 opp-200000000 {
241 opp-hz = /bits/ 64 <200000000>;
243 opp-400000000 {
244 opp-hz = /bits/ 64 <400000000>;
246 opp-800000000 {
247 opp-hz = /bits/ 64 <800000000>;
249 opp-998400000 {
250 opp-hz = /bits/ 64 <998400000>;
256 compatible = "qcom,scm-msm8916", "qcom,scm";
260 clock-names = "core", "bus", "iface";
261 #reset-cells = <1>;
263 qcom,dload-mode = <&tcsr 0x6100>;
268 compatible = "arm,cortex-a53-pmu";
273 compatible = "arm,psci-1.0";
276 CPU_PD0: power-domain-cpu0 {
277 #power-domain-cells = <0>;
278 power-domains = <&CLUSTER_PD>;
279 domain-idle-states = <&CPU_SLEEP_0>;
282 CPU_PD1: power-domain-cpu1 {
283 #power-domain-cells = <0>;
284 power-domains = <&CLUSTER_PD>;
285 domain-idle-states = <&CPU_SLEEP_0>;
288 CPU_PD2: power-domain-cpu2 {
289 #power-domain-cells = <0>;
290 power-domains = <&CLUSTER_PD>;
291 domain-idle-states = <&CPU_SLEEP_0>;
294 CPU_PD3: power-domain-cpu3 {
295 #power-domain-cells = <0>;
296 power-domains = <&CLUSTER_PD>;
297 domain-idle-states = <&CPU_SLEEP_0>;
300 CLUSTER_PD: power-domain-cluster {
301 #power-domain-cells = <0>;
302 domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
307 compatible = "qcom,msm8916-rpm-proc", "qcom,rpm-proc";
309 smd-edge {
312 qcom,smd-edge = <15>;
314 rpm_requests: rpm-requests {
315 compatible = "qcom,rpm-msm8916";
316 qcom,smd-channels = "rpm_requests";
318 rpmcc: clock-controller {
319 compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
320 #clock-cells = <1>;
322 clock-names = "xo";
325 rpmpd: power-controller {
326 compatible = "qcom,msm8916-rpmpd";
327 #power-domain-cells = <1>;
328 operating-points-v2 = <&rpmpd_opp_table>;
330 rpmpd_opp_table: opp-table {
331 compatible = "operating-points-v2";
334 opp-level = <1>;
337 opp-level = <2>;
340 opp-level = <3>;
343 opp-level = <4>;
346 opp-level = <5>;
349 opp-level = <6>;
357 smp2p-hexagon {
365 qcom,local-pid = <0>;
366 qcom,remote-pid = <1>;
368 hexagon_smp2p_out: master-kernel {
369 qcom,entry-name = "master-kernel";
371 #qcom,smem-state-cells = <1>;
374 hexagon_smp2p_in: slave-kernel {
375 qcom,entry-name = "slave-kernel";
377 interrupt-controller;
378 #interrupt-cells = <2>;
382 smp2p-wcnss {
390 qcom,local-pid = <0>;
391 qcom,remote-pid = <4>;
393 wcnss_smp2p_out: master-kernel {
394 qcom,entry-name = "master-kernel";
396 #qcom,smem-state-cells = <1>;
399 wcnss_smp2p_in: slave-kernel {
400 qcom,entry-name = "slave-kernel";
402 interrupt-controller;
403 #interrupt-cells = <2>;
410 #address-cells = <1>;
411 #size-cells = <0>;
413 qcom,ipc-1 = <&apcs 8 13>;
414 qcom,ipc-3 = <&apcs 8 19>;
419 #qcom,smem-state-cells = <1>;
426 interrupt-controller;
427 #interrupt-cells = <2>;
434 interrupt-controller;
435 #interrupt-cells = <2>;
440 #address-cells = <1>;
441 #size-cells = <1>;
443 compatible = "simple-bus";
449 clock-names = "core";
458 compatible = "qcom,msm8916-qfprom", "qcom,qfprom";
460 #address-cells = <1>;
461 #size-cells = <1>;
468 tsens_s0_p1: s0-p1@d0 {
473 tsens_s0_p2: s0-p2@d1 {
478 tsens_s1_p1: s1-p1@d2 {
482 tsens_s1_p2: s1-p2@d2 {
486 tsens_s2_p1: s2-p1@d3 {
491 tsens_s2_p2: s2-p2@d4 {
498 tsens_s4_p1: s4-p1@d4 {
503 tsens_s4_p2: s4-p2@d5 {
508 tsens_s5_p1: s5-p1@d5 {
513 tsens_s5_p2: s5-p2@d6 {
530 compatible = "qcom,rpm-msg-ram";
535 compatible = "qcom,msm8916-rpm-stats";
540 compatible = "qcom,msm8916-bimc";
542 #interconnect-cells = <1>;
545 tsens: thermal-sensor@4a9000 {
546 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
551 nvmem-cells = <&tsens_mode>,
558 nvmem-cell-names = "mode",
567 interrupt-names = "uplow";
568 #thermal-sensor-cells = <1>;
572 compatible = "qcom,msm8916-pcnoc";
574 #interconnect-cells = <1>;
578 compatible = "qcom,msm8916-snoc";
580 #interconnect-cells = <1>;
584 compatible = "arm,coresight-stm", "arm,primecell";
587 reg-names = "stm-base", "stm-stimulus-base";
590 clock-names = "apb_pclk", "atclk";
594 out-ports {
597 remote-endpoint = <&funnel0_in7>;
604 /* CTI 0 - TMC connections */
606 compatible = "arm,coresight-cti", "arm,primecell";
610 clock-names = "apb_pclk";
615 /* CTI 1 - TPIU connections */
617 compatible = "arm,coresight-cti", "arm,primecell";
621 clock-names = "apb_pclk";
626 /* CTIs 2-11 - no information - not instantiated */
629 compatible = "arm,coresight-tpiu", "arm,primecell";
633 clock-names = "apb_pclk", "atclk";
637 in-ports {
640 remote-endpoint = <&replicator_out1>;
647 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
651 clock-names = "apb_pclk", "atclk";
655 in-ports {
656 #address-cells = <1>;
657 #size-cells = <0>;
661 * 0 - connected to Resource and Power Manger CPU ETM
662 * 1 - not-connected
663 * 2 - connected to Modem CPU ETM
664 * 3 - not-connected
665 * 5 - not-connected
666 * 6 - connected trought funnel to Wireless CPU ETM
667 * 7 - connected to STM component
673 remote-endpoint = <&funnel1_out>;
680 remote-endpoint = <&stm_out>;
685 out-ports {
688 remote-endpoint = <&etf_in>;
695 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
699 clock-names = "apb_pclk", "atclk";
703 out-ports {
704 #address-cells = <1>;
705 #size-cells = <0>;
710 remote-endpoint = <&etr_in>;
716 remote-endpoint = <&tpiu_in>;
721 in-ports {
724 remote-endpoint = <&etf_out>;
731 compatible = "arm,coresight-tmc", "arm,primecell";
735 clock-names = "apb_pclk", "atclk";
739 in-ports {
742 remote-endpoint = <&funnel0_out>;
747 out-ports {
750 remote-endpoint = <&replicator_in>;
757 compatible = "arm,coresight-tmc", "arm,primecell";
761 clock-names = "apb_pclk", "atclk";
765 in-ports {
768 remote-endpoint = <&replicator_out0>;
775 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
779 clock-names = "apb_pclk", "atclk";
783 in-ports {
784 #address-cells = <1>;
785 #size-cells = <0>;
790 remote-endpoint = <&etm0_out>;
796 remote-endpoint = <&etm1_out>;
802 remote-endpoint = <&etm2_out>;
808 remote-endpoint = <&etm3_out>;
813 out-ports {
816 remote-endpoint = <&funnel0_in4>;
823 compatible = "arm,coresight-cpu-debug", "arm,primecell";
826 clock-names = "apb_pclk";
832 compatible = "arm,coresight-cpu-debug", "arm,primecell";
835 clock-names = "apb_pclk";
841 compatible = "arm,coresight-cpu-debug", "arm,primecell";
844 clock-names = "apb_pclk";
850 compatible = "arm,coresight-cpu-debug", "arm,primecell";
853 clock-names = "apb_pclk";
858 /* Core CTIs; CTIs 12-15 */
859 /* CTI - CPU-0 */
861 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
866 clock-names = "apb_pclk";
869 arm,cs-dev-assoc = <&etm0>;
874 /* CTI - CPU-1 */
876 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
881 clock-names = "apb_pclk";
884 arm,cs-dev-assoc = <&etm1>;
889 /* CTI - CPU-2 */
891 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
896 clock-names = "apb_pclk";
899 arm,cs-dev-assoc = <&etm2>;
904 /* CTI - CPU-3 */
906 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
911 clock-names = "apb_pclk";
914 arm,cs-dev-assoc = <&etm3>;
920 compatible = "arm,coresight-etm4x", "arm,primecell";
924 clock-names = "apb_pclk", "atclk";
925 arm,coresight-loses-context-with-cpu;
931 out-ports {
934 remote-endpoint = <&funnel1_in0>;
941 compatible = "arm,coresight-etm4x", "arm,primecell";
945 clock-names = "apb_pclk", "atclk";
946 arm,coresight-loses-context-with-cpu;
952 out-ports {
955 remote-endpoint = <&funnel1_in1>;
962 compatible = "arm,coresight-etm4x", "arm,primecell";
966 clock-names = "apb_pclk", "atclk";
967 arm,coresight-loses-context-with-cpu;
973 out-ports {
976 remote-endpoint = <&funnel1_in2>;
983 compatible = "arm,coresight-etm4x", "arm,primecell";
987 clock-names = "apb_pclk", "atclk";
988 arm,coresight-loses-context-with-cpu;
994 out-ports {
997 remote-endpoint = <&funnel1_in3>;
1004 compatible = "qcom,msm8916-pinctrl";
1007 gpio-controller;
1008 gpio-ranges = <&tlmm 0 0 122>;
1009 #gpio-cells = <2>;
1010 interrupt-controller;
1011 #interrupt-cells = <2>;
1013 blsp_i2c1_default: blsp-i2c1-default-state {
1016 drive-strength = <2>;
1017 bias-disable;
1020 blsp_i2c1_sleep: blsp-i2c1-sleep-state {
1023 drive-strength = <2>;
1024 bias-disable;
1027 blsp_i2c2_default: blsp-i2c2-default-state {
1030 drive-strength = <2>;
1031 bias-disable;
1034 blsp_i2c2_sleep: blsp-i2c2-sleep-state {
1037 drive-strength = <2>;
1038 bias-disable;
1041 blsp_i2c3_default: blsp-i2c3-default-state {
1044 drive-strength = <2>;
1045 bias-disable;
1048 blsp_i2c3_sleep: blsp-i2c3-sleep-state {
1051 drive-strength = <2>;
1052 bias-disable;
1055 blsp_i2c4_default: blsp-i2c4-default-state {
1058 drive-strength = <2>;
1059 bias-disable;
1062 blsp_i2c4_sleep: blsp-i2c4-sleep-state {
1065 drive-strength = <2>;
1066 bias-disable;
1069 blsp_i2c5_default: blsp-i2c5-default-state {
1072 drive-strength = <2>;
1073 bias-disable;
1076 blsp_i2c5_sleep: blsp-i2c5-sleep-state {
1079 drive-strength = <2>;
1080 bias-disable;
1083 blsp_i2c6_default: blsp-i2c6-default-state {
1086 drive-strength = <2>;
1087 bias-disable;
1090 blsp_i2c6_sleep: blsp-i2c6-sleep-state {
1093 drive-strength = <2>;
1094 bias-disable;
1097 blsp_spi1_default: blsp-spi1-default-state {
1098 spi-pins {
1101 drive-strength = <12>;
1102 bias-disable;
1104 cs-pins {
1107 drive-strength = <16>;
1108 bias-disable;
1109 output-high;
1113 blsp_spi1_sleep: blsp-spi1-sleep-state {
1116 drive-strength = <2>;
1117 bias-pull-down;
1120 blsp_spi2_default: blsp-spi2-default-state {
1121 spi-pins {
1124 drive-strength = <12>;
1125 bias-disable;
1127 cs-pins {
1130 drive-strength = <16>;
1131 bias-disable;
1132 output-high;
1136 blsp_spi2_sleep: blsp-spi2-sleep-state {
1139 drive-strength = <2>;
1140 bias-pull-down;
1143 blsp_spi3_default: blsp-spi3-default-state {
1144 spi-pins {
1147 drive-strength = <12>;
1148 bias-disable;
1150 cs-pins {
1153 drive-strength = <16>;
1154 bias-disable;
1155 output-high;
1159 blsp_spi3_sleep: blsp-spi3-sleep-state {
1162 drive-strength = <2>;
1163 bias-pull-down;
1166 blsp_spi4_default: blsp-spi4-default-state {
1167 spi-pins {
1170 drive-strength = <12>;
1171 bias-disable;
1173 cs-pins {
1176 drive-strength = <16>;
1177 bias-disable;
1178 output-high;
1182 blsp_spi4_sleep: blsp-spi4-sleep-state {
1185 drive-strength = <2>;
1186 bias-pull-down;
1189 blsp_spi5_default: blsp-spi5-default-state {
1190 spi-pins {
1193 drive-strength = <12>;
1194 bias-disable;
1196 cs-pins {
1199 drive-strength = <16>;
1200 bias-disable;
1201 output-high;
1205 blsp_spi5_sleep: blsp-spi5-sleep-state {
1208 drive-strength = <2>;
1209 bias-pull-down;
1212 blsp_spi6_default: blsp-spi6-default-state {
1213 spi-pins {
1216 drive-strength = <12>;
1217 bias-disable;
1219 cs-pins {
1222 drive-strength = <16>;
1223 bias-disable;
1224 output-high;
1228 blsp_spi6_sleep: blsp-spi6-sleep-state {
1231 drive-strength = <2>;
1232 bias-pull-down;
1235 blsp_uart1_default: blsp-uart1-default-state {
1239 drive-strength = <16>;
1240 bias-disable;
1243 blsp_uart1_sleep: blsp-uart1-sleep-state {
1246 drive-strength = <2>;
1247 bias-pull-down;
1250 blsp_uart2_default: blsp-uart2-default-state {
1253 drive-strength = <16>;
1254 bias-disable;
1257 blsp_uart2_sleep: blsp-uart2-sleep-state {
1260 drive-strength = <2>;
1261 bias-pull-down;
1264 camera_front_default: camera-front-default-state {
1265 pwdn-pins {
1268 drive-strength = <16>;
1269 bias-disable;
1271 rst-pins {
1274 drive-strength = <16>;
1275 bias-disable;
1277 mclk1-pins {
1280 drive-strength = <16>;
1281 bias-disable;
1285 camera_rear_default: camera-rear-default-state {
1286 pwdn-pins {
1289 drive-strength = <16>;
1290 bias-disable;
1292 rst-pins {
1295 drive-strength = <16>;
1296 bias-disable;
1298 mclk0-pins {
1301 drive-strength = <16>;
1302 bias-disable;
1306 cci0_default: cci0-default-state {
1309 drive-strength = <16>;
1310 bias-disable;
1313 cdc_dmic_default: cdc-dmic-default-state {
1314 clk-pins {
1317 drive-strength = <8>;
1319 data-pins {
1322 drive-strength = <8>;
1326 cdc_dmic_sleep: cdc-dmic-sleep-state {
1327 clk-pins {
1330 drive-strength = <2>;
1331 bias-disable;
1333 data-pins {
1336 drive-strength = <2>;
1337 bias-disable;
1341 cdc_pdm_default: cdc-pdm-default-state {
1345 drive-strength = <8>;
1346 bias-disable;
1349 cdc_pdm_sleep: cdc-pdm-sleep-state {
1353 drive-strength = <2>;
1354 bias-pull-down;
1357 pri_mi2s_default: mi2s-pri-default-state {
1360 drive-strength = <8>;
1361 bias-disable;
1364 pri_mi2s_sleep: mi2s-pri-sleep-state {
1367 drive-strength = <2>;
1368 bias-disable;
1371 pri_mi2s_mclk_default: mi2s-pri-mclk-default-state {
1374 drive-strength = <8>;
1375 bias-disable;
1378 pri_mi2s_mclk_sleep: mi2s-pri-mclk-sleep-state {
1381 drive-strength = <2>;
1382 bias-disable;
1385 pri_mi2s_ws_default: mi2s-pri-ws-default-state {
1388 drive-strength = <8>;
1389 bias-disable;
1392 pri_mi2s_ws_sleep: mi2s-pri-ws-sleep-state {
1395 drive-strength = <2>;
1396 bias-disable;
1399 sec_mi2s_default: mi2s-sec-default-state {
1402 drive-strength = <8>;
1403 bias-disable;
1406 sec_mi2s_sleep: mi2s-sec-sleep-state {
1409 drive-strength = <2>;
1410 bias-disable;
1413 sdc1_default: sdc1-default-state {
1414 clk-pins {
1416 bias-disable;
1417 drive-strength = <16>;
1419 cmd-pins {
1421 bias-pull-up;
1422 drive-strength = <10>;
1424 data-pins {
1426 bias-pull-up;
1427 drive-strength = <10>;
1431 sdc1_sleep: sdc1-sleep-state {
1432 clk-pins {
1434 bias-disable;
1435 drive-strength = <2>;
1437 cmd-pins {
1439 bias-pull-up;
1440 drive-strength = <2>;
1442 data-pins {
1444 bias-pull-up;
1445 drive-strength = <2>;
1449 sdc2_default: sdc2-default-state {
1450 clk-pins {
1452 bias-disable;
1453 drive-strength = <16>;
1455 cmd-pins {
1457 bias-pull-up;
1458 drive-strength = <10>;
1460 data-pins {
1462 bias-pull-up;
1463 drive-strength = <10>;
1467 sdc2_sleep: sdc2-sleep-state {
1468 clk-pins {
1470 bias-disable;
1471 drive-strength = <2>;
1473 cmd-pins {
1475 bias-pull-up;
1476 drive-strength = <2>;
1478 data-pins {
1480 bias-pull-up;
1481 drive-strength = <2>;
1485 wcss_wlan_default: wcss-wlan-default-state {
1488 drive-strength = <6>;
1489 bias-pull-up;
1493 gcc: clock-controller@1800000 {
1494 compatible = "qcom,gcc-msm8916";
1495 #clock-cells = <1>;
1496 #reset-cells = <1>;
1497 #power-domain-cells = <1>;
1506 clock-names = "xo",
1516 compatible = "qcom,tcsr-mutex";
1518 #hwlock-cells = <1>;
1522 compatible = "qcom,tcsr-msm8916", "syscon";
1526 mdss: display-subsystem@1a00000 {
1531 reg-names = "mdss_phys", "vbif_phys";
1533 power-domains = <&gcc MDSS_GDSC>;
1538 clock-names = "iface",
1544 interrupt-controller;
1545 #interrupt-cells = <1>;
1547 #address-cells = <1>;
1548 #size-cells = <1>;
1551 mdss_mdp: display-controller@1a01000 {
1552 compatible = "qcom,msm8916-mdp5", "qcom,mdp5";
1554 reg-names = "mdp_phys";
1556 interrupt-parent = <&mdss>;
1563 clock-names = "iface",
1571 #address-cells = <1>;
1572 #size-cells = <0>;
1577 remote-endpoint = <&mdss_dsi0_in>;
1584 compatible = "qcom,msm8916-dsi-ctrl",
1585 "qcom,mdss-dsi-ctrl";
1587 reg-names = "dsi_ctrl";
1589 interrupt-parent = <&mdss>;
1592 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
1594 assigned-clock-parents = <&mdss_dsi0_phy 0>,
1603 clock-names = "mdp_core",
1611 #address-cells = <1>;
1612 #size-cells = <0>;
1615 #address-cells = <1>;
1616 #size-cells = <0>;
1621 remote-endpoint = <&mdss_mdp_intf1_out>;
1634 compatible = "qcom,dsi-phy-28nm-lp";
1638 reg-names = "dsi_pll",
1642 #clock-cells = <1>;
1643 #phy-cells = <0>;
1647 clock-names = "iface", "ref";
1652 compatible = "qcom,msm8916-camss";
1662 reg-names = "csiphy0",
1677 interrupt-names = "csiphy0",
1683 power-domains = <&gcc VFE_GDSC>;
1703 clock-names = "top_ahb",
1725 #address-cells = <1>;
1726 #size-cells = <0>;
1739 compatible = "qcom,msm8916-cci", "qcom,msm8226-cci";
1740 #address-cells = <1>;
1741 #size-cells = <0>;
1748 clock-names = "camss_top_ahb", "cci_ahb",
1750 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1752 assigned-clock-rates = <80000000>, <19200000>;
1753 pinctrl-names = "default";
1754 pinctrl-0 = <&cci0_default>;
1757 cci_i2c0: i2c-bus@0 {
1759 clock-frequency = <400000>;
1760 #address-cells = <1>;
1761 #size-cells = <0>;
1766 compatible = "qcom,adreno-306.0", "qcom,adreno";
1768 reg-names = "kgsl_3d0_reg_memory";
1770 interrupt-names = "kgsl_3d0_irq";
1771 clock-names =
1785 power-domains = <&gcc OXILI_GDSC>;
1786 operating-points-v2 = <&gpu_opp_table>;
1790 gpu_opp_table: opp-table {
1791 compatible = "operating-points-v2";
1793 opp-400000000 {
1794 opp-hz = /bits/ 64 <400000000>;
1796 opp-19200000 {
1797 opp-hz = /bits/ 64 <19200000>;
1802 venus: video-codec@1d00000 {
1803 compatible = "qcom,msm8916-venus";
1806 power-domains = <&gcc VENUS_GDSC>;
1810 clock-names = "core", "iface", "bus";
1812 memory-region = <&venus_mem>;
1815 video-decoder {
1816 compatible = "venus-decoder";
1819 video-encoder {
1820 compatible = "venus-encoder";
1825 #address-cells = <1>;
1826 #size-cells = <1>;
1827 #iommu-cells = <1>;
1828 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1833 clock-names = "iface", "bus";
1834 qcom,iommu-secure-id = <17>;
1837 iommu-ctx@3000 {
1838 compatible = "qcom,msm-iommu-v1-sec";
1844 iommu-ctx@4000 {
1845 compatible = "qcom,msm-iommu-v1-ns";
1851 iommu-ctx@5000 {
1852 compatible = "qcom,msm-iommu-v1-sec";
1859 #address-cells = <1>;
1860 #size-cells = <1>;
1861 #iommu-cells = <1>;
1862 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1866 clock-names = "iface", "bus";
1867 qcom,iommu-secure-id = <18>;
1870 iommu-ctx@1000 {
1871 compatible = "qcom,msm-iommu-v1-ns";
1877 iommu-ctx@2000 {
1878 compatible = "qcom,msm-iommu-v1-ns";
1885 compatible = "qcom,spmi-pmic-arb";
1891 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
1892 interrupt-names = "periph_irq";
1896 #address-cells = <2>;
1897 #size-cells = <0>;
1898 interrupt-controller;
1899 #interrupt-cells = <4>;
1902 bam_dmux_dma: dma-controller@4044000 {
1903 compatible = "qcom,bam-v1.7.0";
1906 #dma-cells = <1>;
1909 num-channels = <6>;
1910 qcom,num-ees = <1>;
1911 qcom,powered-remotely;
1917 compatible = "qcom,msm8916-mss-pil";
1921 reg-names = "qdsp6", "rmb";
1923 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1928 interrupt-names = "wdog", "fatal", "ready",
1929 "handover", "stop-ack";
1931 power-domains = <&rpmpd MSM8916_VDDCX>,
1933 power-domain-names = "cx", "mx";
1939 clock-names = "iface", "bus", "mem", "xo";
1941 qcom,smem-states = <&hexagon_smp2p_out 0>;
1942 qcom,smem-state-names = "stop";
1945 reset-names = "mss_restart";
1947 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1952 memory-region = <&mba_mem>;
1956 memory-region = <&mpss_mem>;
1959 bam_dmux: bam-dmux {
1960 compatible = "qcom,bam-dmux";
1962 interrupt-parent = <&hexagon_smsm>;
1964 interrupt-names = "pc", "pc-ack";
1966 qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
1967 qcom,smem-state-names = "pc", "pc-ack";
1970 dma-names = "tx", "rx";
1975 smd-edge {
1978 qcom,smd-edge = <0>;
1980 qcom,remote-pid = <1>;
1985 compatible = "qcom,apr-v2";
1986 qcom,smd-channels = "apr_audio_svc";
1988 #address-cells = <1>;
1989 #size-cells = <0>;
2002 compatible = "qcom,q6afe-dais";
2003 #address-cells = <1>;
2004 #size-cells = <0>;
2005 #sound-dai-cells = <1>;
2014 compatible = "qcom,q6asm-dais";
2015 #address-cells = <1>;
2016 #size-cells = <0>;
2017 #sound-dai-cells = <1>;
2026 compatible = "qcom,q6adm-routing";
2027 #sound-dai-cells = <0>;
2034 qcom,smd-channels = "fastrpcsmd-apps-dsp";
2036 qcom,non-secure-domain;
2038 #address-cells = <1>;
2039 #size-cells = <0>;
2042 compatible = "qcom,fastrpc-compute-cb";
2051 compatible = "qcom,apq8016-sbc-sndcard";
2053 reg-names = "mic-iomux", "spkr-iomux";
2056 lpass: audio-controller@7708000 {
2058 compatible = "qcom,apq8016-lpass-cpu";
2073 clock-names = "ahbix-clk",
2074 "mi2s-bit-clk0",
2075 "mi2s-bit-clk1",
2076 "mi2s-bit-clk2",
2077 "mi2s-bit-clk3",
2078 "pcnoc-mport-clk",
2079 "pcnoc-sway-clk";
2080 #sound-dai-cells = <1>;
2083 interrupt-names = "lpass-irq-lpaif";
2085 reg-names = "lpass-lpaif";
2087 #address-cells = <1>;
2088 #size-cells = <0>;
2091 lpass_codec: audio-codec@771c000 {
2092 compatible = "qcom,msm8916-wcd-digital-codec";
2096 clock-names = "ahbix-clk", "mclk";
2097 #sound-dai-cells = <1>;
2102 compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
2104 reg-names = "hc", "core";
2108 interrupt-names = "hc_irq", "pwr_irq";
2112 clock-names = "iface", "core", "xo";
2113 pinctrl-0 = <&sdc1_default>;
2114 pinctrl-1 = <&sdc1_sleep>;
2115 pinctrl-names = "default", "sleep";
2116 mmc-ddr-1_8v;
2117 bus-width = <8>;
2118 non-removable;
2123 compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
2125 reg-names = "hc", "core";
2129 interrupt-names = "hc_irq", "pwr_irq";
2133 clock-names = "iface", "core", "xo";
2134 pinctrl-0 = <&sdc2_default>;
2135 pinctrl-1 = <&sdc2_sleep>;
2136 pinctrl-names = "default", "sleep";
2137 bus-width = <4>;
2141 blsp_dma: dma-controller@7884000 {
2142 compatible = "qcom,bam-v1.7.0";
2146 clock-names = "bam_clk";
2147 #dma-cells = <1>;
2149 qcom,controlled-remotely;
2153 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
2157 clock-names = "core", "iface";
2159 dma-names = "tx", "rx";
2160 pinctrl-names = "default", "sleep";
2161 pinctrl-0 = <&blsp_uart1_default>;
2162 pinctrl-1 = <&blsp_uart1_sleep>;
2167 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
2171 clock-names = "core", "iface";
2173 dma-names = "tx", "rx";
2174 pinctrl-names = "default", "sleep";
2175 pinctrl-0 = <&blsp_uart2_default>;
2176 pinctrl-1 = <&blsp_uart2_sleep>;
2181 compatible = "qcom,i2c-qup-v2.2.1";
2186 clock-names = "core", "iface";
2188 dma-names = "tx", "rx";
2189 pinctrl-names = "default", "sleep";
2190 pinctrl-0 = <&blsp_i2c1_default>;
2191 pinctrl-1 = <&blsp_i2c1_sleep>;
2192 #address-cells = <1>;
2193 #size-cells = <0>;
2198 compatible = "qcom,spi-qup-v2.2.1";
2203 clock-names = "core", "iface";
2205 dma-names = "tx", "rx";
2206 pinctrl-names = "default", "sleep";
2207 pinctrl-0 = <&blsp_spi1_default>;
2208 pinctrl-1 = <&blsp_spi1_sleep>;
2209 #address-cells = <1>;
2210 #size-cells = <0>;
2215 compatible = "qcom,i2c-qup-v2.2.1";
2220 clock-names = "core", "iface";
2222 dma-names = "tx", "rx";
2223 pinctrl-names = "default", "sleep";
2224 pinctrl-0 = <&blsp_i2c2_default>;
2225 pinctrl-1 = <&blsp_i2c2_sleep>;
2226 #address-cells = <1>;
2227 #size-cells = <0>;
2232 compatible = "qcom,spi-qup-v2.2.1";
2237 clock-names = "core", "iface";
2239 dma-names = "tx", "rx";
2240 pinctrl-names = "default", "sleep";
2241 pinctrl-0 = <&blsp_spi2_default>;
2242 pinctrl-1 = <&blsp_spi2_sleep>;
2243 #address-cells = <1>;
2244 #size-cells = <0>;
2249 compatible = "qcom,i2c-qup-v2.2.1";
2254 clock-names = "core", "iface";
2256 dma-names = "tx", "rx";
2257 pinctrl-names = "default", "sleep";
2258 pinctrl-0 = <&blsp_i2c3_default>;
2259 pinctrl-1 = <&blsp_i2c3_sleep>;
2260 #address-cells = <1>;
2261 #size-cells = <0>;
2266 compatible = "qcom,spi-qup-v2.2.1";
2271 clock-names = "core", "iface";
2273 dma-names = "tx", "rx";
2274 pinctrl-names = "default", "sleep";
2275 pinctrl-0 = <&blsp_spi3_default>;
2276 pinctrl-1 = <&blsp_spi3_sleep>;
2277 #address-cells = <1>;
2278 #size-cells = <0>;
2283 compatible = "qcom,i2c-qup-v2.2.1";
2288 clock-names = "core", "iface";
2290 dma-names = "tx", "rx";
2291 pinctrl-names = "default", "sleep";
2292 pinctrl-0 = <&blsp_i2c4_default>;
2293 pinctrl-1 = <&blsp_i2c4_sleep>;
2294 #address-cells = <1>;
2295 #size-cells = <0>;
2300 compatible = "qcom,spi-qup-v2.2.1";
2305 clock-names = "core", "iface";
2307 dma-names = "tx", "rx";
2308 pinctrl-names = "default", "sleep";
2309 pinctrl-0 = <&blsp_spi4_default>;
2310 pinctrl-1 = <&blsp_spi4_sleep>;
2311 #address-cells = <1>;
2312 #size-cells = <0>;
2317 compatible = "qcom,i2c-qup-v2.2.1";
2322 clock-names = "core", "iface";
2324 dma-names = "tx", "rx";
2325 pinctrl-names = "default", "sleep";
2326 pinctrl-0 = <&blsp_i2c5_default>;
2327 pinctrl-1 = <&blsp_i2c5_sleep>;
2328 #address-cells = <1>;
2329 #size-cells = <0>;
2334 compatible = "qcom,spi-qup-v2.2.1";
2339 clock-names = "core", "iface";
2341 dma-names = "tx", "rx";
2342 pinctrl-names = "default", "sleep";
2343 pinctrl-0 = <&blsp_spi5_default>;
2344 pinctrl-1 = <&blsp_spi5_sleep>;
2345 #address-cells = <1>;
2346 #size-cells = <0>;
2351 compatible = "qcom,i2c-qup-v2.2.1";
2356 clock-names = "core", "iface";
2358 dma-names = "tx", "rx";
2359 pinctrl-names = "default", "sleep";
2360 pinctrl-0 = <&blsp_i2c6_default>;
2361 pinctrl-1 = <&blsp_i2c6_sleep>;
2362 #address-cells = <1>;
2363 #size-cells = <0>;
2368 compatible = "qcom,spi-qup-v2.2.1";
2373 clock-names = "core", "iface";
2375 dma-names = "tx", "rx";
2376 pinctrl-names = "default", "sleep";
2377 pinctrl-0 = <&blsp_spi6_default>;
2378 pinctrl-1 = <&blsp_spi6_sleep>;
2379 #address-cells = <1>;
2380 #size-cells = <0>;
2385 compatible = "qcom,ci-hdrc";
2392 clock-names = "iface", "core";
2393 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
2394 assigned-clock-rates = <80000000>;
2396 reset-names = "core";
2399 hnp-disable;
2400 srp-disable;
2401 adp-disable;
2402 ahb-burst-config = <0>;
2403 phy-names = "usb-phy";
2406 #reset-cells = <1>;
2410 compatible = "qcom,usb-hs-phy-msm8916",
2411 "qcom,usb-hs-phy";
2412 #phy-cells = <0>;
2414 clock-names = "ref", "sleep";
2416 reset-names = "phy", "por";
2417 qcom,init-seq = /bits/ 8 <0x0 0x44>,
2426 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
2428 reg-names = "ccu", "dxe", "pmu";
2430 memory-region = <&wcnss_mem>;
2432 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
2437 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
2439 power-domains = <&rpmpd MSM8916_VDDCX>,
2441 power-domain-names = "cx", "mx";
2443 qcom,smem-states = <&wcnss_smp2p_out 0>;
2444 qcom,smem-state-names = "stop";
2446 pinctrl-names = "default";
2447 pinctrl-0 = <&wcss_wlan_default>;
2452 /* Separate chip, compatible is board-specific */
2454 clock-names = "xo";
2457 smd-edge {
2461 qcom,smd-edge = <6>;
2462 qcom,remote-pid = <4>;
2468 qcom,smd-channels = "WCNSS_CTRL";
2473 compatible = "qcom,wcnss-bt";
2477 compatible = "qcom,wcnss-wlan";
2481 interrupt-names = "tx", "rx";
2483 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
2484 qcom,smem-state-names = "tx-enable", "tx-rings-empty";
2490 intc: interrupt-controller@b000000 {
2491 compatible = "qcom,msm-qgic2";
2492 interrupt-controller;
2493 #interrupt-cells = <3>;
2500 compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
2502 #mbox-cells = <1>;
2504 clock-names = "pll", "aux";
2505 #clock-cells = <0>;
2509 compatible = "qcom,msm8916-a53pll";
2511 #clock-cells = <0>;
2513 clock-names = "xo";
2517 #address-cells = <1>;
2518 #size-cells = <1>;
2520 compatible = "arm,armv7-timer-mem";
2522 clock-frequency = <19200000>;
2525 frame-number = <0>;
2533 frame-number = <1>;
2540 frame-number = <2>;
2547 frame-number = <3>;
2554 frame-number = <4>;
2561 frame-number = <5>;
2568 frame-number = <6>;
2575 cpu0_acc: power-manager@b088000 {
2576 compatible = "qcom,msm8916-acc";
2581 cpu0_saw: power-manager@b089000 {
2582 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2587 cpu1_acc: power-manager@b098000 {
2588 compatible = "qcom,msm8916-acc";
2593 cpu1_saw: power-manager@b099000 {
2594 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2599 cpu2_acc: power-manager@b0a8000 {
2600 compatible = "qcom,msm8916-acc";
2605 cpu2_saw: power-manager@b0a9000 {
2606 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2611 cpu3_acc: power-manager@b0b8000 {
2612 compatible = "qcom,msm8916-acc";
2617 cpu3_saw: power-manager@b0b9000 {
2618 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2624 thermal-zones {
2625 cpu0-1-thermal {
2626 polling-delay-passive = <250>;
2627 polling-delay = <1000>;
2629 thermal-sensors = <&tsens 5>;
2632 cpu0_1_alert0: trip-point0 {
2637 cpu0_1_crit: cpu-crit {
2644 cooling-maps {
2647 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2655 cpu2-3-thermal {
2656 polling-delay-passive = <250>;
2657 polling-delay = <1000>;
2659 thermal-sensors = <&tsens 4>;
2662 cpu2_3_alert0: trip-point0 {
2667 cpu2_3_crit: cpu-crit {
2674 cooling-maps {
2677 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2685 gpu-thermal {
2686 polling-delay-passive = <250>;
2687 polling-delay = <1000>;
2689 thermal-sensors = <&tsens 2>;
2692 gpu_alert0: trip-point0 {
2697 gpu_crit: gpu-crit {
2705 camera-thermal {
2706 polling-delay-passive = <250>;
2707 polling-delay = <1000>;
2709 thermal-sensors = <&tsens 1>;
2712 cam_alert0: trip-point0 {
2720 modem-thermal {
2721 polling-delay-passive = <250>;
2722 polling-delay = <1000>;
2724 thermal-sensors = <&tsens 0>;
2727 modem_alert0: trip-point0 {
2737 compatible = "arm,armv8-timer";