Lines Matching +full:0 +full:x0a204000
27 reg = <0 0x80000000 0 0>;
36 reg = <0x0 0x86000000 0x0 0x300000>;
42 reg = <0x0 0x86300000 0x0 0x100000>;
50 reg = <0x0 0x86400000 0x0 0x100000>;
55 reg = <0x0 0x86500000 0x0 0x180000>;
60 reg = <0x0 0x86680000 0x0 0x80000>;
66 reg = <0x0 0x86700000 0x0 0xe0000>;
73 reg = <0x0 0x867e0000 0x0 0x20000>;
85 * alignment = <0x0 0x400000>;
86 * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
88 reg = <0x0 0x86800000 0x0 0>; /* size is device-specific */
94 size = <0x0 0x600000>;
95 alignment = <0x0 0x100000>;
96 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
102 size = <0x0 0x500000>;
103 alignment = <0x0 0x100000>;
104 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
110 size = <0x0 0x100000>;
111 alignment = <0x0 0x100000>;
112 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
121 #clock-cells = <0>;
127 #clock-cells = <0>;
134 #size-cells = <0>;
136 CPU0: cpu@0 {
139 reg = <0x0>;
154 reg = <0x1>;
169 reg = <0x2>;
184 reg = <0x3>;
205 CPU_SLEEP_0: cpu-sleep-0 {
208 arm,psci-suspend-param = <0x40000002>;
220 arm,psci-suspend-param = <0x41000012>;
228 arm,psci-suspend-param = <0x41000032>;
263 qcom,dload-mode = <&tcsr 0x6100>;
277 #power-domain-cells = <0>;
283 #power-domain-cells = <0>;
289 #power-domain-cells = <0>;
295 #power-domain-cells = <0>;
301 #power-domain-cells = <0>;
311 qcom,ipc = <&apcs 8 0>;
365 qcom,local-pid = <0>;
390 qcom,local-pid = <0>;
411 #size-cells = <0>;
416 apps_smsm: apps@0 {
417 reg = <0>;
439 soc: soc@0 {
442 ranges = <0 0 0 0xffffffff>;
447 reg = <0x00022000 0x200>;
454 reg = <0x004ab000 0x4>;
459 reg = <0x0005c000 0x1000>;
464 reg = <0xd0 0x1>;
465 bits = <0 7>;
469 reg = <0xd0 0x2>;
474 reg = <0xd1 0x2>;
479 reg = <0xd2 0x1>;
483 reg = <0xd2 0x2>;
487 reg = <0xd3 0x1>;
492 reg = <0xd4 0x1>;
493 bits = <0 5>;
499 reg = <0xd4 0x2>;
504 reg = <0xd5 0x1>;
509 reg = <0xd5 0x2>;
514 reg = <0xd6 0x2>;
519 reg = <0xd7 0x1>;
524 reg = <0xef 0x1>;
531 reg = <0x00060000 0x8000>;
536 reg = <0x00290000 0x10000>;
541 reg = <0x00400000 0x62000>;
547 reg = <0x004a9000 0x1000>, /* TM */
548 <0x004a8000 0x1000>; /* SROT */
573 reg = <0x00500000 0x11000>;
579 reg = <0x00580000 0x14000>;
585 reg = <0x00802000 0x1000>,
586 <0x09280000 0x180000>;
604 /* CTI 0 - TMC connections */
607 reg = <0x00810000 0x1000>;
618 reg = <0x00811000 0x1000>;
630 reg = <0x00820000 0x1000>;
648 reg = <0x00821000 0x1000>;
657 #size-cells = <0>;
661 * 0 - connected to Resource and Power Manger CPU ETM
696 reg = <0x00824000 0x1000>;
705 #size-cells = <0>;
707 port@0 {
708 reg = <0>;
732 reg = <0x00825000 0x1000>;
758 reg = <0x00826000 0x1000>;
776 reg = <0x00841000 0x1000>;
785 #size-cells = <0>;
787 port@0 {
788 reg = <0>;
824 reg = <0x00850000 0x1000>;
833 reg = <0x00852000 0x1000>;
842 reg = <0x00854000 0x1000>;
851 reg = <0x00856000 0x1000>;
859 /* CTI - CPU-0 */
863 reg = <0x00858000 0x1000>;
878 reg = <0x00859000 0x1000>;
893 reg = <0x0085a000 0x1000>;
908 reg = <0x0085b000 0x1000>;
921 reg = <0x0085c000 0x1000>;
942 reg = <0x0085d000 0x1000>;
963 reg = <0x0085e000 0x1000>;
984 reg = <0x0085f000 0x1000>;
1005 reg = <0x01000000 0x300000>;
1008 gpio-ranges = <&tlmm 0 0 122>;
1498 reg = <0x01800000 0x80000>;
1502 <&mdss_dsi0_phy 0>,
1503 <0>,
1504 <0>,
1505 <0>;
1517 reg = <0x01905000 0x20000>;
1523 reg = <0x01937000 0x30000>;
1529 reg = <0x01a00000 0x1000>,
1530 <0x01ac8000 0x3000>;
1553 reg = <0x01a01000 0x89000>;
1557 interrupts = <0>;
1572 #size-cells = <0>;
1574 port@0 {
1575 reg = <0>;
1586 reg = <0x01a98000 0x25c>;
1594 assigned-clock-parents = <&mdss_dsi0_phy 0>,
1612 #size-cells = <0>;
1616 #size-cells = <0>;
1618 port@0 {
1619 reg = <0>;
1635 reg = <0x01a98300 0xd4>,
1636 <0x01a98500 0x280>,
1637 <0x01a98780 0x30>;
1643 #phy-cells = <0>;
1653 reg = <0x01b0ac00 0x200>,
1654 <0x01b00030 0x4>,
1655 <0x01b0b000 0x200>,
1656 <0x01b00038 0x4>,
1657 <0x01b08000 0x100>,
1658 <0x01b08400 0x100>,
1659 <0x01b0a000 0x500>,
1660 <0x01b00020 0x10>,
1661 <0x01b10000 0x1000>;
1726 #size-cells = <0>;
1728 port@0 {
1729 reg = <0>;
1741 #size-cells = <0>;
1742 reg = <0x01b0c000 0x1000>;
1754 pinctrl-0 = <&cci0_default>;
1757 cci_i2c0: i2c-bus@0 {
1758 reg = <0>;
1761 #size-cells = <0>;
1767 reg = <0x01c00000 0x20000>;
1804 reg = <0x01d00000 0xff000>;
1829 ranges = <0 0x01e20000 0x20000>;
1830 reg = <0x01ef0000 0x3000>;
1839 reg = <0x3000 0x1000>;
1846 reg = <0x4000 0x1000>;
1853 reg = <0x5000 0x1000>;
1863 ranges = <0 0x01f08000 0x10000>;
1872 reg = <0x1000 0x1000>;
1879 reg = <0x2000 0x1000>;
1886 reg = <0x0200f000 0x001000>,
1887 <0x02400000 0x400000>,
1888 <0x02c00000 0x400000>,
1889 <0x03800000 0x200000>,
1890 <0x0200a000 0x002100>;
1894 qcom,ee = <0>;
1895 qcom,channel = <0>;
1897 #size-cells = <0>;
1904 reg = <0x04044000 0x19000>;
1907 qcom,ee = <0>;
1918 reg = <0x04080000 0x100>,
1919 <0x04020000 0x040>;
1924 <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
1941 qcom,smem-states = <&hexagon_smp2p_out 0>;
1944 resets = <&scm 0>;
1947 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1978 qcom,smd-edge = <0>;
1989 #size-cells = <0>;
2004 #size-cells = <0>;
2016 #size-cells = <0>;
2027 #sound-dai-cells = <0>;
2039 #size-cells = <0>;
2052 reg = <0x07702000 0x4>, <0x07702004 0x4>;
2084 reg = <0x07708000 0x10000>;
2088 #size-cells = <0>;
2093 reg = <0x0771c000 0x400>;
2103 reg = <0x07824900 0x11c>, <0x07824000 0x800>;
2113 pinctrl-0 = <&sdc1_default>;
2124 reg = <0x07864900 0x11c>, <0x07864000 0x800>;
2134 pinctrl-0 = <&sdc2_default>;
2143 reg = <0x07884000 0x23000>;
2148 qcom,ee = <0>;
2154 reg = <0x078af000 0x200>;
2158 dmas = <&blsp_dma 0>, <&blsp_dma 1>;
2161 pinctrl-0 = <&blsp_uart1_default>;
2168 reg = <0x078b0000 0x200>;
2175 pinctrl-0 = <&blsp_uart2_default>;
2182 reg = <0x078b5000 0x500>;
2190 pinctrl-0 = <&blsp_i2c1_default>;
2193 #size-cells = <0>;
2199 reg = <0x078b5000 0x500>;
2207 pinctrl-0 = <&blsp_spi1_default>;
2210 #size-cells = <0>;
2216 reg = <0x078b6000 0x500>;
2224 pinctrl-0 = <&blsp_i2c2_default>;
2227 #size-cells = <0>;
2233 reg = <0x078b6000 0x500>;
2241 pinctrl-0 = <&blsp_spi2_default>;
2244 #size-cells = <0>;
2250 reg = <0x078b7000 0x500>;
2258 pinctrl-0 = <&blsp_i2c3_default>;
2261 #size-cells = <0>;
2267 reg = <0x078b7000 0x500>;
2275 pinctrl-0 = <&blsp_spi3_default>;
2278 #size-cells = <0>;
2284 reg = <0x078b8000 0x500>;
2292 pinctrl-0 = <&blsp_i2c4_default>;
2295 #size-cells = <0>;
2301 reg = <0x078b8000 0x500>;
2309 pinctrl-0 = <&blsp_spi4_default>;
2312 #size-cells = <0>;
2318 reg = <0x078b9000 0x500>;
2326 pinctrl-0 = <&blsp_i2c5_default>;
2329 #size-cells = <0>;
2335 reg = <0x078b9000 0x500>;
2343 pinctrl-0 = <&blsp_spi5_default>;
2346 #size-cells = <0>;
2352 reg = <0x078ba000 0x500>;
2360 pinctrl-0 = <&blsp_i2c6_default>;
2363 #size-cells = <0>;
2369 reg = <0x078ba000 0x500>;
2377 pinctrl-0 = <&blsp_spi6_default>;
2380 #size-cells = <0>;
2386 reg = <0x078d9000 0x200>,
2387 <0x078d9200 0x200>;
2402 ahb-burst-config = <0>;
2412 #phy-cells = <0>;
2415 resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
2417 qcom,init-seq = /bits/ 8 <0x0 0x44>,
2418 <0x1 0x6b>,
2419 <0x2 0x24>,
2420 <0x3 0x13>;
2427 reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>;
2433 <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
2443 qcom,smem-states = <&wcnss_smp2p_out 0>;
2447 pinctrl-0 = <&wcss_wlan_default>;
2494 reg = <0x0b000000 0x1000>, <0x0b002000 0x2000>,
2495 <0x0b001000 0x1000>, <0x0b004000 0x2000>;
2496 interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
2501 reg = <0x0b011000 0x1000>;
2505 #clock-cells = <0>;
2510 reg = <0x0b016000 0x40>;
2511 #clock-cells = <0>;
2521 reg = <0x0b020000 0x1000>;
2525 frame-number = <0>;
2528 reg = <0x0b021000 0x1000>,
2529 <0x0b022000 0x1000>;
2535 reg = <0x0b023000 0x1000>;
2542 reg = <0x0b024000 0x1000>;
2549 reg = <0x0b025000 0x1000>;
2556 reg = <0x0b026000 0x1000>;
2563 reg = <0x0b027000 0x1000>;
2570 reg = <0x0b028000 0x1000>;
2577 reg = <0x0b088000 0x1000>;
2582 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2583 reg = <0x0b089000 0x1000>;
2589 reg = <0x0b098000 0x1000>;
2594 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2595 reg = <0x0b099000 0x1000>;
2601 reg = <0x0b0a8000 0x1000>;
2606 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2607 reg = <0x0b0a9000 0x1000>;
2613 reg = <0x0b0b8000 0x1000>;
2618 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2619 reg = <0x0b0b9000 0x1000>;
2724 thermal-sensors = <&tsens 0>;