Lines Matching +full:ma35d1 +full:- +full:clk

1 // SPDX-License-Identifier: GPL-2.0
4  * Author: Shan-Chun Hung <schung@nuvoton.com>
8 /dts-v1/;
9 #include "ma35d1.dtsi"
12 	model = "Nuvoton MA35D1-SOM";
13 	compatible = "nuvoton,ma35d1-som", "nuvoton,ma35d1";
20 		stdout-path = "serial0:115200n8";
28 	clk_hxt: clock-hxt {
29 		compatible = "fixed-clock";
30 		#clock-cells = <0>;
31 		clock-frequency = <24000000>;
32 		clock-output-names = "clk_hxt";
40 &clk {
41 	assigned-clocks = <&clk CAPLL>,
42 			  <&clk DDRPLL>,
43 			  <&clk APLL>,
44 			  <&clk EPLL>,
45 			  <&clk VPLL>;
46 	assigned-clock-rates = <800000000>,
51 	nuvoton,pll-mode = "integer",