Lines Matching +full:0 +full:x11007000
21 cluster0_opp: opp-table-0 {
48 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0x0>;
66 reg = <0x1>;
79 reg = <0x2>;
92 reg = <0x3>;
105 CPU_SLEEP_0_0: cpu-sleep-0-0 {
110 arm,psci-suspend-param = <0x0010000>;
113 CLUSTER_SLEEP_0: cluster-sleep-0 {
118 arm,psci-suspend-param = <0x2010000>;
130 #clock-cells = <0>;
137 #clock-cells = <0>;
150 reg = <0 0x43000000 0 0x20000>;
184 reg = <0 0x10000000 0 0x1000>;
190 reg = <0 0x10001000 0 0x1000>;
196 reg = <0 0x10003050 0 0x1000>;
201 reg = <0 0x10018000 0 0x710>;
208 reg = <0 0x10007000 0 0x1000>;
216 reg = <0 0x10008000 0 0x1000>;
225 reg = <0 0x10005000 0 0x1000>;
230 reg = <0 0x1000b000 0 0x1000>;
241 reg = <0 0x10009000 0 0x1000>;
248 reg = <0 0x1000f000 0 0x1000>;
262 reg = <0 0x10200620 0 0x20>;
270 reg = <0 0x10310000 0 0x1000>,
271 <0 0x10320000 0 0x1000>,
272 <0 0x10340000 0 0x2000>,
273 <0 0x10360000 0 0x2000>;
281 reg = <0 0x11000480 0 0x80>,
282 <0 0x11000500 0 0x80>,
283 <0 0x11000580 0 0x80>,
284 <0 0x11000600 0 0x80>,
285 <0 0x11000980 0 0x80>,
286 <0 0x11000a00 0 0x80>;
302 reg = <0 0x11005000 0 0x1000>;
307 dmas = <&apdma 0
316 reg = <0 0x11006000 0 0x1000>;
330 reg = <0 0x11007000 0 0x1000>;
344 reg = <0 0x11009000 0 0x90>,
345 <0 0x11000180 0 0x80>;
351 #size-cells = <0>;
358 reg = <0 0x1100a000 0 0x90>,
359 <0 0x11000200 0 0x80>;
365 #size-cells = <0>;
372 reg = <0 0x1100b000 0 0x90>,
373 <0 0x11000280 0 0x80>;
379 #size-cells = <0>;
387 #size-cells = <0>;
388 reg = <0 0x1100c000 0 0x1000>;
399 reg = <0 0x11120000 0 0x1000>;
410 reg = <0 0x11130000 0 0x1000>;
421 reg = <0 0x11170000 0 0x1000>;
432 reg = <0 0x11180000 0 0x1000>;
445 reg = <0 0x1020c000 0 0x100>;
452 reg = <0 0x11008000 0 0x1000>;
468 reg = <0 0x11100000 0 0x1000>;
481 reg = <0 0x11190000 0 0x1000>;
496 reg = <0 0x11110000 0 0x800>;
503 reg = <0 0x11110800 0 0x100>;
510 reg = <0 0x11110900 0 0x100>;
520 reg = <0 0x11003000 0 0x1000>;