Lines Matching +full:0 +full:x1100000
38 pinctrl-0 = <&gpio_keys_pins>;
40 key-0 {
51 reg = <0 0x40000000 0x2 0x00000000>;
61 * +-----------------------+ 0x43e0_0000
63 * +-----------------------+ 0x43c0_0000
65 * + TZDRAM +--------------+ 0x4340_0000
67 * +-----------------------+ 0x4320_0000
71 reg = <0 0x43200000 0 0x00c00000>;
76 reg = <0 0x50000000 0 0x2900000>;
82 reg = <0 0x53000000 0 0x1400000>; /* 20 MB */
88 reg = <0 0x54600000 0x0 0x200000>;
93 reg = <0 0x60000000 0 0x1100000>;
99 reg = <0 0x62000000 0 0x1400000>; /* 20 MB */
108 snps,reset-delays-us = <0 10000 80000>;
110 pinctrl-0 = <ð_default_pins>;
116 reg = <0x1>;
123 pinctrl-0 = <&i2c6_pins>;
129 reg = <0x34>;
234 pinctrl-0 = <&mmc0_default_pins>;
244 hs400-ds-delay = <0x14c11>;
252 pinctrl-0 = <&mmc1_default_pins>;
506 pinctrl-0 = <&uart0_pins>;
512 pinctrl-0 = <&uart1_pins>;