Lines Matching +full:conf +full:- +full:mdio
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
34 regulator-max-microvolt = <1800000>;
35 regulator-boot-on;
36 regulator-always-on;
39 reg_3p3v: regulator-3p3v {
40 compatible = "regulator-fixed";
41 regulator-name = "fixed-3.3V";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 regulator-boot-on;
45 regulator-always-on;
57 compatible = "mediatek,eth-mac";
59 phy-mode = "2500base-x";
61 fixed-link {
63 full-duplex;
68 mdio: mdio-bus { label
69 #address-cells = <1>;
70 #size-cells = <0>;
74 &mdio {
78 reset-gpios = <&pio 5 0>;
83 pinctrl-names = "default", "state_uhs";
84 pinctrl-0 = <&mmc0_pins_default>;
85 pinctrl-1 = <&mmc0_pins_uhs>;
86 bus-width = <8>;
87 max-frequency = <200000000>;
88 cap-mmc-highspeed;
89 mmc-hs200-1_8v;
90 mmc-hs400-1_8v;
91 hs400-ds-delay = <0x14014>;
92 vmmc-supply = <®_3p3v>;
93 vqmmc-supply = <®_1p8v>;
94 non-removable;
95 no-sd;
96 no-sdio;
100 pinctrl-names = "default";
101 pinctrl-0 = <&pcie_pins>;
110 mmc0_pins_default: mmc0-pins {
115 conf-cmd-dat {
119 input-enable;
120 drive-strength = <4>;
121 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
123 conf-clk {
125 drive-strength = <6>;
126 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
128 conf-ds {
130 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
132 conf-rst {
134 drive-strength = <4>;
135 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
139 mmc0_pins_uhs: mmc0-uhs-pins {
144 conf-cmd-dat {
148 input-enable;
149 drive-strength = <4>;
150 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
152 conf-clk {
154 drive-strength = <6>;
155 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
157 conf-ds {
159 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
161 conf-rst {
163 drive-strength = <4>;
164 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
168 pcie_pins: pcie-pins {
175 spi_flash_pins: spi-flash-pins {
182 spic_pins: spic-pins {
189 uart1_pins: uart1-pins {
196 uart2_pins: uart2-pins {
203 wf_2g_5g_pins: wf-2g-5g-pins {
208 conf {
216 drive-strength = <4>;
220 wf_dbdc_pins: wf-dbdc-pins {
225 conf {
230 drive-strength = <4>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&spi_flash_pins>;
238 cs-gpios = <0>, <0>;
241 compatible = "spi-nand";
243 spi-max-frequency = <10000000>;
244 spi-tx-buswidth = <4>;
245 spi-rx-buswidth = <4>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&spic_pins>;
252 cs-gpios = <0>, <0>;
262 #address-cells = <1>;
263 #size-cells = <0>;
294 phy-mode = "2500base-x";
296 fixed-link {
298 full-duplex;
310 pinctrl-names = "default";
311 pinctrl-0 = <&uart1_pins>;
316 pinctrl-names = "default";
317 pinctrl-0 = <&uart2_pins>;
327 pinctrl-names = "default", "dbdc";
328 pinctrl-0 = <&wf_2g_5g_pins>;
329 pinctrl-1 = <&wf_dbdc_pins>;