Lines Matching +full:0 +full:x11007000

69 		#size-cells = <0>;
71 		cpu0: cpu@0 {
74 			reg = <0x0 0x0>;
89 			reg = <0x0 0x1>;
111 		#clock-cells = <0>;
116 		#clock-cells = <0>;
140 			reg = <0 0x43000000 0 0x30000>;
150 			thermal-sensors = <&thermal 0>;
216 		reg = <0 0x10000000 0 0x1000>;
223 		reg = <0 0x10001000 0 0x250>;
236 		reg = <0 0x10002000 0 0x1000>;
245 		reg = <0 0x10006000 0 0x1000>;
257 		reg = <0 0x10009000 0 0x1000>;
271 		reg = <0 0x10200620 0 0x20>;
277 		reg = <0 0x10206000 0 0x1000>;
282 			reg = <0x198 0xc>;
289 		reg = <0 0x10209000 0 0x1000>;
296 		reg = <0 0x10210000 0 0x1000>;
303 		reg = <0 0x1020f000 0 0x1000>;
310 		reg = <0 0x10211000 0 0x1000>,
311 		      <0 0x10005000 0 0x1000>;
315 		gpio-ranges = <&pio 0 0 103>;
325 		reg = <0 0x10212000 0 0x800>;
331 		reg = <0 0x10212800 0 0x200>;
342 		reg = <0 0x10310000 0 0x1000>,
343 		      <0 0x10320000 0 0x1000>,
344 		      <0 0x10340000 0 0x2000>,
345 		      <0 0x10360000 0 0x2000>;
352 		reg = <0 0x10390000 0 0x1000>;
353 		ranges = <0 0 0x10390000 0x10000>;
358 			reg = <0x1000 0x1000>;
364 			reg = <0x4000 0x1000>;
370 			reg = <0x5000 0x1000>;
375 			reg = <0x9000 0x5000>;
386 		reg = <0 0x11001000 0 0x1000>;
395 		reg = <0 0x11002000 0 0x400>;
406 		reg = <0 0x11003000 0 0x400>;
417 		reg = <0 0x11004000 0 0x400>;
428 		reg = <0 0x11005000 0 0x400>;
438 		reg = <0 0x11006000 0 0x1000>;
456 		reg = <0 0x11007000 0 0x90>,
457 		      <0 0x11000100 0 0x80>;
464 		#size-cells = <0>;
470 		reg = <0 0x11008000 0 0x90>,
471 		      <0 0x11000180 0 0x80>;
478 		#size-cells = <0>;
484 		reg = <0 0x11009000 0 0x90>,
485 		      <0 0x11000200 0 0x80>;
492 		#size-cells = <0>;
498 		reg = <0 0x1100a000 0 0x100>;
505 		#size-cells = <0>;
512 		reg = <0 0x1100b000 0 0x1000>;
513 		interrupts = <0 78 IRQ_TYPE_LEVEL_LOW>;
528 		reg = <0 0x1100c000 0 0x1000>;
545 		reg = <0 0x1100D000 0 0x1000>;
552 		#size-cells = <0>;
558 		reg = <0 0x1100d000 0 0x1000>;
564 		#size-cells = <0>;
570 		reg = <0 0x1100e000 0 0x1000>;
580 		reg = <0 0x11014000 0 0xe0>;
585 		#size-cells = <0>;
591 		reg = <0 0x11016000 0 0x100>;
598 		#size-cells = <0>;
605 		reg = <0 0x11019000 0 0x400>;
615 		reg = <0 0x11220000 0 0x2000>;
698 			assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
704 		reg = <0 0x11230000 0 0x1000>;
716 		reg = <0 0x11240000 0 0x1000>;
728 		reg = <0 0x18000000 0 0x100000>;
740 		reg = <0 0x1a000000 0 0x1000>;
748 		reg = <0 0x1a0c0000 0 0x01000>,
749 		      <0 0x1a0c4700 0 0x0100>;
768 		reg = <0 0x1a0c4000 0 0x700>;
775 			reg = <0 0x1a0c4800 0 0x0100>;
782 			reg = <0 0x1a0c4900 0 0x0700>;
789 			reg = <0 0x1a0c5000 0 0x0100>;
799 		reg = <0 0x1a100800 0 0x1000>;
806 		reg = <0 0x1a140000 0 0x1000>;
812 		reg = <0 0x1a143000 0 0x1000>;
814 		linux,pci-domain = <0>;
829 		bus-range = <0x00 0xff>;
830 		ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>;
834 		interrupt-map-mask = <0 0 0 7>;
835 		interrupt-map = <0 0 0 1 &pcie_intc0 0>,
836 				<0 0 0 2 &pcie_intc0 1>,
837 				<0 0 0 3 &pcie_intc0 2>,
838 				<0 0 0 4 &pcie_intc0 3>;
841 			#address-cells = <0>;
849 		reg = <0 0x1a145000 0 0x1000>;
867 		bus-range = <0x00 0xff>;
868 		ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>;
872 		interrupt-map-mask = <0 0 0 7>;
873 		interrupt-map = <0 0 0 1 &pcie_intc1 0>,
874 				<0 0 0 2 &pcie_intc1 1>,
875 				<0 0 0 3 &pcie_intc1 2>,
876 				<0 0 0 4 &pcie_intc1 3>;
879 			#address-cells = <0>;
887 		reg = <0 0x1a200000 0 0x1100>;
898 		ports-implemented = <0x1>;
917 			reg = <0 0x1a243000 0 0x0100>;
926 		reg = <0 0x1af00000 0 0x70>;
932 		reg = <0 0x1b000000 0 0x1000>;
939 		reg = <0 0x1b007000 0 0x1000>;
951 		reg = <0 0x10000400 0 0x10>;
957 		reg = <0 0x1020a000 0 0x1000>;
964 		reg = <0 0x1020b000 0 0x1000>;
972 		reg = <0 0x1b100000 0 0x20000>;
1000 		#size-cells = <0>;
1007 		reg = <0 0x1b128000 0 0x3000>;