Lines Matching +full:0 +full:x001
16 #size-cells = <0>;18 cpu0: cpu@0 {21 reg = <0x000>;24 clocks = <&cpu_clk 0>;25 i-cache-size = <0xc000>;28 d-cache-size = <0x8000>;36 reg = <0x001>;39 clocks = <&cpu_clk 0>;40 i-cache-size = <0xc000>;43 d-cache-size = <0x8000>;51 cache-size = <0x80000>;