Lines Matching +full:pcie2 +full:- +full:phy

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include "armada-8040.dtsi"
13 compatible = "marvell,armada8040-db", "marvell,armada8040",
14 "marvell,armada-ap806-quad", "marvell,armada-ap806";
17 stdout-path = "serial0:115200n8";
34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
35 compatible = "regulator-fixed";
36 regulator-name = "cp0-usb3h0-vbus";
37 regulator-min-microvolt = <5000000>;
38 regulator-max-microvolt = <5000000>;
39 enable-active-high;
43 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
44 compatible = "regulator-fixed";
45 regulator-name = "cp0-usb3h1-vbus";
46 regulator-min-microvolt = <5000000>;
47 regulator-max-microvolt = <5000000>;
48 enable-active-high;
52 cp0_usb3_0_phy: cp0-usb3-0-phy {
53 compatible = "usb-nop-xceiv";
54 vcc-supply = <&cp0_reg_usb3_0_vbus>;
57 cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus {
58 compatible = "regulator-fixed";
59 regulator-name = "cp1-usb3h0-vbus";
60 regulator-min-microvolt = <5000000>;
61 regulator-max-microvolt = <5000000>;
62 enable-active-high;
66 cp1_usb3_0_phy: cp1-usb3-0-phy {
67 compatible = "usb-nop-xceiv";
68 vcc-supply = <&cp1_reg_usb3_0_vbus>;
76 compatible = "jedec,spi-nor";
78 spi-max-frequency = <10000000>;
81 compatible = "fixed-partitions";
82 #address-cells = <1>;
83 #size-cells = <1>;
86 label = "U-Boot";
97 /* Accessible over the mini-USB CON9 connector on the main board */
100 pinctrl-0 = <&uart0_pins>;
101 pinctrl-names = "default";
107 phy-names = "cp0-pcie0-x1-phy";
114 phy-names = "cp0-pcie2-x1-phy";
120 clock-frequency = <100000>;
125 pinctrl-names = "default";
126 gpio-controller;
127 #gpio-cells = <2>;
134 pinctrl-names = "default";
135 gpio-controller;
136 #gpio-cells = <2>;
146 sata-port@0 {
148 phy-names = "cp0-sata0-0-phy";
150 sata-port@1 {
152 phy-names = "cp0-sata0-1-phy";
162 usb-phy = <&cp0_usb3_0_phy>;
164 phy-names = "utmi";
171 compatible = "usb-a-connector";
172 phy-supply = <&cp0_reg_usb3_1_vbus>;
179 phy-names = "usb", "utmi";
187 phy1: ethernet-phy@1 {
198 phy-mode = "10gbase-r";
200 fixed-link {
202 full-duplex;
208 phy = <&phy1>;
209 phy-mode = "rgmii-id";
215 phy-names = "cp1-pcie0-x1-phy";
222 phy-names = "cp1-pcie1-x1-phy";
229 phy-names = "cp1-pcie2-x1-phy";
235 clock-frequency = <100000>;
242 compatible = "jedec,spi-nor";
244 spi-max-frequency = <20000000>;
247 compatible = "fixed-partitions";
248 #address-cells = <1>;
249 #size-cells = <1>;
268 * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
272 pinctrl-0 = <&nand_pins>, <&nand_rb>;
273 pinctrl-names = "default";
277 nand-rb = <0>;
278 nand-on-flash-bbt;
279 nand-ecc-strength = <4>;
280 nand-ecc-step-size = <512>;
283 compatible = "fixed-partitions";
284 #address-cells = <1>;
285 #size-cells = <1>;
288 label = "U-Boot";
307 sata-port@0 {
309 phy-names = "cp1-sata0-0-phy";
311 sata-port@1 {
313 phy-names = "cp1-sata0-1-phy";
323 usb-phy = <&cp1_usb3_0_phy>;
325 phy-names = "utmi";
333 phy-names = "utmi";
340 phy0: ethernet-phy@0 {
351 phy-mode = "10gbase-r";
353 fixed-link {
355 full-duplex;
361 phy = <&phy0>;
362 phy-mode = "rgmii-id";
367 bus-width = <4>;
368 non-removable;
373 bus-width = <8>;
374 non-removable;