Lines Matching +full:miso +full:- +full:pins
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 stdout-path = "serial0:115200n8";
35 compatible = "pwm-fan";
37 cooling-levels = <0 51 102 153 204 255>;
38 #cooling-cells = <2>;
39 pinctrl-names = "default";
40 pinctrl-0 = <&cp0_fan_pwm_pins>;
44 v_3_3: regulator-3-3v {
45 compatible = "regulator-fixed";
46 regulator-name = "v_3_3";
47 regulator-min-microvolt = <3300000>;
48 regulator-max-microvolt = <3300000>;
49 regulator-always-on;
53 v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
54 compatible = "regulator-fixed";
56 pinctrl-names = "default";
57 pinctrl-0 = <&cp0_xhci_vbus_pins>;
58 regulator-name = "v_5v0_usb3_hst_vbus";
59 regulator-min-microvolt = <5000000>;
60 regulator-max-microvolt = <5000000>;
64 sfp_cp0_eth0: sfp-cp0-eth0 {
66 i2c-bus = <&cp0_i2c1>;
67 mod-def0-gpios = <&cp0_gpio2 17 GPIO_ACTIVE_LOW>;
68 tx-disable-gpios = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>;
69 pinctrl-names = "default";
70 pinctrl-0 = <&cp0_sfp_present_pins &cp1_sfp_tx_disable_pins>;
71 maximum-power-milliwatt = <2000>;
75 compatible = "gpio-leds";
76 pinctrl-0 = <&cp0_led0_pins
78 pinctrl-names = "default";
81 label = "clearfog-gt-8k:green:led0";
83 default-state = "on";
86 label = "clearfog-gt-8k:green:led1";
88 default-state = "on";
93 compatible = "gpio-keys";
94 pinctrl-0 = <&cp0_gpio_reset_pins &cp1_wps_button_pins>;
95 pinctrl-names = "default";
97 button-0 {
101 linux,can-disable;
105 button-1 {
109 linux,can-disable;
116 polling-delay = <1000>; /* milliseconds */
118 ap_active: trip-active {
124 cooling-maps {
127 cooling-device = <&fan THERMAL_NO_LIMIT 4>;
131 cooling-device = <&fan 4 5>;
137 polling-delay = <1000>; /* milliseconds */
139 cp0_active0: trip-active0 {
144 cp0_active1: trip-active1 {
149 cp0_active2: trip-active2 {
154 cp0_active3: trip-active3 {
160 cooling-maps {
163 cooling-device = <&fan 0 1>;
167 cooling-device = <&fan 1 2>;
171 cooling-device = <&fan 2 3>;
175 cooling-device = <&fan 3 4>;
179 cooling-device = <&fan 4 5>;
185 polling-delay = <1000>; /* milliseconds */
187 cp1_active0: trip-active0 {
192 cp1_active1: trip-active1 {
197 cp1_active2: trip-active2 {
202 cp1_active3: trip-active3 {
208 cooling-maps {
211 cooling-device = <&fan 0 1>;
215 cooling-device = <&fan 1 2>;
219 cooling-device = <&fan 2 3>;
223 cooling-device = <&fan 3 4>;
227 cooling-device = <&fan 4 5>;
234 pinctrl-0 = <&uart0_pins>;
235 pinctrl-names = "default";
239 bus-width = <8>;
240 no-1-8-v;
241 no-sd;
242 no-sdio;
243 non-removable;
245 vqmmc-supply = <&v_3_3>;
249 clock-frequency = <100000>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&cp0_i2c0_pins>;
256 clock-frequency = <100000>;
257 pinctrl-names = "default";
258 pinctrl-0 = <&cp0_i2c1_pins>;
265 * [0-31] = 0xff: Keep default CP0_shared_pins:
271 * [35-38] CP0 I2C1 and I2C0
284 * [56-61] Micro SD
287 cp0_pci0_reset_pins: pci0-reset-pins {
288 marvell,pins = "mpp32";
292 cp0_pci1_reset_pins: pci1-reset-pins {
293 marvell,pins = "mpp33";
297 cp0_pci2_reset_pins: pci2-reset-pins {
298 marvell,pins = "mpp34";
302 cp0_i2c1_pins: i2c1-pins {
303 marvell,pins = "mpp35", "mpp36";
307 cp0_i2c0_pins: i2c0-pins {
308 marvell,pins = "mpp37", "mpp38";
312 cp0_gpio_reset_pins: gpio-reset-pins {
313 marvell,pins = "mpp39";
317 cp0_led0_pins: led0-pins {
318 marvell,pins = "mpp40";
322 cp0_led1_pins: led1-pins {
323 marvell,pins = "mpp41";
327 cp0_copper_eth_phy_reset: copper-eth-phy-reset {
328 marvell,pins = "mpp43";
332 cp0_xhci_vbus_pins: xhci0-vbus-pins {
333 marvell,pins = "mpp47";
337 cp0_fan_pwm_pins: fan-pwm-pins {
338 marvell,pins = "mpp48";
342 cp0_sfp_present_pins: sfp-present-pins {
343 marvell,pins = "mpp49";
347 cp0_tpm_irq_pins: tpm-irq-pins {
348 marvell,pins = "mpp50";
352 cp0_wlan_disable_pins: wlan-disable-pins {
353 marvell,pins = "mpp51";
357 cp0_sdhci_pins: sdhci-pins {
358 marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
365 pinctrl-names = "default";
366 pinctrl-0 = <&cp0_pci0_reset_pins &cp0_wlan_disable_pins>;
367 reset-gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
369 phy-names = "cp0-pcie0-x1-phy";
375 gpio-hog;
377 output-high;
381 gpio-hog;
383 output-low;
387 gpio-hog;
389 output-low;
393 gpio-hog;
395 output-low;
406 phy-mode = "10gbase-r";
407 managed = "in-band-status";
413 broken-cd;
414 bus-width = <4>;
415 pinctrl-names = "default";
416 pinctrl-0 = <&cp0_sdhci_pins>;
418 vqmmc-supply = <&v_3_3>;
428 * [0-5] TDM
432 * [9.11]CP1 SPI0 MOSI/MISO/CLK
433 * [13] CP1 SPI1 MISO (TDM and SPI ROM shared)
446 cp1_spi1_pins: spi1-pins {
447 marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
451 cp1_switch_reset_pins: switch-reset-pins {
452 marvell,pins = "mpp24";
456 cp1_ge_mdio_pins: ge-mdio-pins {
457 marvell,pins = "mpp27", "mpp28";
461 cp1_sfp_tx_disable_pins: sfp-tx-disable-pins {
462 marvell,pins = "mpp29";
466 cp1_wps_button_pins: wps-button-pins {
467 marvell,pins = "mpp30";
473 pinctrl-0 = <&cp0_pci1_reset_pins>;
476 sata-port@1 {
478 phy-names = "cp1-sata0-1-phy";
483 pinctrl-names = "default";
484 pinctrl-0 = <&cp1_ge_mdio_pins>;
487 ge_phy: ethernet-phy@0 {
488 /* LED0 - GB link
489 * LED1 - on: link, blink: activity
491 marvell,reg-init = <3 16 0 0x1017>;
493 pinctrl-names = "default";
494 pinctrl-0 = <&cp0_copper_eth_phy_reset>;
495 reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
496 reset-assert-us = <10000>;
497 reset-deassert-us = <10000>;
500 switch0: ethernet-switch@4 {
503 pinctrl-names = "default";
504 pinctrl-0 = <&cp1_switch_reset_pins>;
505 reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>;
507 ethernet-ports {
508 #address-cells = <1>;
509 #size-cells = <0>;
511 ethernet-port@1 {
514 phy-handle = <&switch0phy0>;
517 ethernet-port@2 {
520 phy-handle = <&switch0phy1>;
523 ethernet-port@3 {
526 phy-handle = <&switch0phy2>;
529 ethernet-port@4 {
532 phy-handle = <&switch0phy3>;
535 ethernet-port@5 {
539 phy-mode = "2500base-x";
540 managed = "in-band-status";
545 #address-cells = <1>;
546 #size-cells = <0>;
548 switch0phy0: ethernet-phy@11 {
552 switch0phy1: ethernet-phy@12 {
556 switch0phy2: ethernet-phy@13 {
560 switch0phy3: ethernet-phy@14 {
574 phy-mode = "sgmii";
582 phy-mode = "2500base-x";
584 managed = "in-band-status";
588 pinctrl-names = "default";
589 pinctrl-0 = <&cp1_spi1_pins>;
594 spi-max-frequency = <50000000>;
601 compatible = "usb-a-connector";
602 phy-supply = <&v_5v0_usb3_hst_vbus>;
608 phy-names = "cp1-usb3h0-comphy";