Lines Matching +full:0 +full:xffd71000
25 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0 0x0>;
68 reg = <0x0 0x1>;
75 reg = <0x0 0x2>;
82 reg = <0x0 0x3>;
89 reg = <0x0 0x100>;
96 reg = <0x0 0x101>;
103 reg = <0x0 0x102>;
110 reg = <0x0 0x103>;
117 reg = <0x0 0xe82b1000 0 0x1000>, /* GICD */
118 <0x0 0xe82b2000 0 0x2000>, /* GICC */
119 <0x0 0xe82b4000 0 0x2000>, /* GICH */
120 <0x0 0xe82b6000 0 0x2000>; /* GICV */
122 #address-cells = <0>;
150 reg = <0x0 0xfff35000 0x0 0x1000>;
163 reg = <0x0 0xe8a09000 0x0 0x1000>;
169 reg = <0x0 0xfff34000 0x0 0x1000>;
175 reg = <0x0 0xfff0a000 0x0 0x1000>;
181 reg = <0x0 0xffd7e000 0x0 0x1000>;
187 reg = <0x0 0xe87ff000 0x0 0x1000>;
193 reg = <0x0 0xe8900000 0x0 0x1000>;
205 reg = <0x0 0xfdf02000 0x0 0x1000>;
211 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
217 reg = <0x0 0xfdf00000 0x0 0x1000>;
227 reg = <0x0 0xfdf03000 0x0 0x1000>;
233 pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
239 reg = <0x0 0xffd74000 0x0 0x1000>;
245 pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
251 reg = <0x0 0xfdf01000 0x0 0x1000>;
257 pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
263 reg = <0x0 0xfdf05000 0x0 0x1000>;
273 reg = <0x0 0xfff32000 0x0 0x1000>;
279 pinctrl-0 = <&uart6_pmx_func &uart6_cfg_func>;
285 reg = <0x0 0xe8a0b000 0x0 0x1000>;
289 gpio-ranges = <&pmx0 1 0 1 &pmx0 3 1 5>;
298 reg = <0x0 0xe8a0c000 0x0 0x1000>;
310 reg = <0x0 0xe8a0d000 0x0 0x1000>;
323 reg = <0x0 0xe8a0e000 0x0 0x1000>;
327 gpio-ranges = <&pmx0 0 13 4 &pmx0 7 17 1>;
336 reg = <0x0 0xe8a0f000 0x0 0x1000>;
340 gpio-ranges = <&pmx0 0 18 8>;
349 reg = <0x0 0xe8a10000 0x0 0x1000>;
353 gpio-ranges = <&pmx0 0 26 8>;
362 reg = <0x0 0xe8a11000 0x0 0x1000>;
375 reg = <0x0 0xe8a12000 0x0 0x1000>;
379 gpio-ranges = <&pmx0 0 41 8>;
388 reg = <0x0 0xe8a13000 0x0 0x1000>;
392 gpio-ranges = <&pmx0 0 49 8>;
401 reg = <0x0 0xe8a14000 0x0 0x1000>;
405 gpio-ranges = <&pmx0 0 57 8>;
414 reg = <0x0 0xe8a15000 0x0 0x1000>;
418 gpio-ranges = <&pmx0 0 65 8>;
427 reg = <0x0 0xe8a16000 0x0 0x1000>;
431 gpio-ranges = <&pmx0 0 73 8>;
440 reg = <0x0 0xe8a17000 0x0 0x1000>;
444 gpio-ranges = <&pmx0 0 81 1>;
453 reg = <0x0 0xe8a18000 0x0 0x1000>;
465 reg = <0x0 0xe8a19000 0x0 0x1000>;
477 reg = <0x0 0xe8a1a000 0x0 0x1000>;
489 reg = <0x0 0xe8a1b000 0x0 0x1000>;
493 gpio-ranges = <&pmx5 0 0 8>;
502 reg = <0x0 0xe8a1c000 0x0 0x1000>;
506 gpio-ranges = <&pmx5 0 8 2>;
515 reg = <0x0 0xfff28000 0x0 0x1000>;
528 reg = <0x0 0xfff29000 0x0 0x1000>;
532 gpio-ranges = <&pmx1 0 61 2>;
541 reg = <0x0 0xe8a1f000 0x0 0x1000>;
545 gpio-ranges = <&pmx7 0 0 8>;
554 reg = <0x0 0xe8a20000 0x0 0x1000>;
558 gpio-ranges = <&pmx7 0 8 4>;
567 reg = <0x0 0xfff0b000 0x0 0x1000>;
572 gpio-ranges = <&pmx1 2 0 6>;
581 reg = <0x0 0xfff0c000 0x0 0x1000>;
586 gpio-ranges = <&pmx1 0 6 8>;
595 reg = <0x0 0xfff0d000 0x0 0x1000>;
600 gpio-ranges = <&pmx1 0 14 8>;
609 reg = <0x0 0xfff0e000 0x0 0x1000>;
614 gpio-ranges = <&pmx1 0 22 8>;
623 reg = <0x0 0xfff0f000 0x0 0x1000>;
628 gpio-ranges = <&pmx1 0 30 1>;
637 reg = <0x0 0xfff10000 0x0 0x1000>;
651 reg = <0x0 0xfff1d000 0x0 0x1000>;
665 /* 0: HCI standard */
667 reg = <0x0 0xff3c0000 0x0 0x1000>,
668 <0x0 0xff3e0000 0x0 0x1000>;
674 freq-table-hz = <0 0>,
675 <0 0>;
676 /* offset: 0x84; bit: 12 */
677 resets = <&crg_rst 0x84 12>;
685 reg = <0x0 0xff37f000 0x0 0x1000>;
687 #size-cells = <0>;
693 resets = <&crg_rst 0x94 18>;
704 reg = <0x0 0xfc183000 0x0 0x1000>;
706 #size-cells = <0>;
712 resets = <&crg_rst 0x94 20>;
721 reg = <0x0 0xffd71000 0x0 0x1000>;
724 #size-cells = <0>;
727 resets = <&iomcu_rst 0x20 3>;
729 pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
735 reg = <0x0 0xffd72000 0x0 0x1000>;
738 #size-cells = <0>;
741 resets = <&iomcu_rst 0x20 4>;
743 pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
749 reg = <0x0 0xffd73000 0x0 0x1000>;
752 #size-cells = <0>;
755 resets = <&iomcu_rst 0x20 5>;
757 pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>;
763 reg = <0x0 0xfdf0c000 0x0 0x1000>;
766 #size-cells = <0>;
769 resets = <&crg_rst 0x78 7>;
771 pinctrl-0 = <&i2c3_pmx_func &i2c3_cfg_func>;
777 reg = <0x0 0xfdf0d000 0x0 0x1000>;
780 #size-cells = <0>;
783 resets = <&crg_rst 0x78 27>;
785 pinctrl-0 = <&i2c4_pmx_func &i2c4_cfg_func>;