Lines Matching +full:imx7ulp +full:- +full:usdhc
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/fsl,imx93-power.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "imx93-pinfunc.h"
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
47 #address-cells = <1>;
48 #size-cells = <0>;
50 idle-states {
51 entry-method = "psci";
53 cpu_pd_wait: cpu-pd-wait {
54 compatible = "arm,idle-state";
55 arm,psci-suspend-param = <0x0010033>;
56 local-timer-stop;
57 entry-latency-us = <10000>;
58 exit-latency-us = <7000>;
59 min-residency-us = <27000>;
60 wakeup-latency-us = <15000>;
66 compatible = "arm,cortex-a55";
68 enable-method = "psci";
69 #cooling-cells = <2>;
70 cpu-idle-states = <&cpu_pd_wait>;
75 compatible = "arm,cortex-a55";
77 enable-method = "psci";
78 #cooling-cells = <2>;
79 cpu-idle-states = <&cpu_pd_wait>;
84 osc_32k: clock-osc-32k {
85 compatible = "fixed-clock";
86 #clock-cells = <0>;
87 clock-frequency = <32768>;
88 clock-output-names = "osc_32k";
91 osc_24m: clock-osc-24m {
92 compatible = "fixed-clock";
93 #clock-cells = <0>;
94 clock-frequency = <24000000>;
95 clock-output-names = "osc_24m";
98 clk_ext1: clock-ext1 {
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <133000000>;
102 clock-output-names = "clk_ext1";
106 compatible = "arm,cortex-a55-pmu";
111 compatible = "arm,psci-1.0";
116 compatible = "arm,armv8-timer";
121 clock-frequency = <24000000>;
122 arm,no-tick-in-suspend;
123 interrupt-parent = <&gic>;
126 gic: interrupt-controller@48000000 {
127 compatible = "arm,gic-v3";
130 #interrupt-cells = <3>;
131 interrupt-controller;
133 interrupt-parent = <&gic>;
136 thermal-zones {
137 cpu-thermal {
138 polling-delay-passive = <250>;
139 polling-delay = <2000>;
141 thermal-sensors = <&tmu 0>;
144 cpu_alert: cpu-alert {
150 cpu_crit: cpu-crit {
157 cooling-maps {
160 cooling-device =
168 cm33: remoteproc-cm33 {
169 compatible = "fsl,imx93-cm33";
175 compatible = "fsl,imx93-mqs";
181 compatible = "fsl,imx93-mqs";
187 compatible = "simple-bus";
188 #address-cells = <1>;
189 #size-cells = <1>;
194 compatible = "fsl,aips-bus", "simple-bus";
196 #address-cells = <1>;
197 #size-cells = <1>;
200 edma1: dma-controller@44000000 {
201 compatible = "fsl,imx93-edma3";
203 #dma-cells = <3>;
204 dma-channels = <31>;
237 clock-names = "dma";
241 compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
246 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
250 #mbox-cells = <2>;
255 compatible = "nxp,sysctr-timer";
259 clock-names = "per";
260 nxp,no-divider;
264 compatible = "fsl,imx93-wdt";
268 timeout-sec = <40>;
273 compatible = "fsl,imx93-wdt";
277 timeout-sec = <40>;
282 compatible = "fsl,imx7ulp-pwm";
285 #pwm-cells = <3>;
290 compatible = "fsl,imx7ulp-pwm";
293 #pwm-cells = <3>;
297 i3c1: i3c-master@44330000 {
298 compatible = "silvaco,i3c-master-v1";
301 #address-cells = <3>;
302 #size-cells = <0>;
306 clock-names = "pclk", "fast_clk", "slow_clk";
311 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
313 #address-cells = <1>;
314 #size-cells = <0>;
318 clock-names = "per", "ipg";
323 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
325 #address-cells = <1>;
326 #size-cells = <0>;
330 clock-names = "per", "ipg";
335 #address-cells = <1>;
336 #size-cells = <0>;
337 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
342 clock-names = "per", "ipg";
347 #address-cells = <1>;
348 #size-cells = <0>;
349 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
354 clock-names = "per", "ipg";
359 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
363 clock-names = "ipg";
365 dma-names = "rx", "tx";
370 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
374 clock-names = "ipg";
376 dma-names = "rx", "tx";
381 compatible = "fsl,imx93-flexcan";
386 clock-names = "ipg", "per";
387 assigned-clocks = <&clk IMX93_CLK_CAN1>;
388 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
389 assigned-clock-rates = <40000000>;
390 fsl,clk-source = /bits/ 8 <0>;
391 fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
396 compatible = "fsl,imx93-sai";
402 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
404 dma-names = "rx", "tx";
409 compatible = "fsl,imx93-iomuxc";
415 compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";
419 compatible = "nxp,imx93-bbnsm-rtc";
424 compatible = "nxp,imx93-bbnsm-pwrkey";
430 clk: clock-controller@44450000 {
431 compatible = "fsl,imx93-ccm";
433 #clock-cells = <1>;
435 clock-names = "osc_32k", "osc_24m", "clk_ext1";
436 assigned-clocks = <&clk IMX93_CLK_AUDIO_PLL>;
437 assigned-clock-rates = <393216000>;
441 src: system-controller@44460000 {
442 compatible = "fsl,imx93-src", "syscon";
444 #address-cells = <1>;
445 #size-cells = <1>;
448 mlmix: power-domain@44461800 {
449 compatible = "fsl,imx93-src-slice";
451 #power-domain-cells = <0>;
456 mediamix: power-domain@44462400 {
457 compatible = "fsl,imx93-src-slice";
459 #power-domain-cells = <0>;
465 clock-controller@44480000 {
466 compatible = "fsl,imx93-anatop";
468 #clock-cells = <1>;
472 compatible = "fsl,qoriq-tmu";
476 little-endian;
477 fsl,tmu-range = <0x800000da 0x800000e9
481 fsl,tmu-calibration = <0x00000000 0x0000000e
488 #thermal-sensor-cells = <1>;
492 compatible = "fsl,imx93-micfil";
501 clock-names = "ipg_clk", "ipg_clk_app", "pll8k";
503 dma-names = "rx";
508 compatible = "nxp,imx93-adc";
515 clock-names = "ipg";
516 #io-channel-cells = <1>;
522 compatible = "fsl,aips-bus", "simple-bus";
524 #address-cells = <1>;
525 #size-cells = <1>;
528 edma2: dma-controller@42000000 {
529 compatible = "fsl,imx93-edma4";
531 #dma-cells = <3>;
532 dma-channels = <64>;
598 clock-names = "dma";
602 compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";
607 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
611 #mbox-cells = <2>;
616 compatible = "fsl,imx93-wdt";
620 timeout-sec = <40>;
625 compatible = "fsl,imx93-wdt";
629 timeout-sec = <40>;
634 compatible = "fsl,imx93-wdt";
638 timeout-sec = <40>;
643 compatible = "fsl,imx7ulp-pwm";
646 #pwm-cells = <3>;
651 compatible = "fsl,imx7ulp-pwm";
654 #pwm-cells = <3>;
659 compatible = "fsl,imx7ulp-pwm";
662 #pwm-cells = <3>;
667 compatible = "fsl,imx7ulp-pwm";
670 #pwm-cells = <3>;
674 i3c2: i3c-master@42520000 {
675 compatible = "silvaco,i3c-master-v1";
678 #address-cells = <3>;
679 #size-cells = <0>;
683 clock-names = "pclk", "fast_clk", "slow_clk";
688 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
690 #address-cells = <1>;
691 #size-cells = <0>;
695 clock-names = "per", "ipg";
700 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
702 #address-cells = <1>;
703 #size-cells = <0>;
707 clock-names = "per", "ipg";
712 #address-cells = <1>;
713 #size-cells = <0>;
714 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
719 clock-names = "per", "ipg";
724 #address-cells = <1>;
725 #size-cells = <0>;
726 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
731 clock-names = "per", "ipg";
736 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
740 clock-names = "ipg";
742 dma-names = "rx", "tx";
747 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
751 clock-names = "ipg";
753 dma-names = "rx", "tx";
758 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
762 clock-names = "ipg";
764 dma-names = "rx", "tx";
769 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
773 clock-names = "ipg";
775 dma-names = "rx", "tx";
780 compatible = "fsl,imx93-flexcan";
785 clock-names = "ipg", "per";
786 assigned-clocks = <&clk IMX93_CLK_CAN2>;
787 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
788 assigned-clock-rates = <40000000>;
789 fsl,clk-source = /bits/ 8 <0>;
790 fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
795 compatible = "nxp,imx8mm-fspi";
797 reg-names = "fspi_base", "fspi_mmap";
798 #address-cells = <1>;
799 #size-cells = <0>;
803 clock-names = "fspi_en", "fspi";
804 assigned-clocks = <&clk IMX93_CLK_FLEXSPI1>;
805 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
810 compatible = "fsl,imx93-sai";
816 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
818 dma-names = "rx", "tx";
823 compatible = "fsl,imx93-sai";
829 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
831 dma-names = "rx", "tx";
836 compatible = "fsl,imx93-xcvr";
841 reg-names = "ram", "regs", "rxfifo", "txfifo";
848 clock-names = "ipg", "phy", "spba", "pll_ipg";
850 dma-names = "rx", "tx";
855 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
859 clock-names = "ipg";
861 dma-names = "rx", "tx";
866 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
870 clock-names = "ipg";
872 dma-names = "rx", "tx";
877 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
879 #address-cells = <1>;
880 #size-cells = <0>;
884 clock-names = "per", "ipg";
889 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
891 #address-cells = <1>;
892 #size-cells = <0>;
896 clock-names = "per", "ipg";
901 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
903 #address-cells = <1>;
904 #size-cells = <0>;
908 clock-names = "per", "ipg";
913 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
915 #address-cells = <1>;
916 #size-cells = <0>;
920 clock-names = "per", "ipg";
925 #address-cells = <1>;
926 #size-cells = <0>;
927 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
932 clock-names = "per", "ipg";
937 #address-cells = <1>;
938 #size-cells = <0>;
939 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
944 clock-names = "per", "ipg";
949 #address-cells = <1>;
950 #size-cells = <0>;
951 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
956 clock-names = "per", "ipg";
961 #address-cells = <1>;
962 #size-cells = <0>;
963 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
968 clock-names = "per", "ipg";
975 compatible = "fsl,aips-bus", "simple-bus";
977 #address-cells = <1>;
978 #size-cells = <1>;
982 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
988 clock-names = "ipg", "ahb", "per";
989 bus-width = <8>;
990 fsl,tuning-start-tap = <1>;
991 fsl,tuning-step = <2>;
996 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1002 clock-names = "ipg", "ahb", "per";
1003 bus-width = <4>;
1004 fsl,tuning-start-tap = <1>;
1005 fsl,tuning-step = <2>;
1010 compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
1021 clock-names = "ipg", "ahb", "ptp",
1023 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
1026 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
1029 assigned-clock-rates = <100000000>, <250000000>, <50000000>;
1030 fsl,num-tx-queues = <3>;
1031 fsl,num-rx-queues = <3>;
1032 fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>;
1037 compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
1041 interrupt-names = "macirq", "eth_wake_irq";
1047 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
1048 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
1050 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
1052 assigned-clock-rates = <100000000>, <250000000>;
1054 snps,clk-csr = <0>;
1059 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1065 clock-names = "ipg", "ahb", "per";
1066 bus-width = <4>;
1067 fsl,tuning-start-tap = <1>;
1068 fsl,tuning-step = <2>;
1074 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1076 gpio-controller;
1077 #gpio-cells = <2>;
1080 interrupt-controller;
1081 #interrupt-cells = <2>;
1084 clock-names = "gpio", "port";
1085 gpio-ranges = <&iomuxc 0 4 30>;
1089 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1091 gpio-controller;
1092 #gpio-cells = <2>;
1095 interrupt-controller;
1096 #interrupt-cells = <2>;
1099 clock-names = "gpio", "port";
1100 gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
1105 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1107 gpio-controller;
1108 #gpio-cells = <2>;
1111 interrupt-controller;
1112 #interrupt-cells = <2>;
1115 clock-names = "gpio", "port";
1116 gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
1120 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1122 gpio-controller;
1123 #gpio-cells = <2>;
1126 interrupt-controller;
1127 #interrupt-cells = <2>;
1130 clock-names = "gpio", "port";
1131 gpio-ranges = <&iomuxc 0 92 16>;
1135 compatible = "fsl,imx93-ocotp", "syscon";
1137 #address-cells = <1>;
1138 #size-cells = <1>;
1142 compatible = "fsl,imx93-mu-s4";
1146 interrupt-names = "tx", "rx";
1147 #mbox-cells = <2>;
1150 media_blk_ctrl: system-controller@4ac10000 {
1151 compatible = "fsl,imx93-media-blk-ctrl", "syscon";
1153 power-domains = <&mediamix>;
1164 clock-names = "apb", "axi", "nic", "disp", "cam",
1166 #power-domain-cells = <1>;
1170 ddr-pmu@4e300dc0 {
1171 compatible = "fsl,imx93-ddr-pmu";