Lines Matching +full:imx7ulp +full:- +full:pinfunc
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
56 #address-cells = <1>;
57 #size-cells = <0>;
59 idle-states {
60 entry-method = "psci";
62 cpu_pd_wait: cpu-pd-wait {
63 compatible = "arm,idle-state";
64 arm,psci-suspend-param = <0x0010033>;
65 local-timer-stop;
66 entry-latency-us = <10000>;
67 exit-latency-us = <7000>;
68 min-residency-us = <27000>;
69 wakeup-latency-us = <15000>;
75 compatible = "arm,cortex-a55";
77 enable-method = "psci";
78 #cooling-cells = <2>;
79 cpu-idle-states = <&cpu_pd_wait>;
80 i-cache-size = <32768>;
81 i-cache-line-size = <64>;
82 i-cache-sets = <128>;
83 d-cache-size = <32768>;
84 d-cache-line-size = <64>;
85 d-cache-sets = <128>;
86 next-level-cache = <&l2_cache_l0>;
91 compatible = "arm,cortex-a55";
93 enable-method = "psci";
94 #cooling-cells = <2>;
95 cpu-idle-states = <&cpu_pd_wait>;
96 i-cache-size = <32768>;
97 i-cache-line-size = <64>;
98 i-cache-sets = <128>;
99 d-cache-size = <32768>;
100 d-cache-line-size = <64>;
101 d-cache-sets = <128>;
102 next-level-cache = <&l2_cache_l1>;
105 l2_cache_l0: l2-cache-l0 {
107 cache-size = <65536>;
108 cache-line-size = <64>;
109 cache-sets = <256>;
110 cache-level = <2>;
111 cache-unified;
112 next-level-cache = <&l3_cache>;
115 l2_cache_l1: l2-cache-l1 {
117 cache-size = <65536>;
118 cache-line-size = <64>;
119 cache-sets = <256>;
120 cache-level = <2>;
121 cache-unified;
122 next-level-cache = <&l3_cache>;
125 l3_cache: l3-cache {
127 cache-size = <262144>;
128 cache-line-size = <64>;
129 cache-sets = <256>;
130 cache-level = <3>;
131 cache-unified;
135 osc_32k: clock-osc-32k {
136 compatible = "fixed-clock";
137 #clock-cells = <0>;
138 clock-frequency = <32768>;
139 clock-output-names = "osc_32k";
142 osc_24m: clock-osc-24m {
143 compatible = "fixed-clock";
144 #clock-cells = <0>;
145 clock-frequency = <24000000>;
146 clock-output-names = "osc_24m";
149 clk_ext1: clock-ext1 {
150 compatible = "fixed-clock";
151 #clock-cells = <0>;
152 clock-frequency = <133000000>;
153 clock-output-names = "clk_ext1";
157 compatible = "arm,cortex-a55-pmu";
162 compatible = "arm,psci-1.0";
167 compatible = "arm,armv8-timer";
172 clock-frequency = <24000000>;
173 arm,no-tick-in-suspend;
174 interrupt-parent = <&gic>;
177 gic: interrupt-controller@48000000 {
178 compatible = "arm,gic-v3";
181 #interrupt-cells = <3>;
182 interrupt-controller;
184 interrupt-parent = <&gic>;
187 thermal-zones {
188 cpu-thermal {
189 polling-delay-passive = <250>;
190 polling-delay = <2000>;
192 thermal-sensors = <&tmu 0>;
195 cpu_alert: cpu-alert {
201 cpu_crit: cpu-crit {
208 cooling-maps {
211 cooling-device =
219 cm33: remoteproc-cm33 {
220 compatible = "fsl,imx93-cm33";
226 compatible = "fsl,imx93-mqs";
232 compatible = "fsl,imx93-mqs";
238 compatible = "usb-nop-xceiv";
239 #phy-cells = <0>;
241 clock-names = "main_clk";
245 compatible = "usb-nop-xceiv";
246 #phy-cells = <0>;
248 clock-names = "main_clk";
252 compatible = "simple-bus";
253 #address-cells = <1>;
254 #size-cells = <1>;
259 compatible = "fsl,aips-bus", "simple-bus";
261 #address-cells = <1>;
262 #size-cells = <1>;
265 edma1: dma-controller@44000000 {
266 compatible = "fsl,imx93-edma3";
268 #dma-cells = <3>;
269 dma-channels = <31>;
303 clock-names = "dma";
307 compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
312 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
316 #mbox-cells = <2>;
321 compatible = "nxp,sysctr-timer";
325 clock-names = "per";
326 nxp,no-divider;
330 compatible = "fsl,imx93-wdt";
334 timeout-sec = <40>;
339 compatible = "fsl,imx93-wdt";
343 timeout-sec = <40>;
348 compatible = "fsl,imx7ulp-pwm";
351 #pwm-cells = <3>;
356 compatible = "fsl,imx7ulp-pwm";
359 #pwm-cells = <3>;
364 compatible = "silvaco,i3c-master-v1";
367 #address-cells = <3>;
368 #size-cells = <0>;
372 clock-names = "pclk", "fast_clk", "slow_clk";
377 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
379 #address-cells = <1>;
380 #size-cells = <0>;
384 clock-names = "per", "ipg";
386 dma-names = "tx", "rx";
391 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
393 #address-cells = <1>;
394 #size-cells = <0>;
398 clock-names = "per", "ipg";
400 dma-names = "tx", "rx";
405 #address-cells = <1>;
406 #size-cells = <0>;
407 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
412 clock-names = "per", "ipg";
414 dma-names = "tx", "rx";
419 #address-cells = <1>;
420 #size-cells = <0>;
421 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
426 clock-names = "per", "ipg";
428 dma-names = "tx", "rx";
433 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
437 clock-names = "ipg";
439 dma-names = "rx", "tx";
444 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
448 clock-names = "ipg";
450 dma-names = "rx", "tx";
455 compatible = "fsl,imx93-flexcan";
460 clock-names = "ipg", "per";
461 assigned-clocks = <&clk IMX93_CLK_CAN1>;
462 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
463 assigned-clock-rates = <40000000>;
464 fsl,clk-source = /bits/ 8 <0>;
465 fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
470 compatible = "fsl,imx93-sai";
476 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
478 dma-names = "rx", "tx";
479 #sound-dai-cells = <0>;
484 compatible = "fsl,imx93-iomuxc";
490 compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";
494 compatible = "nxp,imx93-bbnsm-rtc";
499 compatible = "nxp,imx93-bbnsm-pwrkey";
505 clk: clock-controller@44450000 {
506 compatible = "fsl,imx93-ccm";
508 #clock-cells = <1>;
510 clock-names = "osc_32k", "osc_24m", "clk_ext1";
511 assigned-clocks = <&clk IMX93_CLK_AUDIO_PLL>;
512 assigned-clock-rates = <393216000>;
516 src: system-controller@44460000 {
517 compatible = "fsl,imx93-src", "syscon";
519 #address-cells = <1>;
520 #size-cells = <1>;
523 mlmix: power-domain@44461800 {
524 compatible = "fsl,imx93-src-slice";
526 #power-domain-cells = <0>;
531 mediamix: power-domain@44462400 {
532 compatible = "fsl,imx93-src-slice";
534 #power-domain-cells = <0>;
540 clock-controller@44480000 {
541 compatible = "fsl,imx93-anatop";
543 #clock-cells = <1>;
547 compatible = "fsl,qoriq-tmu";
551 little-endian;
552 fsl,tmu-range = <0x800000da 0x800000e9
556 fsl,tmu-calibration = <0x00000000 0x0000000e
563 #thermal-sensor-cells = <1>;
567 compatible = "fsl,imx93-micfil";
576 clock-names = "ipg_clk", "ipg_clk_app", "pll8k";
578 dma-names = "rx";
579 #sound-dai-cells = <0>;
584 compatible = "nxp,imx93-adc";
590 clock-names = "ipg";
591 #io-channel-cells = <1>;
597 compatible = "fsl,aips-bus", "simple-bus";
599 #address-cells = <1>;
600 #size-cells = <1>;
603 edma2: dma-controller@42000000 {
604 compatible = "fsl,imx93-edma4";
606 #dma-cells = <3>;
607 dma-channels = <64>;
674 clock-names = "dma";
678 compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";
683 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
687 #mbox-cells = <2>;
692 compatible = "fsl,imx93-wdt";
696 timeout-sec = <40>;
701 compatible = "fsl,imx93-wdt";
705 timeout-sec = <40>;
710 compatible = "fsl,imx93-wdt";
714 timeout-sec = <40>;
719 compatible = "fsl,imx7ulp-pwm";
722 #pwm-cells = <3>;
727 compatible = "fsl,imx7ulp-pwm";
730 #pwm-cells = <3>;
735 compatible = "fsl,imx7ulp-pwm";
738 #pwm-cells = <3>;
743 compatible = "fsl,imx7ulp-pwm";
746 #pwm-cells = <3>;
751 compatible = "silvaco,i3c-master-v1";
754 #address-cells = <3>;
755 #size-cells = <0>;
759 clock-names = "pclk", "fast_clk", "slow_clk";
764 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
766 #address-cells = <1>;
767 #size-cells = <0>;
771 clock-names = "per", "ipg";
773 dma-names = "tx", "rx";
778 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
780 #address-cells = <1>;
781 #size-cells = <0>;
785 clock-names = "per", "ipg";
787 dma-names = "tx", "rx";
792 #address-cells = <1>;
793 #size-cells = <0>;
794 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
799 clock-names = "per", "ipg";
801 dma-names = "tx", "rx";
806 #address-cells = <1>;
807 #size-cells = <0>;
808 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
813 clock-names = "per", "ipg";
815 dma-names = "tx", "rx";
820 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
824 clock-names = "ipg";
826 dma-names = "rx", "tx";
831 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
835 clock-names = "ipg";
837 dma-names = "rx", "tx";
842 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
846 clock-names = "ipg";
848 dma-names = "rx", "tx";
853 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
857 clock-names = "ipg";
859 dma-names = "rx", "tx";
864 compatible = "fsl,imx93-flexcan";
869 clock-names = "ipg", "per";
870 assigned-clocks = <&clk IMX93_CLK_CAN2>;
871 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
872 assigned-clock-rates = <40000000>;
873 fsl,clk-source = /bits/ 8 <0>;
874 fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
879 compatible = "nxp,imx8mm-fspi";
881 reg-names = "fspi_base", "fspi_mmap";
882 #address-cells = <1>;
883 #size-cells = <0>;
887 clock-names = "fspi_en", "fspi";
888 assigned-clocks = <&clk IMX93_CLK_FLEXSPI1>;
889 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
894 compatible = "fsl,imx93-sai";
900 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
902 dma-names = "rx", "tx";
903 #sound-dai-cells = <0>;
908 compatible = "fsl,imx93-sai";
914 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
916 dma-names = "rx", "tx";
917 #sound-dai-cells = <0>;
922 compatible = "fsl,imx93-xcvr";
927 reg-names = "ram", "regs", "rxfifo", "txfifo";
934 clock-names = "ipg", "phy", "spba", "pll_ipg";
936 dma-names = "rx", "tx";
937 #sound-dai-cells = <0>;
942 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
946 clock-names = "ipg";
948 dma-names = "rx", "tx";
953 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
957 clock-names = "ipg";
959 dma-names = "rx", "tx";
964 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
966 #address-cells = <1>;
967 #size-cells = <0>;
971 clock-names = "per", "ipg";
973 dma-names = "tx", "rx";
978 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
980 #address-cells = <1>;
981 #size-cells = <0>;
985 clock-names = "per", "ipg";
987 dma-names = "tx", "rx";
992 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
994 #address-cells = <1>;
995 #size-cells = <0>;
999 clock-names = "per", "ipg";
1001 dma-names = "tx", "rx";
1006 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
1008 #address-cells = <1>;
1009 #size-cells = <0>;
1013 clock-names = "per", "ipg";
1015 dma-names = "tx", "rx";
1020 #address-cells = <1>;
1021 #size-cells = <0>;
1022 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1027 clock-names = "per", "ipg";
1029 dma-names = "tx", "rx";
1034 #address-cells = <1>;
1035 #size-cells = <0>;
1036 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1041 clock-names = "per", "ipg";
1043 dma-names = "tx", "rx";
1048 #address-cells = <1>;
1049 #size-cells = <0>;
1050 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1055 clock-names = "per", "ipg";
1057 dma-names = "tx", "rx";
1062 #address-cells = <1>;
1063 #size-cells = <0>;
1064 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1069 clock-names = "per", "ipg";
1071 dma-names = "tx", "rx";
1078 compatible = "fsl,aips-bus", "simple-bus";
1080 #address-cells = <1>;
1081 #size-cells = <1>;
1085 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1091 clock-names = "ipg", "ahb", "per";
1092 assigned-clocks = <&clk IMX93_CLK_USDHC1>;
1093 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
1094 assigned-clock-rates = <400000000>;
1095 bus-width = <8>;
1096 fsl,tuning-start-tap = <1>;
1097 fsl,tuning-step = <2>;
1102 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1108 clock-names = "ipg", "ahb", "per";
1109 assigned-clocks = <&clk IMX93_CLK_USDHC2>;
1110 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
1111 assigned-clock-rates = <400000000>;
1112 bus-width = <4>;
1113 fsl,tuning-start-tap = <1>;
1114 fsl,tuning-step = <2>;
1119 compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
1130 clock-names = "ipg", "ahb", "ptp",
1132 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
1135 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
1138 assigned-clock-rates = <100000000>, <250000000>, <50000000>;
1139 fsl,num-tx-queues = <3>;
1140 fsl,num-rx-queues = <3>;
1141 fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>;
1142 nvmem-cells = <ð_mac1>;
1143 nvmem-cell-names = "mac-address";
1148 compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
1152 interrupt-names = "macirq", "eth_wake_irq";
1158 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
1159 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
1161 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
1163 assigned-clock-rates = <100000000>, <250000000>;
1165 snps,clk-csr = <6>;
1166 nvmem-cells = <ð_mac2>;
1167 nvmem-cell-names = "mac-address";
1172 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1178 clock-names = "ipg", "ahb", "per";
1179 assigned-clocks = <&clk IMX93_CLK_USDHC3>;
1180 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
1181 assigned-clock-rates = <400000000>;
1182 bus-width = <4>;
1183 fsl,tuning-start-tap = <1>;
1184 fsl,tuning-step = <2>;
1190 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1192 gpio-controller;
1193 #gpio-cells = <2>;
1196 interrupt-controller;
1197 #interrupt-cells = <2>;
1200 clock-names = "gpio", "port";
1201 gpio-ranges = <&iomuxc 0 4 30>;
1206 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1208 gpio-controller;
1209 #gpio-cells = <2>;
1212 interrupt-controller;
1213 #interrupt-cells = <2>;
1216 clock-names = "gpio", "port";
1217 gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
1223 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1225 gpio-controller;
1226 #gpio-cells = <2>;
1229 interrupt-controller;
1230 #interrupt-cells = <2>;
1233 clock-names = "gpio", "port";
1234 gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
1239 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1241 gpio-controller;
1242 #gpio-cells = <2>;
1245 interrupt-controller;
1246 #interrupt-cells = <2>;
1249 clock-names = "gpio", "port";
1250 gpio-ranges = <&iomuxc 0 92 16>;
1255 compatible = "fsl,imx93-ocotp", "syscon";
1257 #address-cells = <1>;
1258 #size-cells = <1>;
1260 eth_mac1: mac-address@4ec {
1264 eth_mac2: mac-address@4f2 {
1271 compatible = "fsl,imx93-mu-s4";
1275 interrupt-names = "tx", "rx";
1276 #mbox-cells = <2>;
1279 media_blk_ctrl: system-controller@4ac10000 {
1280 compatible = "fsl,imx93-media-blk-ctrl", "syscon";
1282 power-domains = <&mediamix>;
1293 clock-names = "apb", "axi", "nic", "disp", "cam",
1295 #power-domain-cells = <1>;
1300 compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
1305 clock-names = "usb_ctrl_root", "usb_wakeup";
1306 assigned-clocks = <&clk IMX93_CLK_HSIO>;
1307 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
1308 assigned-clock-rates = <133000000>;
1315 compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
1316 "fsl,imx6q-usbmisc";
1318 #index-cells = <1>;
1322 compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
1327 clock-names = "usb_ctrl_root", "usb_wakeup";
1328 assigned-clocks = <&clk IMX93_CLK_HSIO>;
1329 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
1330 assigned-clock-rates = <133000000>;
1337 compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
1338 "fsl,imx6q-usbmisc";
1340 #index-cells = <1>;
1343 memory-controller@4e300000 {
1344 compatible = "nxp,imx9-memory-controller";
1346 reg-names = "ctrl", "inject";
1348 little-endian;
1351 ddr-pmu@4e300dc0 {
1352 compatible = "fsl,imx93-ddr-pmu";