Lines Matching refs:parents

238 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SOSC_DIV2>;
305 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
318 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
351 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
366 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
397 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SPLL3_PFD3_DIV2>;
409 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
422 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
461 				assigned-clock-parents = <0>, <&cgc1 IMX8ULP_CLK_SPLL3_PFD3_DIV1>;
480 				assigned-clock-parents = <0>, <&cgc1 IMX8ULP_CLK_SPLL3_PFD3_DIV2>;
499 				assigned-clock-parents = <0>, <&cgc1 IMX8ULP_CLK_SPLL3_PFD3_DIV2>;