Lines Matching +full:0 +full:x92400000
55 #size-cells = <0>;
58 A35_0: cpu@0 {
61 reg = <0x0 0x0>;
63 i-cache-size = <0x8000>;
66 d-cache-size = <0x8000>;
78 reg = <0x0 0x1>;
80 i-cache-size = <0x8000>;
83 d-cache-size = <0x8000>;
95 reg = <0x0 0x2>;
97 i-cache-size = <0x8000>;
100 d-cache-size = <0x8000>;
112 reg = <0x0 0x3>;
114 i-cache-size = <0x8000>;
117 d-cache-size = <0x8000>;
130 cache-size = <0x80000>;
156 reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */
157 <0x0 0x51b00000 0 0xc0000>; /* GICR (RD_base + SGI_base) */
169 reg = <0 0x84000000 0 0x2000000>;
174 reg = <0 0x86000000 0 0x200000>;
179 reg = <0 0x92000000 0 0x100000>;
184 reg = <0 0x92400000 0 0x2000000>;
190 reg = <0 0x94400000 0 0x700000>;
210 mboxes = <&lsio_mu1 0 0
211 &lsio_mu1 1 0
265 #clock-cells = <0>;
266 clock-frequency = <0>;
272 #clock-cells = <0>;
279 #clock-cells = <0>;